1f126890aSEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2f126890aSEmmanuel Vadot// 3f126890aSEmmanuel Vadot// Copyright 2017 NXP 4f126890aSEmmanuel Vadot 5f126890aSEmmanuel Vadot/dts-v1/; 6f126890aSEmmanuel Vadot 7f126890aSEmmanuel Vadot#include "imx7d.dtsi" 8f126890aSEmmanuel Vadot 9f126890aSEmmanuel Vadot/ { 10f126890aSEmmanuel Vadot backlight: backlight { 11f126890aSEmmanuel Vadot compatible = "pwm-backlight"; 12f126890aSEmmanuel Vadot pwms = <&pwm4 0 50000 0>; 13f126890aSEmmanuel Vadot brightness-levels = <0 36 72 108 144 180 216 255>; 14f126890aSEmmanuel Vadot default-brightness-level = <6>; 15f126890aSEmmanuel Vadot }; 16f126890aSEmmanuel Vadot 17f126890aSEmmanuel Vadot /* Will be filled by the bootloader */ 18f126890aSEmmanuel Vadot memory@80000000 { 19f126890aSEmmanuel Vadot device_type = "memory"; 20f126890aSEmmanuel Vadot reg = <0x80000000 0>; 21f126890aSEmmanuel Vadot }; 22f126890aSEmmanuel Vadot 23f126890aSEmmanuel Vadot panel { 24f126890aSEmmanuel Vadot compatible = "vxt,vl050-8048nt-c01"; 25f126890aSEmmanuel Vadot backlight = <&backlight>; 26f126890aSEmmanuel Vadot power-supply = <®_lcd_3v3>; 27f126890aSEmmanuel Vadot 28f126890aSEmmanuel Vadot port { 29f126890aSEmmanuel Vadot panel_in: endpoint { 30f126890aSEmmanuel Vadot remote-endpoint = <&display_out>; 31f126890aSEmmanuel Vadot }; 32f126890aSEmmanuel Vadot }; 33f126890aSEmmanuel Vadot }; 34f126890aSEmmanuel Vadot 35f126890aSEmmanuel Vadot reg_lcd_3v3: regulator-lcd-3v3 { 36f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 37f126890aSEmmanuel Vadot pinctrl-names = "default"; 38f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_reg_lcdreg_on>; 39f126890aSEmmanuel Vadot regulator-name = "lcd-3v3"; 40f126890aSEmmanuel Vadot regulator-min-microvolt = <3300000>; 41f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 42f126890aSEmmanuel Vadot gpio = <&gpio1 6 GPIO_ACTIVE_HIGH>; 43f126890aSEmmanuel Vadot enable-active-high; 44f126890aSEmmanuel Vadot }; 45f126890aSEmmanuel Vadot 46f126890aSEmmanuel Vadot reg_wlreg_on: regulator-wlreg_on { 47f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 48f126890aSEmmanuel Vadot pinctrl-names = "default"; 49f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_reg_wlreg_on>; 50f126890aSEmmanuel Vadot regulator-name = "wlreg_on"; 51f126890aSEmmanuel Vadot regulator-min-microvolt = <3300000>; 52f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 53f126890aSEmmanuel Vadot gpio = <&gpio4 16 GPIO_ACTIVE_HIGH>; 54f126890aSEmmanuel Vadot enable-active-high; 55f126890aSEmmanuel Vadot }; 56f126890aSEmmanuel Vadot 57f126890aSEmmanuel Vadot reg_2p5v: regulator-2p5v { 58f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 59f126890aSEmmanuel Vadot regulator-name = "2P5V"; 60f126890aSEmmanuel Vadot regulator-min-microvolt = <2500000>; 61f126890aSEmmanuel Vadot regulator-max-microvolt = <2500000>; 62f126890aSEmmanuel Vadot regulator-always-on; 63f126890aSEmmanuel Vadot }; 64f126890aSEmmanuel Vadot 65f126890aSEmmanuel Vadot reg_3p3v: regulator-3p3v { 66f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 67f126890aSEmmanuel Vadot regulator-name = "3P3V"; 68f126890aSEmmanuel Vadot regulator-min-microvolt = <3300000>; 69f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 70f126890aSEmmanuel Vadot regulator-always-on; 71f126890aSEmmanuel Vadot }; 72f126890aSEmmanuel Vadot 73f126890aSEmmanuel Vadot reg_usb_otg1_vbus: regulator-usb-otg1-vbus { 74f126890aSEmmanuel Vadot pinctrl-names = "default"; 75f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usbotg1_pwr>; 76f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 77f126890aSEmmanuel Vadot regulator-name = "usb_otg1_vbus"; 78f126890aSEmmanuel Vadot regulator-min-microvolt = <5000000>; 79f126890aSEmmanuel Vadot regulator-max-microvolt = <5000000>; 80f126890aSEmmanuel Vadot gpio = <&gpio4 5 GPIO_ACTIVE_LOW>; 81f126890aSEmmanuel Vadot }; 82f126890aSEmmanuel Vadot 83f126890aSEmmanuel Vadot reg_usb_otg2_vbus: regulator-usb-otg2-vbus { 84f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 85f126890aSEmmanuel Vadot regulator-name = "usb_otg2_vbus"; 86f126890aSEmmanuel Vadot regulator-min-microvolt = <5000000>; 87f126890aSEmmanuel Vadot regulator-max-microvolt = <5000000>; 88f126890aSEmmanuel Vadot }; 89f126890aSEmmanuel Vadot 90f126890aSEmmanuel Vadot reg_vref_1v8: regulator-vref-1v8 { 91f126890aSEmmanuel Vadot compatible = "regulator-fixed"; 92f126890aSEmmanuel Vadot regulator-name = "vref-1v8"; 93f126890aSEmmanuel Vadot regulator-min-microvolt = <1800000>; 94f126890aSEmmanuel Vadot regulator-max-microvolt = <1800000>; 95f126890aSEmmanuel Vadot }; 96f126890aSEmmanuel Vadot 97f126890aSEmmanuel Vadot usdhc2_pwrseq: usdhc2_pwrseq { 98f126890aSEmmanuel Vadot compatible = "mmc-pwrseq-simple"; 99f126890aSEmmanuel Vadot clocks = <&clks IMX7D_CLKO2_ROOT_DIV>; 100f126890aSEmmanuel Vadot clock-names = "ext_clock"; 101f126890aSEmmanuel Vadot }; 102f126890aSEmmanuel Vadot}; 103f126890aSEmmanuel Vadot 104f126890aSEmmanuel Vadot&clks { 105f126890aSEmmanuel Vadot assigned-clocks = <&clks IMX7D_CLKO2_ROOT_SRC>, 106f126890aSEmmanuel Vadot <&clks IMX7D_CLKO2_ROOT_DIV>; 107f126890aSEmmanuel Vadot assigned-clock-parents = <&clks IMX7D_CKIL>; 108f126890aSEmmanuel Vadot assigned-clock-rates = <0>, <32768>; 109f126890aSEmmanuel Vadot}; 110f126890aSEmmanuel Vadot 1118d13bc63SEmmanuel Vadot&cpu0 { 1128d13bc63SEmmanuel Vadot cpu-supply = <&sw1a_reg>; 1138d13bc63SEmmanuel Vadot}; 1148d13bc63SEmmanuel Vadot 1158d13bc63SEmmanuel Vadot&cpu1 { 1168d13bc63SEmmanuel Vadot cpu-supply = <&sw1a_reg>; 1178d13bc63SEmmanuel Vadot}; 1188d13bc63SEmmanuel Vadot 119f126890aSEmmanuel Vadot&ecspi3 { 120f126890aSEmmanuel Vadot cs-gpios = <&gpio4 11 GPIO_ACTIVE_LOW>; 121f126890aSEmmanuel Vadot pinctrl-names = "default"; 122f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_ecspi3>; 123f126890aSEmmanuel Vadot status = "okay"; 124f126890aSEmmanuel Vadot}; 125f126890aSEmmanuel Vadot 126f126890aSEmmanuel Vadot&fec1 { 127f126890aSEmmanuel Vadot pinctrl-names = "default"; 128f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_enet1>; 129f126890aSEmmanuel Vadot assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>, 130f126890aSEmmanuel Vadot <&clks IMX7D_ENET1_TIME_ROOT_CLK>; 131f126890aSEmmanuel Vadot assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>; 132f126890aSEmmanuel Vadot assigned-clock-rates = <0>, <100000000>; 133f126890aSEmmanuel Vadot phy-mode = "rgmii-id"; 134f126890aSEmmanuel Vadot phy-handle = <ðphy0>; 135f126890aSEmmanuel Vadot fsl,magic-packet; 136f126890aSEmmanuel Vadot phy-reset-gpios = <&gpio6 11 GPIO_ACTIVE_LOW>; 137f126890aSEmmanuel Vadot status = "okay"; 138f126890aSEmmanuel Vadot 139f126890aSEmmanuel Vadot mdio { 140f126890aSEmmanuel Vadot #address-cells = <1>; 141f126890aSEmmanuel Vadot #size-cells = <0>; 142f126890aSEmmanuel Vadot 143f126890aSEmmanuel Vadot ethphy0: ethernet-phy@1 { 144f126890aSEmmanuel Vadot compatible = "ethernet-phy-ieee802.3-c22"; 145f126890aSEmmanuel Vadot reg = <1>; 146f126890aSEmmanuel Vadot status = "okay"; 147f126890aSEmmanuel Vadot }; 148f126890aSEmmanuel Vadot }; 149f126890aSEmmanuel Vadot}; 150f126890aSEmmanuel Vadot 151f126890aSEmmanuel Vadot&flexcan1 { 152f126890aSEmmanuel Vadot pinctrl-names = "default"; 153f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_can1>; 154f126890aSEmmanuel Vadot status = "okay"; 155f126890aSEmmanuel Vadot}; 156f126890aSEmmanuel Vadot 157f126890aSEmmanuel Vadot&flexcan2 { 158f126890aSEmmanuel Vadot pinctrl-names = "default"; 159f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_can2>; 160f126890aSEmmanuel Vadot status = "okay"; 161f126890aSEmmanuel Vadot}; 162f126890aSEmmanuel Vadot 163f126890aSEmmanuel Vadot&i2c1 { 164f126890aSEmmanuel Vadot clock-frequency = <100000>; 165f126890aSEmmanuel Vadot pinctrl-names = "default"; 166f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c1>; 167f126890aSEmmanuel Vadot status = "okay"; 168f126890aSEmmanuel Vadot}; 169f126890aSEmmanuel Vadot 170f126890aSEmmanuel Vadot&i2c2 { 171f126890aSEmmanuel Vadot pinctrl-names = "default"; 172f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c2>; 173f126890aSEmmanuel Vadot status = "okay"; 174f126890aSEmmanuel Vadot}; 175f126890aSEmmanuel Vadot 176f126890aSEmmanuel Vadot&i2c4 { 177f126890aSEmmanuel Vadot pinctrl-names = "default"; 178f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c4>; 179f126890aSEmmanuel Vadot status = "okay"; 180f126890aSEmmanuel Vadot 181f126890aSEmmanuel Vadot pmic: pmic@8 { 182f126890aSEmmanuel Vadot compatible = "fsl,pfuze3000"; 183f126890aSEmmanuel Vadot reg = <0x08>; 184f126890aSEmmanuel Vadot 185f126890aSEmmanuel Vadot regulators { 186f126890aSEmmanuel Vadot sw1a_reg: sw1a { 187f126890aSEmmanuel Vadot regulator-min-microvolt = <700000>; 188f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 189f126890aSEmmanuel Vadot regulator-boot-on; 190f126890aSEmmanuel Vadot regulator-always-on; 191f126890aSEmmanuel Vadot regulator-ramp-delay = <6250>; 192f126890aSEmmanuel Vadot }; 193f126890aSEmmanuel Vadot /* use sw1c_reg to align with pfuze100/pfuze200 */ 194f126890aSEmmanuel Vadot sw1c_reg: sw1b { 195f126890aSEmmanuel Vadot regulator-min-microvolt = <700000>; 196f126890aSEmmanuel Vadot regulator-max-microvolt = <1475000>; 197f126890aSEmmanuel Vadot regulator-boot-on; 198f126890aSEmmanuel Vadot regulator-always-on; 199f126890aSEmmanuel Vadot regulator-ramp-delay = <6250>; 200f126890aSEmmanuel Vadot }; 201f126890aSEmmanuel Vadot 202f126890aSEmmanuel Vadot sw2_reg: sw2 { 203f126890aSEmmanuel Vadot regulator-min-microvolt = <1800000>; 204f126890aSEmmanuel Vadot regulator-max-microvolt = <1850000>; 205f126890aSEmmanuel Vadot regulator-boot-on; 206f126890aSEmmanuel Vadot regulator-always-on; 207f126890aSEmmanuel Vadot }; 208f126890aSEmmanuel Vadot 209f126890aSEmmanuel Vadot sw3a_reg: sw3 { 210f126890aSEmmanuel Vadot regulator-min-microvolt = <900000>; 211f126890aSEmmanuel Vadot regulator-max-microvolt = <1650000>; 212f126890aSEmmanuel Vadot regulator-boot-on; 213f126890aSEmmanuel Vadot regulator-always-on; 214f126890aSEmmanuel Vadot }; 215f126890aSEmmanuel Vadot 216f126890aSEmmanuel Vadot swbst_reg: swbst { 217f126890aSEmmanuel Vadot regulator-min-microvolt = <5000000>; 218f126890aSEmmanuel Vadot regulator-max-microvolt = <5150000>; 219f126890aSEmmanuel Vadot }; 220f126890aSEmmanuel Vadot 221f126890aSEmmanuel Vadot snvs_reg: vsnvs { 222f126890aSEmmanuel Vadot regulator-min-microvolt = <1000000>; 223f126890aSEmmanuel Vadot regulator-max-microvolt = <3000000>; 224f126890aSEmmanuel Vadot regulator-boot-on; 225f126890aSEmmanuel Vadot regulator-always-on; 226f126890aSEmmanuel Vadot }; 227f126890aSEmmanuel Vadot 228f126890aSEmmanuel Vadot vref_reg: vrefddr { 229f126890aSEmmanuel Vadot regulator-boot-on; 230f126890aSEmmanuel Vadot regulator-always-on; 231f126890aSEmmanuel Vadot }; 232f126890aSEmmanuel Vadot 233f126890aSEmmanuel Vadot vgen1_reg: vldo1 { 234f126890aSEmmanuel Vadot regulator-min-microvolt = <1800000>; 235f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 236f126890aSEmmanuel Vadot regulator-always-on; 237f126890aSEmmanuel Vadot }; 238f126890aSEmmanuel Vadot 239f126890aSEmmanuel Vadot vgen2_reg: vldo2 { 240f126890aSEmmanuel Vadot regulator-min-microvolt = <800000>; 241f126890aSEmmanuel Vadot regulator-max-microvolt = <1550000>; 242f126890aSEmmanuel Vadot }; 243f126890aSEmmanuel Vadot 244f126890aSEmmanuel Vadot vgen3_reg: vccsd { 245f126890aSEmmanuel Vadot regulator-min-microvolt = <2850000>; 246f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 247f126890aSEmmanuel Vadot regulator-always-on; 248f126890aSEmmanuel Vadot }; 249f126890aSEmmanuel Vadot 250f126890aSEmmanuel Vadot vgen4_reg: v33 { 251f126890aSEmmanuel Vadot regulator-min-microvolt = <2850000>; 252f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 253f126890aSEmmanuel Vadot regulator-always-on; 254f126890aSEmmanuel Vadot }; 255f126890aSEmmanuel Vadot 256f126890aSEmmanuel Vadot vgen5_reg: vldo3 { 257f126890aSEmmanuel Vadot regulator-min-microvolt = <1800000>; 258f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 259f126890aSEmmanuel Vadot regulator-always-on; 260f126890aSEmmanuel Vadot }; 261f126890aSEmmanuel Vadot 262f126890aSEmmanuel Vadot vgen6_reg: vldo4 { 263f126890aSEmmanuel Vadot regulator-min-microvolt = <1800000>; 264f126890aSEmmanuel Vadot regulator-max-microvolt = <3300000>; 265f126890aSEmmanuel Vadot regulator-always-on; 266f126890aSEmmanuel Vadot }; 267f126890aSEmmanuel Vadot }; 268f126890aSEmmanuel Vadot }; 269f126890aSEmmanuel Vadot}; 270f126890aSEmmanuel Vadot 271f126890aSEmmanuel Vadot&lcdif { 272f126890aSEmmanuel Vadot pinctrl-names = "default"; 273f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_lcdif>; 274f126890aSEmmanuel Vadot status = "okay"; 275f126890aSEmmanuel Vadot 276f126890aSEmmanuel Vadot port { 277f126890aSEmmanuel Vadot display_out: endpoint { 278f126890aSEmmanuel Vadot remote-endpoint = <&panel_in>; 279f126890aSEmmanuel Vadot }; 280f126890aSEmmanuel Vadot }; 281f126890aSEmmanuel Vadot}; 282f126890aSEmmanuel Vadot 283f126890aSEmmanuel Vadot&sai1 { 284f126890aSEmmanuel Vadot pinctrl-names = "default"; 285f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_sai1>; 286f126890aSEmmanuel Vadot assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>, 287f126890aSEmmanuel Vadot <&clks IMX7D_SAI1_ROOT_CLK>; 288f126890aSEmmanuel Vadot assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>; 289f126890aSEmmanuel Vadot assigned-clock-rates = <0>, <24576000>; 290f126890aSEmmanuel Vadot status = "okay"; 291f126890aSEmmanuel Vadot}; 292f126890aSEmmanuel Vadot 293f126890aSEmmanuel Vadot 294f126890aSEmmanuel Vadot&pwm1 { 295f126890aSEmmanuel Vadot pinctrl-names = "default"; 296f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_pwm1>; 297f126890aSEmmanuel Vadot status = "okay"; 298f126890aSEmmanuel Vadot}; 299f126890aSEmmanuel Vadot 300f126890aSEmmanuel Vadot&pwm2 { 301f126890aSEmmanuel Vadot pinctrl-names = "default"; 302f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_pwm2>; 303f126890aSEmmanuel Vadot status = "okay"; 304f126890aSEmmanuel Vadot}; 305f126890aSEmmanuel Vadot 306f126890aSEmmanuel Vadot&pwm3 { 307f126890aSEmmanuel Vadot pinctrl-names = "default"; 308f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_pwm3>; 309f126890aSEmmanuel Vadot status = "okay"; 310f126890aSEmmanuel Vadot}; 311f126890aSEmmanuel Vadot 312f126890aSEmmanuel Vadot&pwm4 { /* Backlight */ 313f126890aSEmmanuel Vadot pinctrl-names = "default"; 314f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_pwm4>; 315f126890aSEmmanuel Vadot status = "okay"; 316f126890aSEmmanuel Vadot}; 317f126890aSEmmanuel Vadot 318f126890aSEmmanuel Vadot&uart5 { 319f126890aSEmmanuel Vadot pinctrl-names = "default"; 320f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart5>; 321f126890aSEmmanuel Vadot assigned-clocks = <&clks IMX7D_UART5_ROOT_SRC>; 322f126890aSEmmanuel Vadot assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>; 323f126890aSEmmanuel Vadot status = "okay"; 324f126890aSEmmanuel Vadot}; 325f126890aSEmmanuel Vadot 326f126890aSEmmanuel Vadot&uart6 { 327f126890aSEmmanuel Vadot pinctrl-names = "default"; 328f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart6>; 329f126890aSEmmanuel Vadot assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>; 330f126890aSEmmanuel Vadot assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>; 331f126890aSEmmanuel Vadot uart-has-rtscts; 332f126890aSEmmanuel Vadot status = "okay"; 333f126890aSEmmanuel Vadot}; 334f126890aSEmmanuel Vadot 335f126890aSEmmanuel Vadot&uart7 { /* Bluetooth */ 336f126890aSEmmanuel Vadot pinctrl-names = "default"; 337f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_uart7>; 338f126890aSEmmanuel Vadot assigned-clocks = <&clks IMX7D_UART7_ROOT_SRC>; 339f126890aSEmmanuel Vadot assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>; 340f126890aSEmmanuel Vadot uart-has-rtscts; 341f126890aSEmmanuel Vadot status = "okay"; 342f126890aSEmmanuel Vadot}; 343f126890aSEmmanuel Vadot 344f126890aSEmmanuel Vadot&usbotg1 { 345f126890aSEmmanuel Vadot vbus-supply = <®_usb_otg1_vbus>; 346f126890aSEmmanuel Vadot status = "okay"; 347f126890aSEmmanuel Vadot}; 348f126890aSEmmanuel Vadot 349f126890aSEmmanuel Vadot&usbotg2 { 350f126890aSEmmanuel Vadot vbus-supply = <®_usb_otg2_vbus>; 351f126890aSEmmanuel Vadot dr_mode = "host"; 352f126890aSEmmanuel Vadot status = "okay"; 353f126890aSEmmanuel Vadot}; 354f126890aSEmmanuel Vadot 355f126890aSEmmanuel Vadot&usdhc1 { 356f126890aSEmmanuel Vadot pinctrl-names = "default", "state_100mhz", "state_200mhz"; 357f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usdhc1>; 358f126890aSEmmanuel Vadot pinctrl-1 = <&pinctrl_usdhc1_100mhz>; 359f126890aSEmmanuel Vadot pinctrl-2 = <&pinctrl_usdhc1_200mhz>; 360f126890aSEmmanuel Vadot cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; 361f126890aSEmmanuel Vadot bus-width = <4>; 362f126890aSEmmanuel Vadot fsl,tuning-step = <2>; 363f126890aSEmmanuel Vadot vmmc-supply = <®_3p3v>; 364f126890aSEmmanuel Vadot wakeup-source; 365f126890aSEmmanuel Vadot no-1-8-v; 366f126890aSEmmanuel Vadot keep-power-in-suspend; 367f126890aSEmmanuel Vadot status = "okay"; 368f126890aSEmmanuel Vadot}; 369f126890aSEmmanuel Vadot 370f126890aSEmmanuel Vadot&usdhc2 { /* Wifi SDIO */ 371f126890aSEmmanuel Vadot pinctrl-names = "default"; 372f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usdhc2 &pinctrl_wifi_clk>; 373f126890aSEmmanuel Vadot no-1-8-v; 374f126890aSEmmanuel Vadot non-removable; 375f126890aSEmmanuel Vadot keep-power-in-suspend; 376f126890aSEmmanuel Vadot wakeup-source; 377f126890aSEmmanuel Vadot vmmc-supply = <®_wlreg_on>; 378f126890aSEmmanuel Vadot mmc-pwrseq = <&usdhc2_pwrseq>; 379f126890aSEmmanuel Vadot status = "okay"; 380f126890aSEmmanuel Vadot}; 381f126890aSEmmanuel Vadot 382f126890aSEmmanuel Vadot&usdhc3 { 383f126890aSEmmanuel Vadot pinctrl-names = "default", "state_100mhz", "state_200mhz"; 384f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_usdhc3>; 385f126890aSEmmanuel Vadot pinctrl-1 = <&pinctrl_usdhc3_100mhz>; 386f126890aSEmmanuel Vadot pinctrl-2 = <&pinctrl_usdhc3_200mhz>; 387f126890aSEmmanuel Vadot assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>; 388f126890aSEmmanuel Vadot assigned-clock-rates = <400000000>; 389f126890aSEmmanuel Vadot bus-width = <8>; 390f126890aSEmmanuel Vadot no-1-8-v; 391f126890aSEmmanuel Vadot fsl,tuning-step = <2>; 392f126890aSEmmanuel Vadot non-removable; 393f126890aSEmmanuel Vadot status = "okay"; 394f126890aSEmmanuel Vadot}; 395f126890aSEmmanuel Vadot 396f126890aSEmmanuel Vadot&wdog1 { 397f126890aSEmmanuel Vadot pinctrl-names = "default"; 398f126890aSEmmanuel Vadot pinctrl-0 = <&pinctrl_wdog>; 399f126890aSEmmanuel Vadot fsl,ext-reset-output; 400f126890aSEmmanuel Vadot status = "okay"; 401f126890aSEmmanuel Vadot}; 402f126890aSEmmanuel Vadot 403f126890aSEmmanuel Vadot&iomuxc { 404f126890aSEmmanuel Vadot pinctrl_ecspi3: ecspi3grp { 405f126890aSEmmanuel Vadot fsl,pins = < 406f126890aSEmmanuel Vadot MX7D_PAD_I2C1_SCL__ECSPI3_MISO 0x2 407f126890aSEmmanuel Vadot MX7D_PAD_I2C1_SDA__ECSPI3_MOSI 0x2 408f126890aSEmmanuel Vadot MX7D_PAD_I2C2_SCL__ECSPI3_SCLK 0x2 409f126890aSEmmanuel Vadot MX7D_PAD_I2C2_SDA__GPIO4_IO11 0x14 410f126890aSEmmanuel Vadot >; 411f126890aSEmmanuel Vadot }; 412f126890aSEmmanuel Vadot 413f126890aSEmmanuel Vadot pinctrl_i2c1: i2c1grp { 414f126890aSEmmanuel Vadot fsl,pins = < 415f126890aSEmmanuel Vadot MX7D_PAD_UART1_TX_DATA__I2C1_SDA 0x4000007f 416f126890aSEmmanuel Vadot MX7D_PAD_UART1_RX_DATA__I2C1_SCL 0x4000007f 417f126890aSEmmanuel Vadot >; 418f126890aSEmmanuel Vadot }; 419f126890aSEmmanuel Vadot 420f126890aSEmmanuel Vadot pinctrl_i2c2: i2c2grp { 421f126890aSEmmanuel Vadot fsl,pins = < 422f126890aSEmmanuel Vadot MX7D_PAD_UART2_TX_DATA__I2C2_SDA 0x4000007f 423f126890aSEmmanuel Vadot MX7D_PAD_UART2_RX_DATA__I2C2_SCL 0x4000007f 424f126890aSEmmanuel Vadot >; 425f126890aSEmmanuel Vadot }; 426f126890aSEmmanuel Vadot 427f126890aSEmmanuel Vadot pinctrl_enet1: enet1grp { 428f126890aSEmmanuel Vadot fsl,pins = < 429f126890aSEmmanuel Vadot MX7D_PAD_SD2_CD_B__ENET1_MDIO 0x3 430f126890aSEmmanuel Vadot MX7D_PAD_SD2_WP__ENET1_MDC 0x3 431f126890aSEmmanuel Vadot MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC 0x1 432f126890aSEmmanuel Vadot MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x1 433f126890aSEmmanuel Vadot MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x1 434f126890aSEmmanuel Vadot MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 0x1 435f126890aSEmmanuel Vadot MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 0x1 436f126890aSEmmanuel Vadot MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x1 437f126890aSEmmanuel Vadot MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC 0x1 438f126890aSEmmanuel Vadot MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x1 439f126890aSEmmanuel Vadot MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x1 440f126890aSEmmanuel Vadot MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 0x1 441f126890aSEmmanuel Vadot MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 0x1 442f126890aSEmmanuel Vadot MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x1 443f126890aSEmmanuel Vadot MX7D_PAD_SD3_RESET_B__GPIO6_IO11 0x1 /* Ethernet reset */ 444f126890aSEmmanuel Vadot >; 445f126890aSEmmanuel Vadot }; 446f126890aSEmmanuel Vadot 447*b2d2a78aSEmmanuel Vadot pinctrl_can1: can1frpgrp { 448f126890aSEmmanuel Vadot fsl,pins = < 449f126890aSEmmanuel Vadot MX7D_PAD_SAI1_RX_DATA__FLEXCAN1_RX 0x59 450f126890aSEmmanuel Vadot MX7D_PAD_SAI1_TX_BCLK__FLEXCAN1_TX 0x59 451f126890aSEmmanuel Vadot >; 452f126890aSEmmanuel Vadot }; 453f126890aSEmmanuel Vadot 454*b2d2a78aSEmmanuel Vadot pinctrl_can2: can2frpgrp { 455f126890aSEmmanuel Vadot fsl,pins = < 456f126890aSEmmanuel Vadot MX7D_PAD_SAI1_TX_SYNC__FLEXCAN2_RX 0x59 457f126890aSEmmanuel Vadot MX7D_PAD_SAI1_TX_DATA__FLEXCAN2_TX 0x59 458f126890aSEmmanuel Vadot >; 459f126890aSEmmanuel Vadot }; 460f126890aSEmmanuel Vadot 461f126890aSEmmanuel Vadot pinctrl_i2c4: i2c4grp { 462f126890aSEmmanuel Vadot fsl,pins = < 463f126890aSEmmanuel Vadot MX7D_PAD_SAI1_RX_BCLK__I2C4_SDA 0x4000007f 464f126890aSEmmanuel Vadot MX7D_PAD_SAI1_RX_SYNC__I2C4_SCL 0x4000007f 465f126890aSEmmanuel Vadot >; 466f126890aSEmmanuel Vadot }; 467f126890aSEmmanuel Vadot 468f126890aSEmmanuel Vadot pinctrl_lcdif: lcdifgrp { 469f126890aSEmmanuel Vadot fsl,pins = < 470f126890aSEmmanuel Vadot MX7D_PAD_LCD_DATA00__LCD_DATA0 0x79 471f126890aSEmmanuel Vadot MX7D_PAD_LCD_DATA01__LCD_DATA1 0x79 472f126890aSEmmanuel Vadot MX7D_PAD_LCD_DATA02__LCD_DATA2 0x79 473f126890aSEmmanuel Vadot MX7D_PAD_LCD_DATA03__LCD_DATA3 0x79 474f126890aSEmmanuel Vadot MX7D_PAD_LCD_DATA04__LCD_DATA4 0x79 475f126890aSEmmanuel Vadot MX7D_PAD_LCD_DATA05__LCD_DATA5 0x79 476f126890aSEmmanuel Vadot MX7D_PAD_LCD_DATA06__LCD_DATA6 0x79 477f126890aSEmmanuel Vadot MX7D_PAD_LCD_DATA07__LCD_DATA7 0x79 478f126890aSEmmanuel Vadot MX7D_PAD_LCD_DATA08__LCD_DATA8 0x79 479f126890aSEmmanuel Vadot MX7D_PAD_LCD_DATA09__LCD_DATA9 0x79 480f126890aSEmmanuel Vadot MX7D_PAD_LCD_DATA10__LCD_DATA10 0x79 481f126890aSEmmanuel Vadot MX7D_PAD_LCD_DATA11__LCD_DATA11 0x79 482f126890aSEmmanuel Vadot MX7D_PAD_LCD_DATA12__LCD_DATA12 0x79 483f126890aSEmmanuel Vadot MX7D_PAD_LCD_DATA13__LCD_DATA13 0x79 484f126890aSEmmanuel Vadot MX7D_PAD_LCD_DATA14__LCD_DATA14 0x79 485f126890aSEmmanuel Vadot MX7D_PAD_LCD_DATA15__LCD_DATA15 0x79 486f126890aSEmmanuel Vadot MX7D_PAD_LCD_DATA16__LCD_DATA16 0x79 487f126890aSEmmanuel Vadot MX7D_PAD_LCD_DATA17__LCD_DATA17 0x79 488f126890aSEmmanuel Vadot MX7D_PAD_LCD_DATA18__LCD_DATA18 0x79 489f126890aSEmmanuel Vadot MX7D_PAD_LCD_DATA19__LCD_DATA19 0x79 490f126890aSEmmanuel Vadot MX7D_PAD_LCD_DATA20__LCD_DATA20 0x79 491f126890aSEmmanuel Vadot MX7D_PAD_LCD_DATA21__LCD_DATA21 0x79 492f126890aSEmmanuel Vadot MX7D_PAD_LCD_DATA22__LCD_DATA22 0x79 493f126890aSEmmanuel Vadot MX7D_PAD_LCD_DATA23__LCD_DATA23 0x79 494f126890aSEmmanuel Vadot MX7D_PAD_LCD_CLK__LCD_CLK 0x79 495f126890aSEmmanuel Vadot MX7D_PAD_LCD_ENABLE__LCD_ENABLE 0x78 496f126890aSEmmanuel Vadot MX7D_PAD_LCD_VSYNC__LCD_VSYNC 0x78 497f126890aSEmmanuel Vadot MX7D_PAD_LCD_HSYNC__LCD_HSYNC 0x78 498f126890aSEmmanuel Vadot MX7D_PAD_LCD_RESET__GPIO3_IO4 0x14 499f126890aSEmmanuel Vadot >; 500f126890aSEmmanuel Vadot }; 501f126890aSEmmanuel Vadot 502*b2d2a78aSEmmanuel Vadot pinctrl_pwm1: pwm1grp { 503f126890aSEmmanuel Vadot fsl,pins = < 504f126890aSEmmanuel Vadot MX7D_PAD_GPIO1_IO08__PWM1_OUT 0x7f 505f126890aSEmmanuel Vadot >; 506f126890aSEmmanuel Vadot }; 507f126890aSEmmanuel Vadot 508*b2d2a78aSEmmanuel Vadot pinctrl_pwm2: pwm2grp { 509f126890aSEmmanuel Vadot fsl,pins = < 510f126890aSEmmanuel Vadot MX7D_PAD_GPIO1_IO09__PWM2_OUT 0x7f 511f126890aSEmmanuel Vadot >; 512f126890aSEmmanuel Vadot }; 513f126890aSEmmanuel Vadot 514*b2d2a78aSEmmanuel Vadot pinctrl_pwm3: pwm3grp { 515f126890aSEmmanuel Vadot fsl,pins = < 516f126890aSEmmanuel Vadot MX7D_PAD_GPIO1_IO10__PWM3_OUT 0x7f 517f126890aSEmmanuel Vadot >; 518f126890aSEmmanuel Vadot }; 519f126890aSEmmanuel Vadot 520f126890aSEmmanuel Vadot pinctrl_pwm4: pwm4grp { 521f126890aSEmmanuel Vadot fsl,pins = < 522f126890aSEmmanuel Vadot MX7D_PAD_GPIO1_IO11__PWM4_OUT 0x7f 523f126890aSEmmanuel Vadot >; 524f126890aSEmmanuel Vadot }; 525f126890aSEmmanuel Vadot 526f126890aSEmmanuel Vadot pinctrl_reg_wlreg_on: regregongrp { 527f126890aSEmmanuel Vadot fsl,pins = < 528f126890aSEmmanuel Vadot MX7D_PAD_ECSPI1_SCLK__GPIO4_IO16 0x59 529f126890aSEmmanuel Vadot >; 530f126890aSEmmanuel Vadot }; 531f126890aSEmmanuel Vadot 532f126890aSEmmanuel Vadot pinctrl_sai1: sai1grp { 533f126890aSEmmanuel Vadot fsl,pins = < 534f126890aSEmmanuel Vadot MX7D_PAD_ENET1_RX_CLK__SAI1_TX_BCLK 0x1f 535f126890aSEmmanuel Vadot MX7D_PAD_ENET1_CRS__SAI1_TX_SYNC 0x1f 536f126890aSEmmanuel Vadot MX7D_PAD_ENET1_COL__SAI1_TX_DATA0 0x30 537f126890aSEmmanuel Vadot MX7D_PAD_ENET1_TX_CLK__SAI1_RX_DATA0 0x1f 538f126890aSEmmanuel Vadot >; 539f126890aSEmmanuel Vadot }; 540f126890aSEmmanuel Vadot 541f126890aSEmmanuel Vadot pinctrl_uart5: uart5grp { 542f126890aSEmmanuel Vadot fsl,pins = < 543f126890aSEmmanuel Vadot MX7D_PAD_I2C4_SDA__UART5_DCE_TX 0x79 544f126890aSEmmanuel Vadot MX7D_PAD_I2C4_SCL__UART5_DCE_RX 0x79 545f126890aSEmmanuel Vadot >; 546f126890aSEmmanuel Vadot }; 547f126890aSEmmanuel Vadot 548f126890aSEmmanuel Vadot pinctrl_uart6: uart6grp { 549f126890aSEmmanuel Vadot fsl,pins = < 550f126890aSEmmanuel Vadot MX7D_PAD_EPDC_DATA08__UART6_DCE_RX 0x79 551f126890aSEmmanuel Vadot MX7D_PAD_EPDC_DATA09__UART6_DCE_TX 0x79 552f126890aSEmmanuel Vadot MX7D_PAD_EPDC_DATA10__UART6_DCE_RTS 0x79 553f126890aSEmmanuel Vadot MX7D_PAD_EPDC_DATA11__UART6_DCE_CTS 0x79 554f126890aSEmmanuel Vadot >; 555f126890aSEmmanuel Vadot }; 556f126890aSEmmanuel Vadot 557f126890aSEmmanuel Vadot pinctrl_uart7: uart7grp { 558f126890aSEmmanuel Vadot fsl,pins = < 559f126890aSEmmanuel Vadot MX7D_PAD_ECSPI2_MOSI__UART7_DCE_TX 0x79 560f126890aSEmmanuel Vadot MX7D_PAD_ECSPI2_SCLK__UART7_DCE_RX 0x79 561f126890aSEmmanuel Vadot MX7D_PAD_ECSPI2_SS0__UART7_DCE_CTS 0x79 562f126890aSEmmanuel Vadot MX7D_PAD_ECSPI2_MISO__UART7_DCE_RTS 0x79 563f126890aSEmmanuel Vadot >; 564f126890aSEmmanuel Vadot }; 565f126890aSEmmanuel Vadot 566*b2d2a78aSEmmanuel Vadot pinctrl_usbotg1_pwr: usbotgpwrgrp { 567f126890aSEmmanuel Vadot fsl,pins = < 568f126890aSEmmanuel Vadot MX7D_PAD_UART3_TX_DATA__GPIO4_IO5 0x14 569f126890aSEmmanuel Vadot >; 570f126890aSEmmanuel Vadot }; 571f126890aSEmmanuel Vadot 572f126890aSEmmanuel Vadot pinctrl_usdhc1: usdhc1grp { 573f126890aSEmmanuel Vadot fsl,pins = < 574f126890aSEmmanuel Vadot MX7D_PAD_SD1_CMD__SD1_CMD 0x59 575f126890aSEmmanuel Vadot MX7D_PAD_SD1_CLK__SD1_CLK 0x19 576f126890aSEmmanuel Vadot MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59 577f126890aSEmmanuel Vadot MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59 578f126890aSEmmanuel Vadot MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59 579f126890aSEmmanuel Vadot MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59 580f126890aSEmmanuel Vadot MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x15 581f126890aSEmmanuel Vadot >; 582f126890aSEmmanuel Vadot }; 583f126890aSEmmanuel Vadot 584*b2d2a78aSEmmanuel Vadot pinctrl_usdhc1_100mhz: usdhc1-100mhz-grp { 585f126890aSEmmanuel Vadot fsl,pins = < 586f126890aSEmmanuel Vadot MX7D_PAD_SD1_CMD__SD1_CMD 0x5a 587f126890aSEmmanuel Vadot MX7D_PAD_SD1_CLK__SD1_CLK 0x1a 588f126890aSEmmanuel Vadot MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5a 589f126890aSEmmanuel Vadot MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5a 590f126890aSEmmanuel Vadot MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5a 591f126890aSEmmanuel Vadot MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5a 592f126890aSEmmanuel Vadot MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x15 593f126890aSEmmanuel Vadot >; 594f126890aSEmmanuel Vadot }; 595f126890aSEmmanuel Vadot 596*b2d2a78aSEmmanuel Vadot pinctrl_usdhc1_200mhz: usdhc1-200mhz-grp { 597f126890aSEmmanuel Vadot fsl,pins = < 598f126890aSEmmanuel Vadot MX7D_PAD_SD1_CMD__SD1_CMD 0x5b 599f126890aSEmmanuel Vadot MX7D_PAD_SD1_CLK__SD1_CLK 0x1b 600f126890aSEmmanuel Vadot MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5b 601f126890aSEmmanuel Vadot MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5b 602f126890aSEmmanuel Vadot MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5b 603f126890aSEmmanuel Vadot MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5b 604f126890aSEmmanuel Vadot MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x15 605f126890aSEmmanuel Vadot >; 606f126890aSEmmanuel Vadot }; 607f126890aSEmmanuel Vadot 608f126890aSEmmanuel Vadot pinctrl_usdhc2: usdhc2grp { 609f126890aSEmmanuel Vadot fsl,pins = < 610f126890aSEmmanuel Vadot MX7D_PAD_SD2_CMD__SD2_CMD 0x59 611f126890aSEmmanuel Vadot MX7D_PAD_SD2_CLK__SD2_CLK 0x19 612f126890aSEmmanuel Vadot MX7D_PAD_SD2_DATA0__SD2_DATA0 0x59 613f126890aSEmmanuel Vadot MX7D_PAD_SD2_DATA1__SD2_DATA1 0x59 614f126890aSEmmanuel Vadot MX7D_PAD_SD2_DATA2__SD2_DATA2 0x59 615f126890aSEmmanuel Vadot MX7D_PAD_SD2_DATA3__SD2_DATA3 0x59 616f126890aSEmmanuel Vadot >; 617f126890aSEmmanuel Vadot }; 618f126890aSEmmanuel Vadot 619f126890aSEmmanuel Vadot pinctrl_usdhc3: usdhc3grp { 620f126890aSEmmanuel Vadot fsl,pins = < 621f126890aSEmmanuel Vadot MX7D_PAD_SD3_CMD__SD3_CMD 0x59 622f126890aSEmmanuel Vadot MX7D_PAD_SD3_CLK__SD3_CLK 0x19 623f126890aSEmmanuel Vadot MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59 624f126890aSEmmanuel Vadot MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59 625f126890aSEmmanuel Vadot MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59 626f126890aSEmmanuel Vadot MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59 627f126890aSEmmanuel Vadot MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59 628f126890aSEmmanuel Vadot MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59 629f126890aSEmmanuel Vadot MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59 630f126890aSEmmanuel Vadot MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59 631f126890aSEmmanuel Vadot >; 632f126890aSEmmanuel Vadot }; 633f126890aSEmmanuel Vadot 634*b2d2a78aSEmmanuel Vadot pinctrl_usdhc3_100mhz: usdhc3-100mhz-grp { 635f126890aSEmmanuel Vadot fsl,pins = < 636f126890aSEmmanuel Vadot MX7D_PAD_SD3_CMD__SD3_CMD 0x5a 637f126890aSEmmanuel Vadot MX7D_PAD_SD3_CLK__SD3_CLK 0x1a 638f126890aSEmmanuel Vadot MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a 639f126890aSEmmanuel Vadot MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a 640f126890aSEmmanuel Vadot MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a 641f126890aSEmmanuel Vadot MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5a 642f126890aSEmmanuel Vadot MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5a 643f126890aSEmmanuel Vadot MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5a 644f126890aSEmmanuel Vadot MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5a 645f126890aSEmmanuel Vadot MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5a 646f126890aSEmmanuel Vadot >; 647f126890aSEmmanuel Vadot }; 648f126890aSEmmanuel Vadot 649*b2d2a78aSEmmanuel Vadot pinctrl_usdhc3_200mhz: usdhc3-200mhz-grp { 650f126890aSEmmanuel Vadot fsl,pins = < 651f126890aSEmmanuel Vadot MX7D_PAD_SD3_CMD__SD3_CMD 0x5b 652f126890aSEmmanuel Vadot MX7D_PAD_SD3_CLK__SD3_CLK 0x1b 653f126890aSEmmanuel Vadot MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b 654f126890aSEmmanuel Vadot MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b 655f126890aSEmmanuel Vadot MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b 656f126890aSEmmanuel Vadot MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5b 657f126890aSEmmanuel Vadot MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5b 658f126890aSEmmanuel Vadot MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5b 659f126890aSEmmanuel Vadot MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5b 660f126890aSEmmanuel Vadot MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b 661f126890aSEmmanuel Vadot >; 662f126890aSEmmanuel Vadot }; 663f126890aSEmmanuel Vadot}; 664f126890aSEmmanuel Vadot 665f126890aSEmmanuel Vadot&iomuxc_lpsr { 666f126890aSEmmanuel Vadot pinctrl_wifi_clk: wificlkgrp { 667f126890aSEmmanuel Vadot fsl,pins = < 668f126890aSEmmanuel Vadot MX7D_PAD_LPSR_GPIO1_IO03__CCM_CLKO2 0x7d 669f126890aSEmmanuel Vadot >; 670f126890aSEmmanuel Vadot }; 671f126890aSEmmanuel Vadot 672f126890aSEmmanuel Vadot pinctrl_reg_lcdreg_on: reglcdongrp { 673f126890aSEmmanuel Vadot fsl,pins = < 674f126890aSEmmanuel Vadot MX7D_PAD_LPSR_GPIO1_IO06__GPIO1_IO6 0x59 675f126890aSEmmanuel Vadot >; 676f126890aSEmmanuel Vadot }; 677f126890aSEmmanuel Vadot 678f126890aSEmmanuel Vadot pinctrl_wdog: wdoggrp { 679f126890aSEmmanuel Vadot fsl,pins = < 680f126890aSEmmanuel Vadot MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x74 681f126890aSEmmanuel Vadot >; 682f126890aSEmmanuel Vadot }; 683f126890aSEmmanuel Vadot}; 684