| /linux/include/linux/phy/ |
| H A D | phy-mipi-dphy.h | 29 * Time, in picoseconds, that the transmitter continues to
42 * the transmitter prior to any associated Data Lane beginning
52 * Time, in picoseconds, that the transmitter drives the Clock
86 * Time, in picoseconds, that the transmitter drives the HS-0
97 * Time, in picoseconds, that the transmitter drives the HS-0
126 * Time, in picoseconds, that the transmitter drives LP-11
136 * Time, in picoseconds, that the transmitter drives the Data
173 * Time, in picoseconds, that the transmitter drives the
185 * Time, in picoseconds, that the transmitter drives the HS-0
213 * Time, in picoseconds, that the new transmitter drives the
[all …]
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| /linux/drivers/gpu/drm/amd/display/dc/bios/ |
| H A D | command_table_helper.c | 117 * dal_cmd_table_helper_transmitter_bp_to_atom - Translate the Transmitter to the
119 * @t: transmitter
126 enum transmitter t) in dal_cmd_table_helper_transmitter_bp_to_atom()
140 /* Invalid Transmitter Type! */ in dal_cmd_table_helper_transmitter_bp_to_atom()
178 /* there are three transmitter blocks, each one has two links 4-lanes in dal_cmd_table_helper_assign_control_parameter()
180 * each transmitter block B, D and F as link 1, third transmitter block in dal_cmd_table_helper_assign_control_parameter()
184 if ((control->transmitter == TRANSMITTER_UNIPHY_B) || in dal_cmd_table_helper_assign_control_parameter()
185 (control->transmitter == TRANSMITTER_UNIPHY_D) || in dal_cmd_table_helper_assign_control_parameter()
186 (control->transmitter == TRANSMITTER_UNIPHY_F)) { in dal_cmd_table_helper_assign_control_parameter()
194 /* Bit[4:3]: Transmitter Selection in dal_cmd_table_helper_assign_control_parameter()
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| /linux/Documentation/ABI/stable/ |
| H A D | sysfs-class-rfkill | 49 Description: Current state of the transmitter.
60 transmitter is turned off by software
62 transmitter is (potentially) active
64 transmitter is forced off by something outside of
76 The transmitter is (potentially) active.
78 The transmitter is forced off by something outside of
90 The transmitter is (potentially) active.
93 The transmitter is turned off by software.
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| /linux/drivers/media/rc/ |
| H A D | ite-cir.h | 179 #define IT87_TCR1 0x03 /* transmitter control register 1 */
180 #define IT87_TCR2 0x04 /* transmitter control register 2 */
181 #define IT87_TSR 0x05 /* transmitter status register */
190 #define IT87_TLDLIE 0x01 /* transmitter low data interrupt enable */
206 #define IT87_TXMPM 0x03 /* transmitter modulation pulse mode mask */
208 #define IT87_TXENDF 0x04 /* transmitter deferral */
209 #define IT87_TXRLE 0x08 /* transmitter run length enable */
218 #define IT87_TXMPW 0x07 /* transmitter modulation pulse width mask */
224 #define IT87_TXFBC 0x3f /* transmitter FIFO byte count mask */
234 #define IT87_II_TXLDL 0x02 /* transmitter low data level */
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| /linux/include/linux/can/ |
| H A D | bittiming.h | 28 * "Transmitter delay compensation" a SSP (Secondary Sample Point)
47 * @tdcv: Transmitter Delay Compensation Value. The time needed for
65 * @tdco: Transmitter Delay Compensation Offset. Offset value, in
70 * @tdcf: Transmitter Delay Compensation Filter window. Defines the
88 * @tdcv_min: Transmitter Delay Compensation Value minimum value. If
92 * @tdcv_max: Transmitter Delay Compensation Value maximum value. If
97 * @tdco_min: Transmitter Delay Compensation Offset minimum value.
98 * @tdco_max: Transmitter Delay Compensation Offset maximum value.
102 * @tdcf_min: Transmitter Delay Compensation Filter window minimum
104 * @tdcf_max: Transmitter Delay Compensation Filter window maximum
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| /linux/drivers/gpu/drm/amd/display/dc/hpo/dcn31/ |
| H A D | dcn31_hpo_dp_link_encoder.c | 445 ASSERT((enc->transmitter >= TRANSMITTER_UNIPHY_A) && (enc->transmitter <= TRANSMITTER_UNIPHY_E)); in dcn31_hpo_dp_link_enc_is_in_alt_mode()
448 REG_GET(RDPCSTX_PHY_CNTL6[enc->transmitter], RDPCS_PHY_DPALT_DISABLE, &dp_alt_mode_disable); in dcn31_hpo_dp_link_enc_is_in_alt_mode()
510 enum transmitter transmitter, in dcn31_hpo_dp_link_enc_enable_dp_output() argument
517 /* Set the transmitter */ in dcn31_hpo_dp_link_enc_enable_dp_output()
518 enc3->base.transmitter = transmitter; in dcn31_hpo_dp_link_enc_enable_dp_output()
526 cntl.transmitter = enc3->base.transmitter; in dcn31_hpo_dp_link_enc_enable_dp_output()
552 /* disable transmitter */ in dcn31_hpo_dp_link_enc_disable_output()
554 cntl.transmitter = enc3->base.transmitter; in dcn31_hpo_dp_link_enc_disable_output()
580 /* disable transmitter */ in dcn31_hpo_dp_link_enc_set_ffe()
581 cntl.transmitter = enc3->base.transmitter; in dcn31_hpo_dp_link_enc_set_ffe()
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| /linux/drivers/media/radio/si4713/ |
| H A D | Kconfig | 3 tristate "Silicon Labs Si4713 FM Radio Transmitter support with USB"
9 - 10c4:8244: Silicon Labs FM Transmitter USB device.
18 tristate "Silicon Labs Si4713 FM Radio Transmitter support with I2C"
32 tristate "Silicon Labs Si4713 FM Radio Transmitter support"
35 Say Y here if you want support to Si4713 FM Radio Transmitter.
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| /linux/Documentation/userspace-api/media/v4l/ |
| H A D | ext-ctrls-dv.rst | 14 the receiver or transmitter subdevice that implements them, so they are
44 hotplug pin as seen by the transmitter. Each bit corresponds to an
45 output pad on the transmitter. If an output pad does not have an
53 transmitter can sense that the receiver is ready to receive video).
54 Each bit corresponds to an output pad on the transmitter. If an
60 When the transmitter sees the hotplug signal from the receiver it
61 will attempt to read the EDID. If set, then the transmitter has read
63 output pad on the transmitter. If an output pad does not support
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| /linux/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| H A D | link_encoder.h | 51 enum transmitter transmitter; member
87 enum transmitter transmitter; member
231 enum transmitter transmitter; member
239 enum transmitter transmitter,
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| /linux/drivers/gpu/drm/amd/display/dc/dio/dcn31/ |
| H A D | dcn31_dio_link_encoder.c | 70 static uint8_t phy_id_from_transmitter(enum transmitter t) in phy_id_from_transmitter()
126 cmd->query_dp_alt.data.phy_id = phy_id_from_transmitter(enc10->base.transmitter); in query_dp_alt_from_dmub()
141 switch (enc->transmitter) { in dcn31_link_encoder_set_dio_phy_mux()
307 enc10->base.transmitter = init_data->transmitter; in dcn31_link_encoder_construct()
344 switch (enc10->base.transmitter) { in dcn31_link_encoder_construct()
413 enc10->base.transmitter = TRANSMITTER_UNKNOWN; in dcn31_link_encoder_construct_minimal()
457 /* Enable transmitter and encoder. */ in dcn31_link_encoder_enable_dp_output()
504 /* Enable transmitter and encoder. */ in dcn31_link_encoder_enable_dp_mst_output()
550 /* Disable transmitter and encoder. */ in dcn31_link_encoder_disable_output()
622 if ((enc10->base.transmitter == TRANSMITTER_UNIPHY_A) || in dcn31_link_encoder_is_in_alt_mode()
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| /linux/arch/m68k/include/asm/ |
| H A D | mcfuart.h | 42 #define MCFUART_UTF 0x28 /* Transmitter FIFO (r/w) */
96 #define MCFUART_USR_TXEMPTY 0x08 /* Transmitter empty */
97 #define MCFUART_USR_TXREADY 0x04 /* Transmitter ready */
121 #define MCFUART_UCR_CMDRESETTX 0x30 /* Reset transmitter */
163 #define MCFUART_UIR_TXREADY 0x01 /* Transmitter ready */
167 * Define bit flags in the Transmitter FIFO Register (UTF).
169 #define MCFUART_UTF_TXB 0x1f /* Transmitter data level */
170 #define MCFUART_UTF_FULL 0x20 /* Transmitter fifo full */
171 #define MCFUART_UTF_TXS 0xc0 /* Transmitter status */
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| /linux/arch/arm/include/debug/ |
| H A D | at91.S | 9 #define AT91_DBGU_THR (0x1c) /* Transmitter Holding Register */
10 #define AT91_DBGU_TXRDY (1 << 1) /* Transmitter Ready */
11 #define AT91_DBGU_TXEMPTY (1 << 9) /* Transmitter Empty */
19 strb \rd, [\rx, #(AT91_DBGU_THR)] @ Write to Transmitter Holding Register
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| /linux/drivers/gpu/drm/amd/display/dc/dce/ |
| H A D | dce_link_encoder.c | 139 * transmitter is used for the offset */ in enable_phy_bypass_mode()
150 * transmitter is used for the offset */ in disable_prbs_symbols()
170 * transmitter is used for the offset */ in program_pattern_symbols()
178 * transmitter is used for the offset */ in program_pattern_symbols()
186 * transmitter is used for the offset */ in program_pattern_symbols()
229 * transmitter is used for the offset */ in set_link_training_complete()
830 enc110->base.transmitter = init_data->transmitter; in dce110_link_encoder_construct()
865 switch (enc110->base.transmitter) { in dce110_link_encoder_construct()
966 cntl.transmitter = enc110->base.transmitter; in dce110_link_encoder_hw_init()
1061 cntl.transmitter = enc110->base.transmitter; in dce110_link_encoder_enable_tmds_output()
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| /linux/Documentation/networking/device_drivers/hamradio/ |
| H A D | z8530drv.rst | 414 TxUnder number of transmitter underruns
416 TxInts number of transmitter interrupts
472 transmitter, until the first byte is sent. This is usually
476 MODEM and/or transmitter, that asserts CTS when the
477 transmitter is ready for data.
483 This is the probability that the transmitter will be keyed
499 The time the transmitter will remain keyed after the last
502 SCC before the transmitter is keyed down. The value depends
515 1: Fullduplex mode, i.e. the transmitter will be keyed at
518 2: Like 1, but the transmitter will remain keyed, also
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| /linux/drivers/platform/surface/aggregator/ |
| H A D | ssh_packet_layer.h | 56 * @tx: Transmitter subsystem.
57 * @tx.running: Flag indicating (desired) transmitter thread state.
58 * @tx.thread: Transmitter thread.
59 * @tx.thread_cplt_tx: Completion for transmitter thread waiting on transfer.
60 * @tx.thread_cplt_pkt: Completion for transmitter thread waiting on packets.
168 * ssh_ptl_tx_wakeup_transfer() - Wake up packet transmitter thread for
172 * Wakes up the packet transmitter thread, notifying it that the underlying
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| /linux/include/uapi/linux/ |
| H A D | scc.h | 99 TXS_IDLE, /* Transmitter off, no data pending */
101 TXS_ACTIVE, /* Transmitter on, sending data */
103 TXS_IDLE2, /* Transmitter on, no data pending */
114 long txints; /* Transmitter interrupts */
125 unsigned int tx_under; /* Transmitter Underruns */
127 unsigned int tx_state; /* Transmitter state */
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| /linux/drivers/gpu/drm/amd/display/dc/dio/dcn10/ |
| H A D | dcn10_link_encoder.c | 110 * transmitter is used for the offset in enable_phy_bypass_mode()
121 * transmitter is used for the offset in disable_prbs_symbols()
141 * transmitter is used for the offset in program_pattern_symbols()
149 * transmitter is used for the offset in program_pattern_symbols()
157 * transmitter is used for the offset in program_pattern_symbols()
200 * transmitter is used for the offset in set_link_training_complete()
692 enc10->base.transmitter = init_data->transmitter; in dcn10_link_encoder_construct()
729 switch (enc10->base.transmitter) { in dcn10_link_encoder_construct()
837 cntl.transmitter = enc10->base.transmitter; in dcn10_link_encoder_hw_init()
933 cntl.transmitter = enc10->base.transmitter; in dcn10_link_encoder_enable_tmds_output()
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| /linux/drivers/tty/serial/ |
| H A D | atmel_serial.h | 19 #define ATMEL_US_RSTTX BIT(3) /* Reset Transmitter */
22 #define ATMEL_US_TXEN BIT(6) /* Transmitter Enable */
23 #define ATMEL_US_TXDIS BIT(7) /* Transmitter Disable */
92 #define ATMEL_US_TXRDY BIT(1) /* Transmitter Ready */
95 #define ATMEL_US_ENDTX BIT(4) /* End of Transmitter Transfer */
100 #define ATMEL_US_TXEMPTY BIT(9) /* Transmitter Empty */
118 #define ATMEL_US_THR 0x1c /* Transmitter Holding Register */
130 #define ATMEL_US_TTGR 0x28 /* Transmitter Timeguard Register */
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| H A D | dz.h | 18 #define DZ_TRDY 0x8000 /* Transmitter empty */
19 #define DZ_TIE 0x4000 /* Transmitter Interrupt Enbl */
20 #define DZ_TLINE 0x0300 /* Transmitter Line Number */
55 #define DZ_LNENB 0x000f /* Transmitter Line Enable */
121 #define DZ_TCR 0x10 /* Transmitter Control Register */
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| /linux/drivers/gpu/drm/amd/display/dc/hpo/dcn32/ |
| H A D | dcn32_hpo_dp_link_encoder.c | 50 ASSERT((enc->transmitter >= TRANSMITTER_UNIPHY_A) && (enc->transmitter <= TRANSMITTER_UNIPHY_E)); in dcn32_hpo_dp_link_enc_is_in_alt_mode()
53 REG_GET(RDPCSTX_PHY_CNTL6[enc->transmitter], RDPCS_PHY_DPALT_DISABLE, &dp_alt_mode_disable); in dcn32_hpo_dp_link_enc_is_in_alt_mode()
84 enc31->base.transmitter = TRANSMITTER_UNKNOWN; in hpo_dp_link_encoder32_construct()
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| /linux/drivers/gpu/drm/bridge/analogix/ |
| H A D | Kconfig | 12 transmitter designed for portable devices. The
24 ANX78XX is an ultra-low power Full-HD SlimPort transmitter
43 ANX7625 is an ultra-low power 4K mobile HD transmitter
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| /linux/drivers/net/ethernet/dec/tulip/ |
| H A D | xircom_cb.c | 274 /* start the transmitter to get a heartbeat */ in xircom_probe()
659 transmit_active returns 1 if the transmitter on the card is
666 if (!(xr32(CSR5) & (7 << 20))) /* transmitter disabled */ in transmit_active()
774 activate_transmitter enables the transmitter on the card.
775 Before being allowed to active the transmitter, the transmitter
777 this code actually disables the transmitter first; then it waits for the
778 transmitter to become inactive, then it activates the transmitter and then
779 it waits for the transmitter to be active again.
796 val = val & ~(1 << 13); /* disable the transmitter */ in activate_transmitter()
808 "Transmitter failed to deactivate\n"); in activate_transmitter()
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| /linux/arch/arm/boot/dts/marvell/ |
| H A D | dove-sbc-a510.dts | 50 * 0.2 DVI transmitter TI TFP410 MSEN
51 * 0.3 DVI transmitter TI TFP410 PD# (active low power down)
52 * 0.4 LVDS transmitter DS90C365 PD# (active low power down)
117 * - DVI transmitter TI TFP410, 0x39
129 /* TI TFP410 DVI transmitter */
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| /linux/arch/sh/include/asm/ |
| H A D | smc37c93x.h | 58 #define UART_THR 0x0 /* Transmitter Holding Register (Write Only) */
97 #define IER_ETHREI 0x0200 /* Enable Transmitter Holding Register Empty Interrupt */
113 #define FCR_TFRES 0x0400 /* Transmitter FIFO reset */
144 #define LSR_THRE 0x2000 /* Transmitter Holding Register Empty */
145 #define LSR_TEMT 0x4000 /* Transmitter Empty */
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| /linux/sound/soc/ti/ |
| H A D | davinci-mcasp.h | 241 #define TXCLKRST BIT(8) /* Transmitter Clock Divider Reset */
242 #define TXHCLKRST BIT(9) /* Transmitter High Frequency Clock Divider*/
244 #define TXSMRST BIT(11) /* Transmitter State Machine Reset */
248 * DAVINCI_MCASP_TXSTAT_REG - Transmitter Status Register Bits
276 * DAVINCI_MCASP_XEVTCTL_REG - Transmitter DMA Event Control Register bits
286 * DAVINCI_MCASP_EVTCTLX_REG - Transmitter Interrupt Control Register Bits
|