/freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
H A D | nvidia,tegra30-pinmux.txt | 1 NVIDIA Tegra30 pinmux controller 3 The Tegra30 pinctrl binding is very similar to the Tegra20 pinctrl binding, 4 as described in nvidia,tegra20-pinmux.txt. In fact, this document assumes 9 - compatible: "nvidia,tegra30-pinmux" 10 - reg: Should contain the register physical address and length for each of 13 Tegra30 adds the following optional properties for pin configuration subnodes: 14 - nvidia,enable-input: Integer. Enable the pin's input path. 0: no, 1: yes. 15 - nvidia,open-drain: Integer. Enable open drain mode. 0: no, 1: yes. 16 - nvidia,lock: Integer. Lock the pin configuration against further changes 18 - nvidia,io-reset: Integer. Reset the IO path. 0: no, 1: yes. [all …]
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H A D | nvidia,tegra30-pinmux.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra30 [all...] |
H A D | nvidia,tegra114-pinmux.txt | 1 NVIDIA Tegra114 pinmux controller 3 The Tegra114 pinctrl binding is very similar to the Tegra20 and Tegra30 4 pinctrl binding, as described in nvidia,tegra20-pinmux.txt and 5 nvidia,tegra30-pinmux.txt. In fact, this document assumes that binding as 9 - compatible: "nvidia,tegra114-pinmux" 10 - reg: Should contain the register physical address and length for each of 13 be pinmux register address. 16 - nvidia,enable-input: Integer. Enable the pin's input path. 0: no, 1: yes. 17 - nvidia,open-drain: Integer. Enable open drain mode. 0: no, 1: yes. 18 - nvidia,lock: Integer. Lock the pin configuration against further changes [all …]
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H A D | nvidia,tegra124-pinmux.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra124-pinmu [all...] |
H A D | nvidia,tegra124-pinmux.txt | 1 NVIDIA Tegra124 pinmux controller 3 The Tegra124 pinctrl binding is very similar to the Tegra20 and Tegra30 4 pinctrl binding, as described in nvidia,tegra20-pinmux.txt and 5 nvidia,tegra30-pinmux.txt. In fact, this document assumes that binding as 9 - compatible: For Tegra124, must contain "nvidia,tegra124-pinmux". For 10 Tegra132, must contain '"nvidia,tegra132-pinmux", "nvidia-tegra124-pinmux"'. 11 - reg: Should contain a list of base address and size pairs for: 12 -- first entry - the drive strength and pad control registers. 13 -- second entry - the pinmux registers 14 -- third entry - the MIPI_PAD_CTRL register [all …]
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/freebsd/sys/contrib/device-tree/Bindings/soc/tegra/ |
H A D | nvidia,tegra20-pmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/tegra/nvidia,tegra20-pmc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jonathan Hunter <jonathanh@nvidia.com> 16 - nvidia,tegra20-pmc 17 - nvidia,tegra30-pmc 18 - nvidia,tegra114-pmc 19 - nvidia,tegra124-pmc [all …]
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/freebsd/sys/contrib/device-tree/src/arm/nvidia/ |
H A D | tegra30-asus-nexus7-grouper.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include "tegra30-asus-nexus7-grouper-common.dtsi" 4 #include "tegra30-asus-nexus7-grouper-memory-timings.dtsi" 7 compatible = "asus,grouper", "nvidia,tegra30"; 9 pinmux@70000868 { 10 state_default: pinmux { 16 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 23 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 30 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 37 nvidia,enable-input = <TEGRA_PIN_ENABLE>; [all …]
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H A D | tegra30.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/tegra30-car.h> 3 #include <dt-bindings/gpio/tegra-gpio.h> 4 #include <dt-bindings/memory/tegra30 545 pinmux: pinmux@70000868 { global() label [all...] |
H A D | tegra114.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/tegra114-car.h> 3 #include <dt-bindings/gpio/tegra-gpio.h> 4 #include <dt-bindings/memory/tegra114-mc.h> 5 #include <dt-binding 297 pinmux: pinmux@70000868 { global() label [all...] |
H A D | tegra30-asus-nexus7-tilapia.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include "tegra30-asus-nexus7-grouper-common.dtsi" 4 #include "tegra30-asus-nexus7-tilapia-memory-timings.dtsi" 7 compatible = "asus,tilapia", "asus,grouper", "nvidia,tegra30"; 10 init-mode-3g-hog { 11 gpio-hog; 30 output-low; 34 pinmux@70000868 { 35 state_default: pinmux { 41 nvidia,enable-input = <TEGRA_PIN_DISABLE>; [all …]
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H A D | tegra30-asus-transformer-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <dt-bindings/input/gpio-keys.h> 4 #include <dt-bindings/input/input.h> 5 #include <dt-bindings/thermal/thermal.h> 7 #include "tegra30.dtsi" 8 #include "tegra30-cp [all...] |
H A D | tegra30-lg-x3.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <dt-bindings/input/gpio-keys.h> 4 #include <dt-bindings/input/input.h> 5 #include <dt-bindings/leds/common.h> 6 #include <dt-bindings/mfd/max77620.h> 7 #include <dt-bindings/thermal/thermal.h> 9 #include "tegra30.dtsi" 10 #include "tegra30-cpu-opp.dtsi" 11 #include "tegra30-cpu-opp-microvolt.dtsi" 14 chassis-type = "handset"; [all …]
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H A D | tegra30-cardhu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/input/input.h> 3 #include <dt-bindings/thermal/thermal.h> 4 #include "tegra30.dtsi" 5 #include "tegra30-cpu-opp.dtsi" 6 #include "tegra30 [all...] |
H A D | tegra30-lg-p880.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include "tegra30-lg-x3.dtsi" 8 compatible = "lg,p880", "nvidia,tegra30"; 15 pinmux@70000868 { 16 pinctrl-names = "default"; 17 pinctrl-0 = <&state_default>; 19 state_default: pinmux { 20 /* WLAN SDIO pinmux */ 21 host-wlan-wake { [all …]
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H A D | tegra30-lg-p895.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include "tegra30-lg-x3.dtsi" 8 compatible = "lg,p895", "nvidia,tegra30"; 10 pinmux@70000868 { 11 pinctrl-names = "default"; 12 pinctrl-0 = <&state_default>; 14 state_default: pinmux { 15 /* GNSS UART-B pinmux */ 16 uartb-cts-rxd { [all …]
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H A D | tegra124.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/tegra124-car.h> 3 #include <dt-bindings/gpio/tegra-gpio.h> 4 #include <dt-bindings/memory/tegra124-mc.h> 5 #include <dt-binding 361 pinmux: pinmux@70000868 { global() label [all...] |
H A D | tegra30-pegatron-chagall.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/gpio-keys.h> 5 #include <dt-bindings/input/input.h> 6 #include <dt-bindings/thermal/thermal.h> 8 #include "tegra30.dtsi" 9 #include "tegra30 [all...] |
H A D | tegra30-asus-tf201.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include "tegra30-asus-transformer-common.dtsi" 5 #include "tegra30-asus-lvds-display.dtsi" 9 compatible = "asus,tf201", "nvidia,tegra30"; 11 pinmux@70000868 { 12 state_default: pinmux { 19 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 27 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 35 nvidia,enable-input = <TEGRA_PIN_ENABLE>; [all …]
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H A D | tegra30-asus-nexus7-grouper-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <dt-bindings/input/gpio-keys.h> 4 #include <dt-bindings/input/input.h> 5 #include <dt-bindings/power/summit,smb347-charger.h> 6 #include <dt-bindings/thermal/thermal.h> 8 #include "tegra30.dtsi" 9 #include "tegra30-cpu-opp.dtsi" 10 #include "tegra30-cpu-opp-microvolt.dtsi" 11 #include "tegra30-asus-lvds-display.dtsi" 27 * pre-existing /chosen node to be available to insert the [all …]
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H A D | tegra30-apalis-v1.1.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 2 #include "tegra30.dtsi" 16 avdd-pexa-supply = <&vdd2_reg>; 17 avdd-pexb-supply = <&vdd2_reg>; 18 avdd-pex-pl [all...] |
/freebsd/sys/contrib/device-tree/Bindings/arm/tegra/ |
H A D | nvidia,tegra20-pmc.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/arm/tegra/nvidia,tegra20-pmc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jonathan Hunter <jonathanh@nvidia.com> 16 - nvidia,tegra20-pmc 17 - nvidia,tegra30-pmc 18 - nvidia,tegra114-pmc 19 - nvidia,tegra124-pmc [all …]
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/freebsd/sys/contrib/device-tree/Bindings/pwm/ |
H A D | nvidia,tegra20-pwm.txt | 4 - compatible: Must be: 5 - "nvidia,tegra20-pwm": for Tegra20 6 - "nvidia,tegra30-pwm", "nvidia,tegra20-pwm": for Tegra30 7 - "nvidia,tegra114-pwm", "nvidia,tegra20-pwm": for Tegra114 8 - "nvidia,tegra124-pwm", "nvidia,tegra20-pwm": for Tegra124 9 - "nvidia,tegra132-pwm", "nvidia,tegra20-pwm": for Tegra132 10 - "nvidia,tegra210-pwm", "nvidia,tegra20-pwm": for Tegra210 11 - "nvidia,tegra186-pwm": for Tegra186 12 - "nvidia,tegra194-pwm": for Tegra194 13 - reg: physical base address and length of the controller's registers [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/nvidia/ |
H A D | tegra210.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/tegra210-car.h> 3 #include <dt-bindings/gpio/tegra-gpio.h> 4 #include <dt-bindings/memory/tegra210-mc.h> 5 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h> 7 #include <dt-bindings/reset/tegra210-car.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/thermal/tegra124-soctherm.h> 10 #include <dt-bindings/soc/tegra-pmc.h> [all …]
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H A D | tegra132.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/tegra124-car.h> 3 #include <dt-bindings/gpio/tegra-gpio.h> 4 #include <dt-bindings/memory/tegra124-mc.h> 5 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 6 #include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/thermal/tegra124-soctherm.h> 9 #include <dt-bindings/soc/tegra-pmc.h> 11 #include "tegra132-peripherals-opp.dtsi" [all …]
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/freebsd/sys/contrib/device-tree/Bindings/mmc/ |
H A D | nvidia,tegra20-sdhci.txt | 7 by mmc.txt and the properties used by the sdhci-tegra driver. 10 - compatible : should be one of: 11 - "nvidia,tegra20-sdhci": for Tegra20 12 - "nvidia,tegra30-sdhci": for Tegra30 13 - "nvidia,tegra114-sdhci": for Tegra114 14 - "nvidia,tegra124-sdhci": for Tegra124 and Tegra132 15 - "nvidia,tegra210-sdhci": for Tegra210 16 - "nvidia,tegra186-sdhci": for Tegra186 17 - "nvidia,tegra194-sdhci": for Tegra194 18 - clocks: For Tegra210, Tegra186 and Tegra194 must contain two entries. [all …]
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