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/linux/Documentation/devicetree/bindings/sound/
H A Dnvidia,tegra210-sfc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-sfc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra210 SFC
10 The Sampling Frequency Converter (SFC) converts the sampling frequency
15 - Jon Hunter <jonathanh@nvidia.com>
16 - Mohan Kumar <mkumard@nvidia.com>
17 - Sameer Pujar <spujar@nvidia.com>
20 - $ref: dai-common.yaml#
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H A Dnvidia,tegra210-ahub.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-ahub.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra210 AHUB
11 for audio pre-processing, post-processing and a programmable full
17 - Jon Hunter <jonathanh@nvidia.com>
18 - Sameer Pujar <spujar@nvidia.com>
22 pattern: "^ahub@[0-9a-f]*$"
26 - enum:
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/linux/sound/soc/tegra/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 snd-soc-tegra-pcm-y := tegra_pcm.o
4 snd-soc-tegra-utils-y += tegra_asoc_utils.o
5 snd-soc-tegra20-ac97-y := tegra20_ac97.o
6 snd-soc-tegra20-das-y := tegra20_das.o
7 snd-soc-tegra20-i2s-y := tegra20_i2s.o
8 snd-soc-tegra20-spdif-y := tegra20_spdif.o
9 snd-soc-tegra30-ahub-y := tegra30_ahub.o
10 snd-soc-tegra30-i2s-y := tegra30_i2s.o
11 snd-soc-tegra210-ahub-y := tegra210_ahub.o
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "SoC Audio for the Tegra System-on-Chip"
61 tristate "Tegra210 AHUB module"
67 Say Y or M if you want to add support for Tegra210 AHUB module.
70 tristate "Tegra210 DMIC module"
77 Say Y or M if you want to add support for Tegra210 DMIC module.
80 tristate "Tegra210 I2S module"
83 Config to enable the Inter-IC Sound (I2S) Controller which
84 implements full-duplex and bidirectional and single direction
85 point-to-point serial interfaces. It can interface with I2S
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H A Dtegra210_sfc.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * tegra210_sfc.h - Definitions for Tegra210 SFC driver
5 * Copyright (c) 2021-2023 NVIDIA CORPORATION. All rights reserved.
14 * The data comes from XBAR to SFC.
26 * The data goes out of SFC.
H A Dtegra210_sfc.c1 // SPDX-License-Identifier: GPL-2.0-only
2 // SPDX-FileCopyrightText: Copyright (c) 2021-2024 NVIDIA CORPORATION & AFFILIATES.
5 // tegra210_sfc.c - Tegra210 SFC driver
23 #define UNSUPP_CONV ((void *)(-EOPNOTSUPP))
51 /* coeff RAM tables required for SFC */
3061 struct tegra210_sfc *sfc = dev_get_drvdata(dev); in tegra210_sfc_runtime_suspend() local
3063 regcache_cache_only(sfc->regmap, true); in tegra210_sfc_runtime_suspend()
3064 regcache_mark_dirty(sfc->regmap); in tegra210_sfc_runtime_suspend()
3071 struct tegra210_sfc *sfc = dev_get_drvdata(dev); in tegra210_sfc_runtime_resume() local
3073 regcache_cache_only(sfc->regmap, false); in tegra210_sfc_runtime_resume()
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H A Dtegra210_ahub.c1 // SPDX-License-Identifier: GPL-2.0-only
3 // tegra210_ahub.c - Tegra210 AHUB driver
5 // Copyright (c) 2020-2024, NVIDIA CORPORATION. All rights reserved.
22 struct soc_enum *e = (struct soc_enum *)kctl->private_value; in tegra_ahub_get_value_enum()
29 for (i = 0; i < ahub->soc_data->reg_count; i++) { in tegra_ahub_get_value_enum()
32 reg = e->reg + (TEGRA210_XBAR_PART1_RX * i); in tegra_ahub_get_value_enum()
34 reg_val &= ahub->soc_data->mask[i]; in tegra_ahub_get_value_enum()
38 (8 * cmpnt->val_bytes * i); in tegra_ahub_get_value_enum()
44 for (i = 0; i < e->items; i++) { in tegra_ahub_get_value_enum()
45 if (bit_pos == e->values[i]) { in tegra_ahub_get_value_enum()
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/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra186.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra186-clock.h>
3 #include <dt-bindings/gpio/tegra186-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/memory/tegra186-mc.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
8 #include <dt-bindings/power/tegra186-powergate.h>
9 #include <dt-bindings/reset/tegra186-reset.h>
10 #include <dt-bindings/thermal/tegra186-bpmp-thermal.h>
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H A Dtegra194.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra194-clock.h>
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
8 #include <dt-bindings/power/tegra194-powergate.h>
9 #include <dt-bindings/reset/tegra194-reset.h>
10 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h>
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H A Dtegra210-p2371-2180.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include "tegra210-p2180.dtsi"
5 #include "tegra210-p2597.dtsi"
9 compatible = "nvidia,p2371-2180", "nvidia,tegra210";
14 hvddio-pex-supply = <&vdd_1v8>;
15 dvddio-pex-supply = <&vdd_pex_1v05>;
16 vddio-pex-ctl-supply = <&vdd_1v8>;
19 phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>,
20 <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>,
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H A Dtegra234.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/clock/tegra234-clock.h>
4 #include <dt-bindings/gpio/tegra234-gpio.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/mailbox/tegra186-hsp.h>
7 #include <dt-bindings/memory/tegra234-mc.h>
8 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
9 #include <dt-bindings/power/tegra234-powergate.h>
10 #include <dt-bindings/reset/tegra234-reset.h>
11 #include <dt-bindings/thermal/tegra234-bpmp-thermal.h>
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H A Dtegra210-p3450-0000.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/gpio-keys.h>
5 #include <dt-bindings/input/linux-event-codes.h>
6 #include <dt-bindings/mfd/max77620.h>
8 #include "tegra210.dtsi"
12 compatible = "nvidia,p3450-0000", "nvidia,tegra210";
22 stdout-path = "serial0:115200n8";
33 hvddio-pex-supply = <&vdd_1v8>;
34 dvddio-pex-supply = <&vdd_pex_1v05>;
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/linux/drivers/spi/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
13 dynamic device discovery; some are even write-only or read-only.
17 chips, analog to digital (and d-to-a) converters, and more.
44 If your system has an master-capable SPI controller (which
56 by providing a high-level interface to send memory-like commands.
66 This enables support for SPI-NAND mode on the Airoha NAND
68 is implemented as a SPI-MEM controller.
107 to a single device like spi-nor (nvram), input device controller
166 supports spi-mem interface.
245 this code to manage the per-word or per-transfer accesses to the
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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