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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dnvidia,tegra210-pinmux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra210-pinmux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra210 Pinmux Controller
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 const: nvidia,tegra210-pinmux
19 - description: APB_MISC_GP_*_PADCTRL register (pad control)
20 - description: PINMUX_AUX_* registers (pinmux)
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H A Dnvidia,tegra124-xusb-padctl.txt7 needed for USB. For the new binding, see ../phy/nvidia,tegra-xusb-padctl.txt.
14 This document defines the device-specific binding for the XUSB pad controller.
16 Refer to pinctrl-bindings.txt in this directory for generic information about
17 pin controller device tree bindings and ../phy/phy-bindings.txt for details on
21 --------------------
22 - compatible: For Tegra124, must contain "nvidia,tegra124-xusb-padctl".
23 Otherwise, must contain '"nvidia,<chip>-xusb-padctl",
24 "nvidia-tegra124-xusb-padctl"', where <chip> is tegra132 or tegra210.
25 - reg: Physical base address and length of the controller's registers.
26 - resets: Must contain an entry for each entry in reset-names.
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/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra210.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra210-car.h>
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/memory/tegra210-mc.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/reset/tegra210-car.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/thermal/tegra124-soctherm.h>
10 #include <dt-bindings/soc/tegra-pmc.h>
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H A Dtegra194.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra194-clock.h>
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
8 #include <dt-bindings/power/tegra194-powergate.h>
9 #include <dt-bindings/reset/tegra194-reset.h>
10 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h>
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H A Dtegra186.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra186-clock.h>
3 #include <dt-bindings/gpio/tegra186-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/memory/tegra186-mc.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
8 #include <dt-bindings/power/tegra186-powergate.h>
9 #include <dt-bindings/reset/tegra186-reset.h>
10 #include <dt-bindings/thermal/tegra186-bpmp-thermal.h>
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H A Dtegra210-p2180.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/mfd/max77620.h>
4 #include "tegra210.dtsi"
8 compatible = "nvidia,p2180", "nvidia,tegra210";
18 stdout-path = "serial0:115200n8";
27 vdd-supply = <&vdd_gpu>;
33 /delete-property/ dmas;
34 /delete-property/ dma-names;
39 /delete-property/ reg-shift;
41 compatible = "nvidia,tegra30-hsuart";
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H A Dtegra234.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/clock/tegra234-clock.h>
4 #include <dt-bindings/gpio/tegra234-gpio.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/mailbox/tegra186-hsp.h>
7 #include <dt-bindings/memory/tegra234-mc.h>
8 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
9 #include <dt-bindings/power/tegra234-powergate.h>
10 #include <dt-bindings/reset/tegra234-reset.h>
11 #include <dt-bindings/thermal/tegra234-bpmp-thermal.h>
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H A Dtegra210-p3450-0000.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/gpio-keys.h>
5 #include <dt-bindings/input/linux-event-codes.h>
6 #include <dt-bindings/mfd/max77620.h>
8 #include "tegra210.dtsi"
12 compatible = "nvidia,p3450-0000", "nvidia,tegra210";
22 stdout-path = "serial0:115200n8";
33 hvddio-pex-supply = <&vdd_1v8>;
34 dvddio-pex-supply = <&vdd_pex_1v05>;
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H A Dtegra210-p2571.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
5 #include "tegra210-p2530.dtsi"
8 model = "NVIDIA Tegra210 P2571 reference design";
9 compatible = "nvidia,p2571", "nvidia,tegra210";
11 pinmux: pinmux@700008d4 { label
12 pinctrl-names = "boot";
13 pinctrl-0 = <&state_boot>;
15 state_boot: pinmux {
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H A Dtegra210-p2595.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
6 model = "NVIDIA Tegra210 P2595 I/O board";
7 compatible = "nvidia,p2595", "nvidia,tegra210";
9 pinmux: pinmux@700008d4 { label
10 pinctrl-names = "boot";
11 pinctrl-0 = <&state_boot>;
13 state_boot: pinmux {
19 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
20 nvidia,open-drain = <TEGRA_PIN_DISABLE>;
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H A Dtegra210-p2597.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/gpio/tegra-gpio.h>
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
8 model = "NVIDIA Tegra210 P2597 I/O board";
9 compatible = "nvidia,p2597", "nvidia,tegra210";
23 avdd-dsi-csi-supply = <&vdd_dsi_csi>;
33 avdd-io-hdmi-dp-supply = <&avdd_1v05>;
34 vdd-hdmi-dp-pll-supply = <&vdd_1v8>;
35 hdmi-supply = <&vdd_hdmi>;
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H A Dtegra210-p2894.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/input/gpio-keys.h>
5 #include <dt-bindings/mfd/max77620.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
7 #include "tegra210.dtsi"
16 stdout-path = "serial0:115200n8";
24 pinmux: pinmux@700008d4 { label
26 pinctrl-names = "boot";
27 pinctrl-0 = <&state_boot>;
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/linux/Documentation/devicetree/bindings/soc/tegra/
H A Dnvidia,tegra20-pmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/tegra/nvidia,tegra20-pmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jonathan Hunter <jonathanh@nvidia.com>
16 - nvidia,tegra20-pmc
17 - nvidia,tegra30-pmc
18 - nvidia,tegra114-pmc
19 - nvidia,tegra124-pmc
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/linux/Documentation/devicetree/bindings/display/tegra/
H A Dnvidia,tegra124-dpaux.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-dpaux.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
24 pattern: "^dpaux@[0-9a-f]+$"
28 - enum:
29 - nvidia,tegra124-dpaux
30 - nvidia,tegra210-dpaux
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/linux/Documentation/devicetree/bindings/clock/
H A Dnvidia,tegra124-dfll.txt4 Documentation/devicetree/bindings/clock/clock-bindings.txt
7 the fast CPU cluster. It consists of a free-running voltage controlled
10 communicating with an off-chip PMIC either via an I2C bus or via PWM signals.
13 - compatible : should be one of:
14 - "nvidia,tegra124-dfll": for Tegra124
15 - "nvidia,tegra210-dfll": for Tegra210
16 - reg : Defines the following set of registers, in the order listed:
17 - registers for the DFLL control logic.
18 - registers for the I2C output logic.
19 - registers for the integrated I2C master controller.
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/linux/drivers/pinctrl/tegra/
H A Dpinctrl-tegra210.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Pinctrl data for the NVIDIA Tegra210 pinmux
12 #include <linux/pinctrl/pinmux.h>
14 #include "pinctrl-tegra.h"
17 * Most pins affected by the pinmux can also be GPIOs. Define these first.
177 /* All non-GPIO pins follow */
181 /* Non-GPIO pins */
1269 #define DRV_PINGROUP_REG(r) ((r) - DRV_PINGROUP_REG_A)
1270 #define PINGROUP_REG(r) ((r) - PINGROUP_REG_A)
1273 #define PINGROUP_BIT_N(b) (-1)
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/linux/drivers/soc/tegra/
H A Dpmc.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (c) 2018-2024, NVIDIA CORPORATION. All rights reserved.
12 #define pr_fmt(fmt) "tegra-pmc: " fmt
14 #include <linux/arm-smccc.h>
16 #include <linux/clk-provider.h>
18 #include <linux/clk/clk-conf.h>
37 #include <linux/pinctrl/pinconf-generic.h>
57 #include <dt-bindings/interrupt-controller/arm-gic.h>
58 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
59 #include <dt-bindings/gpio/tegra186-gpio.h>
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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