/freebsd/sys/contrib/device-tree/Bindings/sound/ |
H A D | nvidia,tegra30-hda.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/sound/nvidia,tegra30-hda.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NVIDIA Tegra HDA controller 10 The High Definition Audio (HDA) block provides a serial interface to 14 - Thierry Reding <treding@nvidia.com> 15 - Jon Hunter <jonathanh@nvidia.com> 19 pattern: "^hda@[0-9a-f]*$" 23 - const: nvidia,tegra30-hda [all …]
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H A D | nvidia,tegra30-hda.txt | 1 NVIDIA Tegra30 HDA controller 4 - compatible : For Tegra30, must contain "nvidia,tegra30-hda". Otherwise, 5 must contain '"nvidia,<chip>-hda", "nvidia,tegra30-hda"', where <chip> is 6 tegra114, tegra124, or tegra132. 7 - reg : Should contain the HDA registers location and length. 8 - interrupts : The interrupt from the HDA controller. 9 - clocks : Must contain an entry for each required entry in clock-names. 10 See ../clocks/clock-bindings.txt for details. 11 - clock-names : Must include the following entries: hda, hda2hdmi, hda2codec_2x 12 - resets : Must contain an entry for each entry in reset-names. [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/nvidia/ |
H A D | tegra132.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/tegra124-car.h> 3 #include <dt-bindings/gpio/tegra-gpio.h> 4 #include <dt-bindings/memory/tegra124 [all...] |
H A D | tegra210.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/tegra210-car.h> 3 #include <dt-bindings/gpio/tegra-gpio.h> 4 #include <dt-bindings/memory/tegra210-mc.h> 5 #include <dt-binding [all...] |
/freebsd/sys/contrib/device-tree/src/arm/nvidia/ |
H A D | tegra124.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/tegra124-car.h> 3 #include <dt-bindings/gpio/tegra-gpio.h> 4 #include <dt-bindings/memory/tegra124 [all...] |
H A D | tegra124-apalis-v1.2-eval.dts | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 3 * Copyright 2016-2018 Toradex AG 6 /dts-v1/; 8 #include <dt-bindings/input/input.h> 9 #include "tegra124-apalis-v1.2.dtsi" 13 compatible = "toradex,apalis-tk [all...] |
H A D | tegra124-apalis-eval.dts | 1 // SPDX-License-Identifier: GPL-2.0 OR X11 3 * Copyright 2016-2019 Toradex AG 6 /dts-v1/; 8 #include <dt-bindings/input/input.h> 9 #include "tegra124-apalis.dtsi" 13 compatible = "toradex,apalis-tk1-eva [all...] |
H A D | tegra124-apalis-v1.2.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 3 * Copyright 2016-2018 Toradex AG 6 #include "tegra124.dtsi" 7 #include "tegra124-apalis-emc.dtsi" 21 avddio-pex-suppl [all...] |
H A D | tegra124-apalis.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR X11 3 * Copyright 2016-2019 Toradex AG 6 #include "tegra124.dtsi" 7 #include "tegra124-apalis-emc.dtsi" 20 avddio-pex-suppl [all...] |
H A D | tegra124-jetson-tk1.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 5 #include "tegra124.dtsi" 7 #include "tegra124-jetson-tk1-em [all...] |
H A D | tegra124-venice2.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 5 #include "tegra124.dtsi" 8 model = "NVIDIA Tegra124 Venice2"; 9 compatible = "nvidia,venice2", "nvidia,tegra124"; 18 stdout-path = "serial0:115200n8"; 29 vdd-suppl [all...] |
H A D | tegra124-nyan.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/input/input.h> 3 #include <dt-bindings/thermal/thermal.h> 4 #include "tegra124.dtsi" 14 stdout-path = "serial0:115200n8"; 20 * missing a unit-address. However, the bootloader on these Chromebook 22 * Adding the unit-address causes the bootloader to create a /memory 34 /delete-nod [all...] |
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/ |
H A D | nvidia,tegra124-pinmux.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/nvidia,tegra124 [all...] |
H A D | nvidia,tegra124-pinmux.txt | 1 NVIDIA Tegra124 pinmux controller 3 The Tegra124 pinctrl binding is very similar to the Tegra20 and Tegra30 4 pinctrl binding, as described in nvidia,tegra20-pinmux.txt and 5 nvidia,tegra30-pinmux.txt. In fact, this document assumes that binding as 9 - compatible: For Tegra124, must contain "nvidia,tegra124-pinmux". For 10 Tegra132, must contain '"nvidia,tegra132-pinmux", "nvidia-tegra124-pinmux"'. 11 - reg: Should contain a list of base address and size pairs for: 12 -- first entry - the drive strength and pad control registers. 13 -- second entry - the pinmux registers 14 -- third entry - the MIPI_PAD_CTRL register [all …]
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/freebsd/sys/arm/nvidia/tegra124/ |
H A D | tegra124_car.c | 1 /*- 50 #include <dt-bindings/clock/tegra124-car.h> 57 {"nvidia,tegra124-car", 1}, 319 /* tegra124 only*/ 322 {"hda", "pllP_out0", 102000000, 0}, 332 rv = clknode_div_register(sc->clkdom, clks + i); in init_divs() 344 rv = clknode_gate_register(sc->clkdom, clks + i); in init_gates() 356 rv = clknode_mux_register(sc->clkdom, clks + i); in init_muxes() 370 CLKDEV_READ_4(sc->dev, OSC_CTRL, &val); in init_fixeds() 375 rv = clknode_fixed_register(sc->clkdom, &fixed_clk_m); in init_fixeds() [all …]
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H A D | tegra124_clk_per.c | 1 /*- 38 #include <dt-bindings/clock/tegra124-car.h> 213 /* bank L -> 0-31 */ 241 /* bank H -> 32-63 */ 270 /* bank U -> 64-95 */ 299 /* bank V -> 96-127 */ 323 GATE(HDA, "hda", "pc_hda", V(29)), 325 /* bank W -> 128-159*/ 354 /* bank X -> 160-191*/ 553 if (sc->flags & DCF_HAVE_ENA) in periph_init() [all …]
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/freebsd/sys/arm/nvidia/ |
H A D | tegra_pinmux.c | 1 /*- 78 {"nvidia,tegra124-pinmux", 1}, 109 {"nvidia,enable-input", PROP_ID_ENABLE_INPUT}, 110 {"nvidia,open-drain", PROP_ID_OPEN_DRAIN}, 112 {"nvidia,io-reset", PROP_ID_IORESET}, 113 {"nvidia,rcv-sel", PROP_ID_RCV_SEL}, 114 {"nvidia,high-speed-mode", PROP_ID_HIGH_SPEED_MODE}, 116 {"nvidia,low-power-mode", PROP_ID_LOW_POWER_MODE}, 117 {"nvidia,pull-down-strength", PROP_ID_DRIVE_DOWN_STRENGTH}, 118 {"nvidia,pull-up-strength", PROP_ID_DRIVE_UP_STRENGTH}, [all …]
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/freebsd/sys/dev/sound/pci/hda/ |
H A D | hdacc.c | 1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 6 * Copyright (c) 2008-2012 Alexander Motin <mav@FreeBSD.org> 43 #include <dev/sound/pci/hda/hda_reg.h> 44 #include <dev/sound/pci/hda/hdac.h> 63 #define hdacc_lock(codec) snd_mtxlock((codec)->lock) 64 #define hdacc_unlock(codec) snd_mtxunlock((codec)->lock) 65 #define hdacc_lockassert(codec) snd_mtxassert((codec)->lock) 67 MALLOC_DEFINE(M_HDACC, "hdacc", "HDA CODEC"); 122 { HDA_CODEC_ALC660, 0, "Realtek ALC660-VD" }, [all …]
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/freebsd/sys/arm/nvidia/drm2/ |
H A D | tegra_hdmi.c | 1 /*- 58 #define WR4(_sc, _r, _v) bus_write_4((_sc)->mem_res, 4 * (_r), (_v)) 59 #define RD4(_sc, _r) bus_read_4((_sc)->mem_res, 4 * (_r)) 61 /* HDA stream format verb. */ 205 {"nvidia,tegra124-hdmi", 1}, 225 return -EINVAL; in drm_hdmi_avi_infoframe_from_display_mode() 231 if (mode->flags & DRM_MODE_FLAG_DBLCLK) in drm_hdmi_avi_infoframe_from_display_mode() 232 frame->pixel_repeat = 1; in drm_hdmi_avi_infoframe_from_display_mode() 234 frame->video_code = drm_match_cea_mode(mode); in drm_hdmi_avi_infoframe_from_display_mode() 236 frame->picture_aspect = HDMI_PICTURE_ASPECT_NONE; in drm_hdmi_avi_infoframe_from_display_mode() [all …]
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