Lines Matching +full:tegra124 +full:- +full:hda
1 /*-
78 {"nvidia,tegra124-pinmux", 1},
109 {"nvidia,enable-input", PROP_ID_ENABLE_INPUT},
110 {"nvidia,open-drain", PROP_ID_OPEN_DRAIN},
112 {"nvidia,io-reset", PROP_ID_IORESET},
113 {"nvidia,rcv-sel", PROP_ID_RCV_SEL},
114 {"nvidia,high-speed-mode", PROP_ID_HIGH_SPEED_MODE},
116 {"nvidia,low-power-mode", PROP_ID_LOW_POWER_MODE},
117 {"nvidia,pull-down-strength", PROP_ID_DRIVE_DOWN_STRENGTH},
118 {"nvidia,pull-up-strength", PROP_ID_DRIVE_UP_STRENGTH},
119 {"nvidia,slew-rate-falling", PROP_ID_SLEW_RATE_FALLING},
120 {"nvidia,slew-rate-rising", PROP_ID_SLEW_RATE_RISING},
121 {"nvidia,drive-type", PROP_ID_DRIVE_TYPE},
184 .gpio_num = -1, \
333 GMUX(0x338, N, 0, dap1_fs_pn0, i2s0, hda, gmi, rsvd4),
334 GMUX(0x33C, N, 1, dap1_din_pn1, i2s0, hda, gmi, rsvd4),
335 GMUX(0x340, N, 2, dap1_dout_pn2, i2s0, hda, gmi, sata),
336 GMUX(0x344, N, 3, dap1_sclk_pn3, i2s0, hda, gmi, rsvd4),
341 GMUX(0x358, A, 2, dap2_fs_pa2, i2s1, hda, gmi, rsvd4),
342 GMUX(0x35C, A, 4, dap2_din_pa4, i2s1, hda, gmi, rsvd4),
343 GMUX(0x360, A, 5, dap2_dout_pa5, i2s1, hda, gmi, rsvd4),
344 GMUX(0x364, A, 3, dap2_sclk_pa3, i2s1, hda, gmi, rsvd4),
394 .reg = r - 0x868, \
396 .drvdn_mask = (1 << dn_w) - 1, \
398 .drvup_mask = (1 << dn_w) - 1, \
438 GRP(0x9A8, ao3, 12, 5, -1, 0),
440 GRP(0x9B4, hv0, 12, 5, -1, 0),
475 if (strcmp(fnc_name, mux->functions[i]) == 0) in pinmux_mux_function()
478 return (-1); in pinmux_mux_function()
488 reg = bus_read_4(sc->mux_mem_res, mux->reg); in pinmux_config_mux()
490 if (cfg->function != NULL) { in pinmux_config_mux()
491 tmp = pinmux_mux_function(mux, cfg->function); in pinmux_config_mux()
492 if (tmp == -1) { in pinmux_config_mux()
493 device_printf(sc->dev, in pinmux_config_mux()
494 "Unknown function %s for pin %s\n", cfg->function, in pinmux_config_mux()
502 if (cfg->params[PROP_ID_PULL] != -1) { in pinmux_config_mux()
504 reg |= (cfg->params[PROP_ID_PULL] & TEGRA_MUX_PUPD_MASK) << in pinmux_config_mux()
507 if (cfg->params[PROP_ID_TRISTATE] != -1) { in pinmux_config_mux()
509 reg |= (cfg->params[PROP_ID_TRISTATE] & 1) << in pinmux_config_mux()
512 if (cfg->params[TEGRA_MUX_ENABLE_INPUT_SHIFT] != -1) { in pinmux_config_mux()
514 reg |= (cfg->params[TEGRA_MUX_ENABLE_INPUT_SHIFT] & 1) << in pinmux_config_mux()
517 if (cfg->params[PROP_ID_ENABLE_INPUT] != -1) { in pinmux_config_mux()
519 reg |= (cfg->params[PROP_ID_ENABLE_INPUT] & 1) << in pinmux_config_mux()
522 if (cfg->params[PROP_ID_ENABLE_INPUT] != -1) { in pinmux_config_mux()
524 reg |= (cfg->params[PROP_ID_OPEN_DRAIN] & 1) << in pinmux_config_mux()
527 if (cfg->params[PROP_ID_LOCK] != -1) { in pinmux_config_mux()
529 reg |= (cfg->params[PROP_ID_LOCK] & 1) << in pinmux_config_mux()
532 if (cfg->params[PROP_ID_IORESET] != -1) { in pinmux_config_mux()
534 reg |= (cfg->params[PROP_ID_IORESET] & 1) << in pinmux_config_mux()
537 if (cfg->params[PROP_ID_RCV_SEL] != -1) { in pinmux_config_mux()
539 reg |= (cfg->params[PROP_ID_RCV_SEL] & 1) << in pinmux_config_mux()
542 bus_write_4(sc->mux_mem_res, mux->reg, reg); in pinmux_config_mux()
552 reg = bus_read_4(sc->pad_mem_res, grp->reg); in pinmux_config_grp()
554 if (cfg->params[PROP_ID_HIGH_SPEED_MODE] != -1) { in pinmux_config_grp()
556 reg |= (cfg->params[PROP_ID_HIGH_SPEED_MODE] & 1) << in pinmux_config_grp()
559 if (cfg->params[PROP_ID_SCHMITT] != -1) { in pinmux_config_grp()
561 reg |= (cfg->params[PROP_ID_SCHMITT] & 1) << in pinmux_config_grp()
564 if (cfg->params[PROP_ID_DRIVE_TYPE] != -1) { in pinmux_config_grp()
566 reg |= (cfg->params[PROP_ID_DRIVE_TYPE] & in pinmux_config_grp()
569 if (cfg->params[PROP_ID_SLEW_RATE_RISING] != -1) { in pinmux_config_grp()
572 reg |= (cfg->params[PROP_ID_SLEW_RATE_RISING] & in pinmux_config_grp()
576 if (cfg->params[PROP_ID_SLEW_RATE_FALLING] != -1) { in pinmux_config_grp()
579 reg |= (cfg->params[PROP_ID_SLEW_RATE_FALLING] & in pinmux_config_grp()
583 if ((cfg->params[PROP_ID_DRIVE_DOWN_STRENGTH] != -1) && in pinmux_config_grp()
584 (grp->drvdn_mask != -1)) { in pinmux_config_grp()
585 reg &= ~(grp->drvdn_shift << grp->drvdn_mask); in pinmux_config_grp()
586 reg |= (cfg->params[PROP_ID_DRIVE_DOWN_STRENGTH] & in pinmux_config_grp()
587 grp->drvdn_mask) << grp->drvdn_shift; in pinmux_config_grp()
589 if ((cfg->params[PROP_ID_DRIVE_UP_STRENGTH] != -1) && in pinmux_config_grp()
590 (grp->drvup_mask != -1)) { in pinmux_config_grp()
591 reg &= ~(grp->drvup_shift << grp->drvup_mask); in pinmux_config_grp()
592 reg |= (cfg->params[PROP_ID_DRIVE_UP_STRENGTH] & in pinmux_config_grp()
593 grp->drvup_mask) << grp->drvup_shift; in pinmux_config_grp()
595 bus_write_4(sc->pad_mem_res, grp->reg, reg); in pinmux_config_grp()
609 if (cfg->function == NULL) { in pinmux_config_node()
613 reg = bus_read_4(sc->mipi_mem_res, 0); /* register 0x820 */ in pinmux_config_node()
614 if (strcmp(cfg->function, "csi") == 0) in pinmux_config_node()
616 else if (strcmp(cfg->function, "dsi_b") == 0) in pinmux_config_node()
618 bus_write_4(sc->mipi_mem_res, 0, reg); /* register 0x820 */ in pinmux_config_node()
624 if (mux->gpio_num != -1) { in pinmux_config_node()
638 device_printf(sc->dev, "Unknown pin: %s\n", pin_name); in pinmux_config_node()
654 (void **)&cfg->function); in pinmux_read_node()
656 cfg->function = NULL; in pinmux_read_node()
660 rv = OF_getencprop(node, prop_names[i].name, &cfg->params[i], in pinmux_read_node()
661 sizeof(cfg->params[i])); in pinmux_read_node()
663 cfg->params[i] = -1; in pinmux_read_node()
685 device_printf(sc->dev, in pinmux_process_node()
722 if (!ofw_bus_search_compatible(dev, compat_data)->ocd_data) in pinmux_probe()
744 sc->dev = dev; in pinmux_attach()
747 sc->pad_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, in pinmux_attach()
749 if (sc->pad_mem_res == NULL) { in pinmux_attach()
755 sc->mux_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, in pinmux_attach()
757 if (sc->mux_mem_res == NULL) { in pinmux_attach()
763 sc->mipi_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, in pinmux_attach()
765 if (sc->mipi_mem_res == NULL) { in pinmux_attach()