/freebsd/sys/contrib/device-tree/src/arm/renesas/ |
H A D | r9a06g032.dtsi | 10 #include <dt-bindings/clock/r9a06g032-sysctrl.h> 25 clocks = <&sysctrl R9A06G032_CLK_A7MP>; 32 clocks = <&sysctrl R9A06G032_CLK_A7MP>; 76 clocks = <&sysctrl R9A06G032_HCLK_RTC>; 78 power-domains = <&sysctrl>; 86 clocks = <&sysctrl R9A06G032_CLK_WATCHDOG>; 94 clocks = <&sysctrl R9A06G032_CLK_WATCHDOG>; 98 sysctrl: system-controller@4000c000 { label 99 compatible = "renesas,r9a06g032-sysctrl"; 125 clocks = <&sysctrl R9A06G032_HCLK_USBF>, [all …]
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/freebsd/sys/contrib/device-tree/Bindings/arm/hisilicon/controller/ |
H A D | sysctrl.yaml | 4 $id: http://devicetree.org/schemas/arm/hisilicon/controller/sysctrl.yaml# 23 Hisilicon system controller --> hisilicon,sysctrl 24 HiP01 system controller --> hisilicon,hip01-sysctrl 25 Hi6220 system controller --> hisilicon,hi6220-sysctrl 26 Hi3519 system controller --> hisilicon,hi3519-sysctrl 33 const: hisilicon,hi6220-sysctrl 43 - hisilicon,sysctrl 44 - hisilicon,hi6220-sysctrl 45 - hisilicon,hi3519-sysctrl 48 - const: hisilicon,hip01-sysctrl [all...] |
/freebsd/sys/contrib/device-tree/Bindings/soc/socionext/ |
H A D | socionext,uniphier-sysctrl.yaml | 4 $id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-sysctrl.yaml# 21 - socionext,uniphier-ld4-sysctrl 22 - socionext,uniphier-pro4-sysctrl 23 - socionext,uniphier-pro5-sysctrl 24 - socionext,uniphier-pxs2-sysctrl 25 - socionext,uniphier-sld8-sysctrl 26 - socionext,uniphier-ld11-sysctrl 27 - socionext,uniphier-ld20-sysctrl 28 - socionext,uniphier-pxs3-sysctrl 29 - socionext,uniphier-nx1-sysctrl [all …]
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/freebsd/sys/contrib/device-tree/Bindings/clock/ |
H A D | renesas,r9a06g032-sysctrl.txt | 1 * Renesas R9A06G032 SYSCTRL 6 - "renesas,r9a06g032-sysctrl" 7 - reg: Base address and length of the SYSCTRL IO block. 21 - SYSCTRL node: 23 sysctrl: system-controller@4000c000 { 24 compatible = "renesas,r9a06g032-sysctrl"; 34 - Other nodes can use the clocks provided by SYSCTRL as in: 36 #include <dt-bindings/clock/r9a06g032-sysctrl.h> 43 clocks = <&sysctrl R9A06G032_CLK_UART0>, <&sysctrl R9A06G032_HCLK_UART0>; 45 power-domains = <&sysctrl>;
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H A D | amlogic,gxbb-clkc.txt | 27 - compatible: "syscon", "simple-mfd, and "amlogic,meson-gx-hhi-sysctrl" or 28 "amlogic,meson-axg-hhi-sysctrl" 33 sysctrl: system-controller@0 { 34 compatible = "amlogic,meson-gx-hhi-sysctrl", "syscon", "simple-mfd";
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H A D | renesas,r9a06g032-sysctrl.yaml | 4 $id: http://devicetree.org/schemas/clock/renesas,r9a06g032-sysctrl.yaml# 15 const: renesas,r9a06g032-sysctrl 65 sysctrl: system-controller@4000c000 { 66 compatible = "renesas,r9a06g032-sysctrl";
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/freebsd/sys/contrib/device-tree/Bindings/arm/ |
H A D | zte,sysctrl.txt | 1 ZTE sysctrl Registers 6 - compatible = "zte,sysctrl" 18 - compatible = "zte,zx296718-aon-sysctrl" 19 - compatible = "zte,zx296718-sysctrl" 22 aon_sysctrl: aon-sysctrl@116000 { 23 compatible = "zte,zx296718-aon-sysctrl", "syscon"; 27 sysctrl: sysctrl@1463000 { 28 compatible = "zte,zx296718-sysctrl", "syscon";
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/freebsd/sys/contrib/device-tree/Bindings/sound/ |
H A D | zte,tdm.txt | 13 - zte,tdm-dma-sysctrl : Reference to the sysctrl controller controlling 15 phandle of sysctrl. 16 register offset in sysctrl for control dma. 17 mask of the register that be written to sysctrl. 29 zte,tdm-dma-sysctrl = <&sysctrl 0x10c 4>;
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H A D | hisilicon,hi6210-i2s.txt | 18 - hisilicon,sysctrl-syscon: phandle to sysctrl syscon 36 hisilicon,sysctrl-syscon = <&sys_ctrl>;
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/freebsd/sys/contrib/device-tree/Bindings/arm/hisilicon/ |
H A D | hisilicon.txt | 62 - compatible : "hisilicon,sysctrl" 66 - smp-offset : offset in sysctrl for notifying slave cpu booting 71 - resume-offset : offset in sysctrl for notifying cpu0 when resume 72 - reboot-offset : offset in sysctrl for system reboot 77 sysctrl: system-controller@fc802000 { 78 compatible = "hisilicon,sysctrl"; 112 - compatible : "hisilicon,hi6220-sysctrl" 124 compatible = "hisilicon,hi6220-sysctrl", "syscon"; 211 - compatible : "hisilicon,hip01-sysctrl" 222 sysctrl: system-controller@10000000 { [all …]
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H A D | hi3519-sysctrl.txt | 7 - compatible: "hisilicon,hi3519-sysctrl". 11 sysctrl: system-controller@12010000 { 12 compatible = "hisilicon,hi3519-sysctrl", "syscon";
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/freebsd/sys/contrib/device-tree/Bindings/power/ |
H A D | amlogic,meson-gx-pwrc.txt | 23 - amlogic,hhi-sysctrl: phandle to the HHI sysctrl node 31 - compatible: "amlogic,meson-gx-ao-sysctrl", "syscon", "simple-mfd" 38 compatible = "amlogic,meson-gx-ao-sysctrl", "syscon", "simple-mfd"; 44 amlogic,hhi-sysctrl = <&sysctrl>;
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H A D | amlogic,meson-ee-pwrc.yaml | 18 "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon" 55 amlogic,ao-sysctrl: 56 description: phandle to the AO sysctrl node 158 - amlogic,ao-sysctrl 167 amlogic,ao-sysctrl = <&rti>;
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/freebsd/sys/contrib/device-tree/Bindings/net/pcs/ |
H A D | renesas,rzn1-miic.yaml | 132 #include <dt-bindings/clock/r9a06g032-sysctrl.h> 139 clocks = <&sysctrl R9A06G032_CLK_MII_REF>, 140 <&sysctrl R9A06G032_CLK_RGMII_REF>, 141 <&sysctrl R9A06G032_CLK_RMII_REF>, 142 <&sysctrl R9A06G032_HCLK_SWITCH_RG>; 145 power-domains = <&sysctrl>;
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/freebsd/sys/contrib/device-tree/Bindings/display/ |
H A D | zte,vou.txt | 57 - zte,tvenc-power-control: the phandle to SYSCTRL block followed by two 58 integer cells. The first cell is the offset of SYSCTRL register used 69 - zte,vga-power-control: the phandle to SYSCTRL block followed by two 70 integer cells. The first cell is the offset of SYSCTRL register used 102 zte,vga-power-control = <&sysctrl 0x170 0xe0>; 118 zte,tvenc-power-control = <&sysctrl 0x170 0x10>;
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/freebsd/sys/contrib/device-tree/Bindings/watchdog/ |
H A D | zte,zx2967-wdt.txt | 15 - zte,wdt-reset-sysctrl : Directs how to reset system by the watchdog. 19 * phandle of aon-sysctrl. 21 * configure value that be written to aon-sysctrl. 31 zte,wdt-reset-sysctrl = <&aon_sysctrl 0xb0 1 0x115>;
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/freebsd/sys/contrib/device-tree/Bindings/mtd/ |
H A D | renesas-nandc.yaml | 55 #include <dt-bindings/clock/r9a06g032-sysctrl.h> 61 clocks = <&sysctrl R9A06G032_HCLK_NAND>, <&sysctrl R9A06G032_CLK_NAND>; 63 power-domains = <&sysctrl>;
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/freebsd/sys/contrib/device-tree/Bindings/usb/ |
H A D | renesas,rzn1-usbf.yaml | 57 #include <dt-bindings/clock/r9a06g032-sysctrl.h> 64 clocks = <&sysctrl R9A06G032_HCLK_USBF>, 65 <&sysctrl R9A06G032_HCLK_USBPM>; 67 power-domains = <&sysctrl>;
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/freebsd/sys/contrib/device-tree/Bindings/media/ |
H A D | amlogic,gx-vdec.yaml | 78 amlogic,ao-sysctrl: 79 description: should point to the AOBUS sysctrl node 122 - amlogic,ao-sysctrl 139 amlogic,ao-sysctrl = <&sysctrl_AO>;
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/freebsd/sys/contrib/device-tree/Bindings/net/dsa/ |
H A D | renesas,rzn1-a5psw.yaml | 88 #include <dt-bindings/clock/r9a06g032-sysctrl.h> 94 clocks = <&sysctrl R9A06G032_HCLK_SWITCH>, <&sysctrl R9A06G032_CLK_SWITCH>; 96 power-domains = <&sysctrl>;
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/freebsd/sys/contrib/device-tree/Bindings/iio/adc/ |
H A D | amlogic,meson-saradc.yaml | 55 amlogic,hhi-sysctrl: 105 amlogic,hhi-sysctrl: true 108 amlogic,hhi-sysctrl: false 148 amlogic,hhi-sysctrl = <&hhi>;
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/freebsd/sys/contrib/device-tree/Bindings/rtc/ |
H A D | renesas,rzn1-rtc.yaml | 58 #include <dt-bindings/clock/r9a06g032-sysctrl.h> 66 clocks = <&sysctrl R9A06G032_HCLK_RTC>; 68 power-domains = <&sysctrl>;
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/freebsd/sys/contrib/device-tree/Bindings/net/ |
H A D | renesas,rzn1-gmac.yaml | 45 #include <dt-bindings/clock/r9a06g032-sysctrl.h> 56 clocks = <&sysctrl R9A06G032_HCLK_GMAC0>; 57 power-domains = <&sysctrl>;
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/freebsd/sys/contrib/device-tree/Bindings/net/can/ |
H A D | nxp,sja1000.yaml | 127 #include <dt-bindings/clock/r9a06g032-sysctrl.h> 134 clocks = <&sysctrl R9A06G032_HCLK_CAN0>; 135 power-domains = <&sysctrl>;
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/freebsd/sys/contrib/device-tree/Bindings/reset/ |
H A D | hisilicon,hi6220-reset.txt | 12 - "hisilicon,hi6220-sysctrl", "syscon" : For peripheral reset controller. 21 compatible = "hisilicon,hi6220-sysctrl", "syscon";
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