/linux/Documentation/devicetree/bindings/soc/tegra/ |
H A D | nvidia,tegra20-pmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/soc/tegra/nvidia,tegra20-pmc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jonathan Hunter <jonathanh@nvidia.com> 16 - nvidia,tegra20-pmc 17 - nvidia,tegra30-pmc 18 - nvidia,tegra114-pmc 19 - nvidia,tegra124-pmc [all …]
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/linux/arch/arm64/boot/dts/nvidia/ |
H A D | tegra210-p2180.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/mfd/max77620.h> 17 stdout-path = "serial0:115200n8"; 26 vdd-supply = <&vdd_gpu>; 31 /delete-property/ dmas; 32 /delete-property/ dma-names; 37 /delete-property/ reg-shift; 39 compatible = "nvidia,tegra30-hsuart"; 40 reset-names = "serial"; 43 compatible = "brcm,bcm43540-bt"; [all …]
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H A D | tegra132-norrin.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 18 stdout-path = "serial0:115200n8"; 30 vdd-supply = <&vdd_3v3_hdmi>; 31 pll-supply = <&vdd_hdmi_pll>; 32 hdmi-supply = <&vdd_5v0_hdmi>; 34 nvidia,ddc-i2c-bus = <&hdmi_ddc>; 35 nvidia,hpd-gpio = 42 avdd-io-hdmi-dp-supply = <&vdd_3v3_hdmi>; [all …]
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H A D | tegra210-p3450-0000.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/gpio-keys.h> 5 #include <dt-bindings/input/linux-event-codes.h> 6 #include <dt-bindings/mfd/max77620.h> 12 compatible = "nvidia,p3450-0000", "nvidia,tegra210"; 22 stdout-path = "serial0:115200n8"; 33 hvddio-pex-supply = <&vdd_1v8>; 34 dvddio-pex-supply = <&vdd_pex_1v05>; 35 vddio-pex-ctl-supply = <&vdd_1v8>; [all …]
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H A D | tegra210-p2894.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <dt-bindings/input/input.h> 4 #include <dt-bindings/input/gpio-keys.h> 5 #include <dt-bindings/mfd/max77620.h> 6 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 16 stdout-path = "serial0:115200n8"; 26 pinctrl-names = "boot"; 27 pinctrl-0 = <&state_boot>; 35 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 36 nvidia,open-drain = <TEGRA_PIN_DISABLE>; [all …]
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H A D | tegra210-smaug.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 5 #include <dt-bindings/mfd/max77620.h> 6 #include <dt-bindings/pinctrl/pinctrl-tegra.h> 12 compatible = "google,smaug-rev8", "google,smaug-rev7", 13 "google,smaug-rev6", "google,smaug-rev5", 14 "google,smaug-rev4", "google,smaug-rev3", 15 "google,smaug-rev2", "google,smaug-rev1", 25 stdout-path = "serial0:115200n8"; [all …]
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/linux/arch/arm/boot/dts/nvidia/ |
H A D | tegra114-asus-tf701t.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 /dts-v1/; 5 #include <dt-bindings/input/gpio-keys.h> 6 #include <dt-bindings/input/input.h> 13 chassis-type = "convertible"; 29 trusted-foundations { 30 compatible = "tlm,trusted-foundations"; 31 tlm,version-major = <2>; 32 tlm,version-minor = <8>; 40 reserved-memory { [all …]
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H A D | tegra30-cardhu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/input/input.h> 3 #include <dt-bindings/thermal/thermal.h> 5 #include "tegra30-cpu-opp.dtsi" 6 #include "tegra30-cpu-opp-microvolt.dtsi" 16 * use tegra30-cardhu-a02.dts, Cardhu fab version A04 and later, use 17 * tegra30-cardhu-a04.dts. 20 * The sticker will have number like 600-81291-1000-002 C.3. In this 4th 22 * The (downstream internal) U-Boot of Cardhu display the board-id as 43 stdout-path = "serial0:115200n8"; [all …]
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H A D | tegra124-nyan.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/input/input.h> 3 #include <dt-bindings/thermal/thermal.h> 14 stdout-path = "serial0:115200n8"; 20 * missing a unit-address. However, the bootloader on these Chromebook 22 * Adding the unit-address causes the bootloader to create a /memory 34 /delete-node/ memory@80000000; 40 vdd-supply = <&vdd_3v3_hdmi>; 41 pll-supply = <&vdd_hdmi_pll>; 42 hdmi-supply = <&vdd_5v0_hdmi>; [all …]
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H A D | tegra20-tamonten.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 15 stdout-path = "serial0:115200n8"; 24 vdd-supply = <&hdmi_vdd_reg>; 25 pll-supply = <&hdmi_pll_reg>; 27 nvidia,ddc-i2c-bus = <&hdmi_ddc>; 28 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7) 34 pinctrl-names = "default"; 35 pinctrl-0 = <&state_default>; 252 state_i2cmux_ddc: pinmux-i2cmux-ddc { 263 state_i2cmux_idle: pinmux-i2cmux-idle { [all …]
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H A D | tegra30-apalis-v1.1.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 16 avdd-pexa-supply = <&vdd2_reg>; 17 avdd-pexb-supply = <&vdd2_reg>; 18 avdd-pex-pll-supply = <&vdd2_reg>; 19 avdd-plle-supply = <&ldo6_reg>; 20 hvdd-pex-supply = <®_module_3v3>; 21 vddio-pex-ctl-supply = <®_module_3v3>; 22 vdd-pexa-supply = <&vdd2_reg>; 23 vdd-pexb-supply = <&vdd2_reg>; 27 nvidia,num-lanes = <4>; [all …]
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H A D | tegra30-apalis.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 15 avdd-pexa-supply = <&vdd2_reg>; 16 avdd-pexb-supply = <&vdd2_reg>; 17 avdd-pex-pll-supply = <&vdd2_reg>; 18 avdd-plle-supply = <&ldo6_reg>; 19 hvdd-pex-supply = <®_module_3v3>; 20 vddio-pex-ctl-supply = <®_module_3v3>; 21 vdd-pexa-supply = <&vdd2_reg>; 22 vdd-pexb-supply = <&vdd2_reg>; 26 nvidia,num-lanes = <4>; [all …]
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H A D | tegra20-harmony.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 18 stdout-path = "serial0:115200n8"; 37 hdmi-supply = <&vdd_5v0_hdmi>; 38 vdd-supply = <&hdmi_vdd_reg>; 39 pll-supply = <&hdmi_pll_reg>; 41 nvidia,ddc-i2c-bus = <&hdmi_ddc>; 42 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7) 48 pinctrl-names = "default"; [all …]
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H A D | tegra20-ventana.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 5 #include <dt-bindings/thermal/thermal.h> 7 #include "tegra20-cpu-opp.dtsi" 8 #include "tegra20-cpu-opp-microvolt.dtsi" 21 stdout-path = "serial0:115200n8"; 40 vdd-supply = <&hdmi_vdd_reg>; 41 pll-supply = <&hdmi_pll_reg>; 43 nvidia,ddc-i2c-bus = <&hdmi_ddc>; [all …]
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H A D | tegra20-seaboard.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 18 stdout-path = "serial0:115200n8"; 37 vdd-supply = <&hdmi_vdd_reg>; 38 pll-supply = <&hdmi_pll_reg>; 39 hdmi-supply = <&vdd_hdmi>; 41 nvidia,ddc-i2c-bus = <&hdmi_ddc>; 42 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7) 48 pinctrl-names = "default"; [all …]
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H A D | tegra30-colibri.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 15 nvidia,ddc-i2c-bus = <&hdmi_ddc>; 16 nvidia,hpd-gpio = 18 pll-supply = <®_1v8_avdd_hdmi_pll>; 19 vdd-supply = <®_3v3_avdd_hdmi>; 24 lan-reset-n-hog { 25 gpio-hog; 27 output-high; 28 line-name = "LAN_RESET#"; 33 pinctrl-names = "default"; [all …]
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H A D | tegra114-dalmore.dts | 1 // SPDX-License-Identifier: GPL-2.0 7 /dts-v1/; 9 #include <dt-bindings/input/input.h> 23 stdout-path = "serial0:115200n8"; 34 hdmi-supply = <&vdd_5v0_hdmi>; 35 vdd-supply = <&vdd_hdmi_reg>; 36 pll-supply = <&palmas_smps3_reg>; 38 nvidia,ddc-i2c-bus = <&hdmi_ddc>; 39 nvidia,hpd-gpio = 46 avdd-dsi-csi-supply = <&avdd_1v2_reg>; [all …]
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H A D | tegra20-trimslice.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 5 #include <dt-bindings/leds/common.h> 7 #include "tegra20-cpu-opp.dtsi" 20 stdout-path = "serial0:115200n8"; 31 vdd-supply = <&hdmi_vdd_reg>; 32 pll-supply = <&hdmi_pll_reg>; 34 nvidia,ddc-i2c-bus = <&hdmi_ddc>; 35 nvidia,hpd-gpio = <&gpio TEGRA_GPIO(N, 7) [all …]
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H A D | tegra20-colibri.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 22 nvidia,ddc-i2c-bus = <&hdmi_ddc>; 23 nvidia,hpd-gpio = 25 pll-supply = <®_1v8_avdd_hdmi_pll>; 26 vdd-supply = <®_3v3_avdd_hdmi>; 31 lan-reset-n-hog { 32 gpio-hog; 34 output-high; 35 line-name = "LAN_RESET#"; 38 /* Tri-stating GMI_WR_N on SODIMM pin 99 nPWE */ [all …]
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H A D | tegra30-lg-x3.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <dt-bindings/input/gpio-keys.h> 4 #include <dt-bindings/input/input.h> 5 #include <dt-bindings/leds/common.h> 6 #include <dt-bindings/mfd/max77620.h> 7 #include <dt-bindings/thermal/thermal.h> 10 #include "tegra30-cpu-opp.dtsi" 11 #include "tegra30-cpu-opp-microvolt.dtsi" 14 chassis-type = "handset"; 30 * pre-existing /chosen node to be available to insert the [all …]
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H A D | tegra124-venice2.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 18 stdout-path = "serial0:115200n8"; 29 vdd-supply = <&vdd_3v3_hdmi>; 30 pll-supply = <&vdd_hdmi_pll>; 31 hdmi-supply = <&vdd_5v0_hdmi>; 33 nvidia,ddc-i2c-bus = <&hdmi_ddc>; 34 nvidia,hpd-gpio = 41 avdd-io-hdmi-dp-supply = <&vdd_1v05_run>; [all …]
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H A D | tegra20-paz00.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/input.h> 5 #include <dt-bindings/thermal/thermal.h> 8 #include "tegra20-cpu-opp.dtsi" 9 #include "tegra20-cpu-opp-microvolt.dtsi" 25 stdout-path = "serial0:115200n8"; 44 vdd-supply = <&hdmi_vdd_reg>; 45 pll-supply = <&hdmi_pll_reg>; 47 nvidia,ddc-i2c-bus = <&hdmi_ddc>; [all …]
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H A D | tegra30-asus-transformer-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <dt-bindings/input/gpio-keys.h> 4 #include <dt-bindings/input/input.h> 5 #include <dt-bindings/thermal/thermal.h> 8 #include "tegra30-cpu-opp.dtsi" 9 #include "tegra30-cpu-opp-microvolt.dtsi" 12 chassis-type = "convertible"; 31 * pre-existing /chosen node to be available to insert the 37 trusted-foundations { 38 compatible = "tlm,trusted-foundations"; [all …]
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H A D | tegra20-asus-tf101.dts | 1 // SPDX-License-Identifier: GPL-2.0 2 /dts-v1/; 4 #include <dt-bindings/input/atmel-maxtouch.h> 5 #include <dt-bindings/input/gpio-keys.h> 6 #include <dt-bindings/input/input.h> 7 #include <dt-bindings/thermal/thermal.h> 10 #include "tegra20-cpu-opp.dtsi" 11 #include "tegra20-cpu-opp-microvolt.dtsi" 16 chassis-type = "convertible"; 33 * pre-existing /chosen node to be available to insert the [all …]
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H A D | tegra30-asus-nexus7-grouper-common.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include <dt-bindings/input/gpio-keys.h> 4 #include <dt-bindings/input/input.h> 5 #include <dt-bindings/power/summit,smb347-charger.h> 6 #include <dt-bindings/thermal/thermal.h> 9 #include "tegra30-cpu-opp.dtsi" 10 #include "tegra30-cpu-opp-microvolt.dtsi" 11 #include "tegra30-asus-lvds-display.dtsi" 27 * pre-existing /chosen node to be available to insert the 33 trusted-foundations { [all …]
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