Home
last modified time | relevance | path

Searched +full:switch +full:- +full:frequency +full:- +full:hz (Results 1 – 25 of 156) sorted by relevance

1234567

/freebsd/sys/contrib/device-tree/Bindings/opp/
H A Dopp.txt2 ----------------------------------------------------
4 Devices work at voltage-current-frequency combinations and some implementations
13 Binding 1: operating-points
16 This binding only supports voltage-frequency pairs.
19 - operating-points: An array of 2-tuples items, and each item consists
20 of frequency and voltage like <freq-kHz vol-uV>.
21 freq: clock frequency in kHz
27 compatible = "arm,cortex-a9";
29 next-level-cache = <&L2>;
30 operating-points = <
[all …]
H A Dopp-v2-base.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/opp/opp-v2-base.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Viresh Kumar <viresh.kumar@linaro.org>
13 Devices work at voltage-current-frequency combinations and some implementations
25 pattern: '^opp-table(-[a-z0-9]+)?$'
27 opp-shared:
29 Indicates that device nodes using this OPP Table Node's phandle switch
36 '^opp(-?[0-9]+)*$':
[all …]
/freebsd/contrib/ntp/util/
H A Dkern.c2 * This program simulates a first-order, type-II phase-lock loop using
21 * Phase-lock loop definitions
23 #define HZ 100 /* timer interrupt frequency (Hz) */ macro
25 #define MAXFREQ 200 /* max frequency error (ppm) */
26 #define TAU 2 /* time constant (shift 0 - 6) */
45 * Phase-lock loop variables
50 long time_tolerance = MAXFREQ; /* frequency tolerance (ppm) */
51 long time_precision = 1000000 / HZ; /* clock precision (us) */
55 long time_freq = 0; /* frequency offset (scaled ppm) */
56 long time_adj = 0; /* tick adjust (scaled 1 / HZ) */
[all …]
H A Dtg.c6 * broadcast timecode. Alternatively, it can generate the IRIG-B
18 * by the intrinsic frequency error of the codec sample clock, which can
24 * over the range 0-255. The signal generator by default uses WWV
26 * switches to IRIG-B format.
42 * the transmissionorder is low-order first as the frame is processed
44 * For IRIG the on-time marker M preceeds the first (units) bit, so its
64 #define SECOND 8000 /* one second of 125-us samples */
68 #define IRIG 1 /* IRIG-B encoder */
82 int c3000[] = {1, 48, 63, 70, 78, 82, 85, 89, 92, 94, /* 0-9 */
83 96, 98, 99, 100, 101, 101, 102, 103, 103, 103, /* 10-19 */
[all …]
H A Dtg2.c6 * broadcast timecode. Alternatively, it can generate the IRIG-B
18 * by the intrinsic frequency error of the codec sample clock, which can
24 * over the range 0-255. The signal generator by default uses WWV
26 * switches to IRIG-B format.
42 * the transmissionorder is low-order first as the frame is processed
44 * For IRIG the on-time marker M preceeds the first (units) bit, so its
54 * v0.23 2007-02-12 dmw:
55 * - Changed statistics to include calculated error
56 * of frequency, based on number of added or removed
60 * v0.22 2007-02-08 dmw:
[all …]
/freebsd/usr.bin/beep/
H A Dbeep.c1 /*-
40 #define SAMPLE_RATE_DEF 48000 /* hz */
41 #define SAMPLE_RATE_MAX 48000 /* hz */
42 #define SAMPLE_RATE_MIN 8000 /* hz */
58 static int frequency = DEFAULT_HZ; variable
71 * The return value is in the range [-1.0f .. 1.0f]
81 switch (x) { in wave_function_16()
92 return (-1.0f); in wave_function_16()
100 x ^= (mask - 1); in wave_function_16()
117 retval = (1.0f - retval) / 2.0f; in wave_function_16()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Dqcom-rpm.txt8 - compatible:
12 "qcom,rpm-apq8064"
13 "qcom,rpm-msm8660"
14 "qcom,rpm-msm8960"
15 "qcom,rpm-ipq8064"
16 "qcom,rpm-mdm9615"
18 - reg:
20 Value type: <prop-encoded-array>
23 - interrupts:
25 Value type: <prop-encoded-array>
[all …]
/freebsd/sys/dev/bhnd/cores/chipc/pwrctl/
H A Dbhnd_pwrctl_subr.c1 /*-
7 * Asus RT-N16 firmware source code release.
21 * $Id: siutils.c,v 1.821.2.48 2011-02-11 20:59:28 Exp $
54 switch (x) { in bhnd_pwrctl_factor6()
85 switch (pll_type) { in bhnd_pwrctl_si_clkreg_m()
96 * Calculate the backplane clock speed (in Hz) for a given a set of clock
133 switch (pll_type) { in bhnd_pwrctl_cpu_clkreg_m()
147 if (cid->chip_id == BHND_CHIPID_BCM5365) { in bhnd_pwrctl_cpu_clkreg_m()
162 * Calculate the CPU clock speed (in Hz) for a given a set of clock control
181 * Calculate the clock speed (in Hz) for a given a set of clockcontrol
[all …]
/freebsd/sys/contrib/device-tree/Bindings/regulator/
H A Dqcom,rpm-regulator.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/regulator/qcom,rpm-regulator.yaml#
5 $schema: http://devicetree.org/meta-schema
[all...]
H A Dmps,mp886x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jisheng Zhang <jszhang@kernel.org>
13 - $ref: regulator.yaml#
18 - mps,mp8867
19 - mps,mp8869
24 enable-gpios:
28 mps,fb-voltage-divider:
31 $ref: /schemas/types.yaml#/definitions/uint32-array
[all …]
/freebsd/sys/contrib/device-tree/Bindings/i2c/
H A Di2c-davinci.txt7 - compatible: "ti,davinci-i2c" or "ti,keystone-i2c";
8 - reg : Offset and length of the register set for the device
9 - clocks: I2C functional clock phandle.
11 Documentation/devicetree/bindings/clock/ti,sci-clk.yaml
13 SoC-specific Required Properties:
17 - power-domains: Should contain a phandle to a PM domain provider node
20 Documentation/devicetree/bindings/soc/ti/sci-pm-domain.yaml
23 - interrupts : standard interrupt property.
24 - clock-frequency : desired I2C bus clock frequency in Hz.
25 - ti,has-pfunc: boolean; if defined, it indicates that SoC supports PFUNC
[all …]
H A Dnuvoton,npcm7xx-i2c.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/i2c/nuvoton,npcm7xx-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 slave mode. Each controller can switch between master and slave at run time
15 - Tali Perry <tali.perry1@gmail.com>
20 - nuvoton,npcm750-i2c
21 - nuvoton,npcm845-i2c
33 clock-frequency:
34 description: Desired I2C bus clock frequency in Hz. If not specified,
[all …]
/freebsd/contrib/ntp/html/hints/
H A Dsgi2 --------------------------
4 The SGI value for HZ is 100 under Irix 4, with the system clock running
7 which seems to try to perform the correction over 100-200 seconds, with
32 -----------
35 the clock tick at 1kHz rather than 100Hz. With the fast clock off, I
39 one-second intervals - I am probably seeing sampling aliasing between
44 I use the "ftimer" program to switch the fast clock on when the system
49 ---------
52 time increment, effectively trimming the clock frequency. Xntpd could
53 use this rather than adjtime() to do it's frequency trimming, but I
[all …]
/freebsd/share/man/man4/
H A Dpolling.454 In the normal, interrupt-based mode, devices generate an interrupt
57 context switch and the execution of an interrupt handler
60 unless the device driver has been programmed with real-time
70 This way, the context switch overhead is removed.
93 .Bd -literal
94 for i in `ifconfig -l` ;
95 do ifconfig $i polling; # use -polling to disable
105 .Bl -tag -width indent -compact
126 packets, going round-robin among all interfaces registered for
139 .Pq Va HZ No * Va burst_max
[all …]
/freebsd/contrib/ntp/ntpd/
H A Drefclock_wwv.c2 * refclock_wwv - clock driver for NIST WWV/H time/frequency station
34 * radio transmissions from NIST time/frequency stations WWV in Boulder,
43 * kHz and mu-law companding. This is the same standard as used by the
53 * Report 97-8-1, University of Delaware, August 1997, 25 pp., available
61 * a nonzero ICOM ID select code. The C-IV trace is turned on if the
68 * port, where 0 is the mike port (default) and 1 is the line-in port.
74 * CEVNT_PROP propagation failure - no stations heard
82 #define PRECISION (-1
[all...]
H A Drefclock_irig.c2 * refclock_irig - audio IRIG-B/E demodulator/decoder
26 * Audio IRIG-B/E demodulator/decoder
29 * IRIG-B/E signals commonly produced by GPS receivers and other timing
30 * devices. The IRIG signal is an amplitude-modulated carrier with
31 * pulse-width modulated data bits. For IRIG-B, the carrier frequency is
32 * 1000 Hz and bit rate 100 b/s; for IRIG-
[all...]
/freebsd/share/doc/papers/timecounter/
H A Dtimecounter.ms5 .\" ----------------------------------------------------------------------------
6 .\" "THE BEER-WARE LICENSE" (Revision 42):
9 .\" this stuff is worth it, you can buy me a beer in return. Poul-Henning Kamp
10 .\" ----------------------------------------------------------------------------
16 .A "Poul-Henning Kamp" "The FreeBSD Project"
18 The FreeBSD timecounters are an architecture-independent implementation
21 multiplication to canonical timescales based on micro- or nano-seconds
23 synchronisation. Timecounters are implemented using lock-less
24 stable-storage based primitives which scale efficiently in SMP
80 for instance transport or consumption of a substance at a well-known
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8mm-var-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
10 model = "Variscite VAR-SOM-MX8MM module";
13 stdout-path = &uart4;
21 reg_eth_phy: regulator-eth-phy {
22 compatible = "regulator-fixed";
23 pinctrl-names = "default";
24 pinctrl-0 = <&pinctrl_reg_eth_phy>;
25 regulator-name = "eth_phy_pwr";
26 regulator-min-microvolt = <3300000>;
27 regulator-max-microvolt = <3300000>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dqcom,wcd934x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 Qualcomm WCD9340/WCD9341 Codec is a standalone Hi-Fi audio codec IC.
14 It has in-built Soundwire controller, pin controller, interrupt mux and
27 reset-gpios:
31 slim-ifc-dev:
38 clock-names:
41 vdd-buck-supply:
[all …]
/freebsd/sys/kern/
H A Dkern_clocksource.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2010-2013 Alexander Motin <mav@FreeBSD.org>
75 if (timer->et_flags & ET_FLAGS_PERCPU) \
76 mtx_lock_spin(&(state)->et_hw_mtx); \
83 if (timer->et_flags & ET_FLAGS_PERCPU) \
84 mtx_unlock_spin(&(state)->et_hw_mtx); \
108 static int periodic; /* Periodic or one-shot mode. */
113 struct mtx et_hw_mtx; /* Per-CPU timer mutex. */
144 now = state->now; in hardclockintr()
[all …]
/freebsd/sys/dev/bhnd/cores/pmu/
H A Dbhnd_pmu_subr.c1 /*-
2 * SPDX-License-Identifier: ISC
10 * distributed with the Asus RT-N16 firmware source code release.
41 if (_sc->dev != NULL) \
42 device_printf(_sc->dev, _fmt, ##__VA_ARGS__); \
91 ((uint8_t)BHND_PMU_GET_BITS((_sc)->caps, BHND_PMU_CAP_REV))
94 bhnd_core_clkctl_wait((_sc)->clkctl, (_val), (_mask))
100 CHIPC_CST4330_CHIPMODE_SDIOD((_sc)->io->rd_chipst((_sc)->io_ctx))
113 * @retval non-zero if the query state could not be initialized.
119 query->dev = dev; in bhnd_pmu_query_init()
[all …]
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dmicrochip,sparx5-sgpio.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/microchip,sparx5-sgpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lars Povlsen <lars.povlsen@microchip.com>
21 pattern: "^gpio@[0-9a-f]+$"
25 - microchip,sparx5-sgpio
26 - mscc,ocelot-sgpio
27 - mscc,luton-sgpio
29 "#address-cells":
[all …]
/freebsd/sys/dev/iicbus/rtc/
H A Dnxprtc.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
30 * Driver for NXP real-time clock/calendar chips:
31 * - PCF8563 = low power, countdown timer
32 * - PCA8565 = like PCF8563, automotive temperature range
33 * - PCF8523 = low power, countdown timer, oscillator freq tuning, 2 timers
34 * - PCF2127 = like PCF8523, industrial, tcxo, tamper/ts, i2c & spi, 512B ram
35 * - PCA2129 = like PCF8523, automotive, tcxo, tamper/ts, i2c & spi, (note 1)
36 * - PCF2129 = like PCF8523, industrial, tcxo, tamper/ts, i2c & spi, (note 1)
100 * PCF2127-specific registers, bits, and masks.
[all …]
/freebsd/sys/dev/speaker/
H A Dspkr.c1 /*-
2 * spkr.c -- device driver for console speaker
40 * frequency and duration from the ISA console speaker.
47 * used to generate clicks (a square wave) of whatever frequency is desired.
60 * Emit tone of frequency thz for given number of centisecs
74 /* set timer to generate clicks at given frequency in Hertz */ in tone()
88 timo = centisecs * hz / 100; in tone()
110 timo = centisecs * hz / 100; in rest()
118 * M[LNS] are missing; the ~ synonym and the _ slur mark and the octave-
124 #define dtoi(c) ((c) - '0')
[all …]
/freebsd/sys/arm/allwinner/
H A Daw_cir.c1 /*-
49 #define READ(_sc, _r) bus_read_4((_sc)->res[0], (_r))
50 #define WRITE(_sc, _r, _v) bus_write_4((_sc)->res[0], (_r), (_v))
83 #define AW_IR_RXSTA_COUNTER(val) (((val) >> 8) & (sc->fifo_size * 2 - 1))
91 * Frequency sample: 23437.5Hz (Cycle: 42.7us)
99 /* Bit 15 - value (pulse/space) */
101 /* Bits 0:14 - sample duration */
106 /* Frequency sample 3MHz/64 = 46875Hz (21.3us) */
108 /* Frequency sample 3MHz/128 = 23437.5Hz (42.7us) */
127 #define AW_IR_ACTIVE_T (((AW_IR_ACTIVE_T_VAL - 1) & 0xff) << 16)
[all …]

1234567