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/freebsd/sys/contrib/device-tree/Bindings/mmc/
H A Dmmc-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mmc-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Ulf Hansson <ulf.hansson@linaro.org>
25 "#address-cell
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H A Dbrcm,sdhci-brcmstb.txt4 and the properties used by the sdhci-brcmstb driver.
11 - compatible: should be one of the following
12 - "brcm,bcm7425-sdhci"
13 - "brcm,bcm7445-sdhci"
14 - "brcm,bcm7216-sdhci"
16 Refer to clocks/clock-bindings.txt for generic clock consumer properties.
21 sd-uhs-sdr50;
22 sd-uhs-ddr50;
23 sd-uhs-sdr104;
24 sdhci,auto-cmd12;
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H A Dsdhci-msm.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/sdhci-msm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SDHCI controller (sdhci-msm)
10 - Bhupesh Sharma <bhupesh.sharma@linaro.org>
14 Qualcomm SOCs supports SD/MMC/SDIO devices.
19 - enum:
20 - qcom,sdhci-msm-v4
22 - items:
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H A Dbrcm,sdhci-brcmstb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/brcm,sdhci-brcmstb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Al Cooper <alcooperx@gmail.com>
11 - Florian Fainelli <f.fainelli@gmail.com>
16 - items:
17 - enum:
18 - brcm,bcm7216-sdhci
19 - const: brcm,bcm7445-sdhci
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/freebsd/sys/dev/qlnx/qlnxe/
H A Decore_l2_api.h2 * Copyright (c) 2017-2018 Cavium, Inc.
204 /* Add / remove / move / remove-all unicast MAC-VLAN filters.
236 * @brief ecore_eth_rx_queue_start - RX Queue Start Ramrod
246 * @param cqe_pbl_addr Physical address of the CQE PBL Table.
247 * @param cqe_pbl_size Size of the CQE PBL Table
263 * @brief ecore_eth_rx_queue_stop - This ramrod closes an Rx queue
271 * otherwise on CQe.
273 * recieve on CQe.
283 * @brief - TX Queue Start Ramrod
308 * @brief ecore_eth_tx_queue_stop - closes a Tx queue
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/freebsd/contrib/ofed/libcxgb4/
H A Dt4.h2 * Copyright (c) 2006-2016 Chelsio, Inc. All rights reserved.
14 * - Redistributions of source code must retain the above
17 * - Redistributions in binary form must reproduce the above
54 #define ROUND_UP(x, n) (((x) + (n) - 1u) & ~((n) - 1u))
55 #define DIV_ROUND_UP(n,d) (((n) + (d) - 1) / (d))
82 #define T4_MAX_EQ_SIZE (65520 - T4_EQ_STATUS_ENTRIES)
83 #define T4_MAX_IQ_SIZE (65520 - 1)
84 #define T4_MAX_RQ_SIZE (8192 - T4_EQ_STATUS_ENTRIES)
85 #define T4_MAX_SQ_SIZE (T4_MAX_EQ_SIZE - 1)
86 #define T4_MAX_QP_DEPTH (T4_MAX_RQ_SIZE - 1)
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H A Ddev.c2 * Copyright (c) 2006-2016 Chelsio, Inc. All rights reserved.
14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
45 #include "cxgb4-abi.h"
122 context->ibv_ctx.cmd_fd = cmd_fd; in c4iw_alloc_context()
126 if (ibv_cmd_get_context(&context->ibv_ctx, &cmd, sizeof cmd, in c4iw_alloc_context()
134 context->status_page_size = resp.status_page_size; in c4iw_alloc_context()
136 context->status_page = mmap(NULL, resp.status_page_size, in c4iw_alloc_context()
139 if (context->status_page == MAP_FAILED) in c4iw_alloc_context()
143 context->ibv_ctx.device = ibdev; in c4iw_alloc_context()
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/freebsd/sys/dev/mana/
H A Dmana_en.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
108 ifmr->ifm_status = IFM_AVALID; in mana_ifmedia_status()
109 ifmr->ifm_active = IFM_ETHER; in mana_ifmedia_status()
111 if (!apc->port_is_up) { in mana_ifmedia_status()
113 mana_dbg(NULL, "Port %u link is down\n", apc->port_idx); in mana_ifmedia_status()
117 ifmr->ifm_status |= IFM_ACTIVE; in mana_ifmedia_status()
118 ifmr->ifm_active |= IFM_100G_DR | IFM_FDX; in mana_ifmedia_status()
127 struct mana_port_stats *stats = &apc->port_stats; in mana_get_counter()
131 return (counter_u64_fetch(stats->rx_packets)); in mana_get_counter()
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/freebsd/sys/contrib/ena-com/ena_defs/
H A Dena_admin_defs.h1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
4 * Copyright (c) 2015-2023 Amazon.com, Inc. or its affiliates.
45 /* customer metrics - in correlation with
206 * 1 : ctrl_data - control buffer address valid
207 * 2 : ctrl_data_indirect - control buffer address
229 * 7:5 : sq_direction - 0x1 - Tx; 0x2 - Rx
280 * 7:5 : sq_direction - 0x1 - Tx, 0x2 - Rx
286 /* 3:0 : placement_policy - Describing where the SQ
288 * 0x1 - descriptors and headers are in OS memory,
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/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dqcs404-evb.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
19 stdout-path = "serial0";
22 vph_pwr: vph-pwr-regulator {
23 compatible = "regulator-fixed";
24 regulator-name = "vph_pwr";
25 regulator-always-on;
26 regulator-boot-on;
[all …]
H A Dqdu1000-idp.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
14 compatible = "qcom,qdu1000-idp", "qcom,qdu1000";
15 chassis-type = "embedded";
22 stdout-path = "serial0:115200n8";
26 xo_board: xo-board-clk {
27 compatible = "fixed-clock";
28 clock-frequency = <19200000>;
29 #clock-cells = <0>;
[all …]
H A Dsdm660-xiaomi-lavender.dts1 // SPDX-License-Identifier: GPL-2.0-only
7 /dts-v1/;
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/input/gpio-keys.h>
18 chassis-type = "handset";
25 #address-cells = <2>;
26 #size-cells = <2>;
29 stdout-path = "serial0:115200n8";
32 compatible = "simple-framebuffer";
41 vph_pwr: vph-pwr-regulator {
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H A Dsda660-inforce-ifc6560.dts1 // SPDX-License-Identifier: BSD-3-Clause
9 /dts-v1/;
18 chassis-type = "embedded"; /* SBC */
26 stdout-path = "serial0:115200n8";
29 gpio-keys {
30 compatible = "gpio-keys";
32 key-volup {
36 debounce-interval = <15>;
41 * Until we hook up type-c detection, we
44 extcon_usb: extcon-usb {
[all …]
H A Dsdm630-sony-xperia-nile.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/input/gpio-keys.h>
13 #include <dt-bindings/leds/common.h>
17 qcom,msm-id = <318 0>;
18 qcom,board-id = <8 1>;
19 qcom,pmic-id = <0x1001b 0x101011a 0x00 0x00 0x1001b 0x201011a 0x00 0x00>;
21 /* This part enables graphical output via bootloader-enabled display */
25 #address-cells = <2>;
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H A Dsdm670-google-sargo.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device tree for Google Pixel 3a, adapted from google-blueline device tree,
4 * xiaomi-lavender device tree, and oneplus-common device tree.
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
13 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
19 /delete-node/ &mpss_region;
20 /delete-node/ &venus_mem;
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H A Dqrb2210-rb1.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
6 /dts-v1/;
8 #include <dt-bindings/leds/common.h>
14 compatible = "qcom,qrb2210-rb1", "qcom,qrb2210", "qcom,qcm2290";
23 stdout-path = "serial0:115200n8";
27 clk40M: can-clk {
28 compatible = "fixed-clock";
29 clock-frequency = <40000000>;
30 #clock-cells = <0>;
34 gpio-keys {
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/freebsd/sys/ofed/include/rdma/
H A Dib_verbs.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause OR GPL-2.0
22 * - Redistributions of source code must retain the above
26 * - Redistributions in binary form must reproduce the above
47 #include <linux/dma-mapping.h>
195 * This device supports a per-device lkey or stag that can be
216 * This device supports the IB "base memory management extension",
310 unsigned int cqe; member
412 default: return -1; in ib_mtu_enum_to_int()
423 IB_PORT_DUMMY = -1, /* force enum signed */
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/freebsd/sys/dev/ocs_fc/
H A Dsli4.c1 /*-
33 * @defgroup sli SLI-4 Base APIs
38 * All common (i.e. transport-independent) SLI-4 functions are implemented
113 * Although SLI-4 specification defines a common set of registers, their locations
260 const sli4_reg_t *r = &(regmap[reg][sli->if_type]); in sli_reg_read()
262 if ((UINT32_MAX == r->rset) || (UINT32_MAX == r->off)) { in sli_reg_read()
263 ocs_log_err(sli->os, "regname %d not defined for if_type %d\n", reg, sli->if_type); in sli_reg_read()
267 return ocs_reg_read32(sli->os, r->rset, r->off); in sli_reg_read()
282 const sli4_reg_t *r = &(regmap[reg][sli->if_type]); in sli_reg_write()
284 if ((UINT32_MAX == r->rset) || (UINT32_MAX == r->off)) { in sli_reg_write()
[all …]
H A Docs_hw.c1 /*-
36 * the details of the underlying SLI-4 implementation.
65 /* max command and response buffer lengths -- arbitrary at the moment */
118 static void ocs_hw_wq_process_abort(void *arg, uint8_t *cqe, int32_t status);
156 io->wqe_timeout = timeout; in ocs_hw_set_io_wqe_timeout()
166 if (hw->config.emulate_wqe_timeout && io->wqe_timeout) { in ocs_hw_add_io_timed_wqe()
171 ocs_lock(&hw->io_lock); in ocs_hw_add_io_timed_wqe()
172 ocs_list_add_tail(&hw->io_timed_wqe, io); in ocs_hw_add_io_timed_wqe()
173 getmicrouptime(&io->submit_time); in ocs_hw_add_io_timed_wqe()
174 ocs_unlock(&hw->io_lock); in ocs_hw_add_io_timed_wqe()
[all …]
/freebsd/sys/contrib/ena-com/
H A Dena_com.c1 /*-
2 * SPDX-License-Identifier: BSD-3-Clause
4 * Copyright (c) 2015-2023 Amazon.com, Inc. or its affiliates.
39 /* Timeout in micro-sec */
94 /* Abort - canceled by the driver */
118 if (unlikely((addr & GENMASK_ULL(ena_dev->dma_addr_bits - 1, 0)) != addr)) { in ena_com_mem_addr_set()
119 ena_trc_err(ena_dev, "DMA address has more bits that the device supports\n"); in ena_com_mem_addr_set()
123 ena_addr->mem_addr_low = lower_32_bits(addr); in ena_com_mem_addr_set()
124 ena_addr->mem_addr_high = (u16)upper_32_bits(addr); in ena_com_mem_addr_set()
131 struct ena_com_dev *ena_dev = admin_queue->ena_dev; in ena_com_admin_init_sq()
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/freebsd/sys/dev/bnxt/bnxt_en/
H A Dhsi_struct_def.h1 /*-
34 * Copyright(c) 2001-2024, Broadcom. All rights reserved. The
71 * * 0x0-0xFFF8 - The function ID
72 * * 0xFFF8-0xFFFC, 0xFFFE - Reserved for internal processors
73 * * 0xFFFD - Reserved for user-space HWRM interface
74 * * 0xFFFF - HWRM
122 /* Engine CKV - The Alias key EC curve and ECC public key information. */
124 /* Engine CKV - Initialization vector. */
126 /* Engine CKV - Authentication tag. */
128 /* Engine CKV - The encrypted data. */
[all …]
/freebsd/sys/dev/qlnx/qlnxr/
H A Dqlnxr_def.h2 * Copyright (c) 2018-2019 Cavium, Inc.
44 #include <linux/dma-mapping.h>
167 /* CQE Limitation
168 * Although FW supports two layer PBL we use single layer since it is more
170 * it reaches the maximum number of page pointers. Notice is the '-1' in the
177 sizeof(u64)) - 1) /* 64k -1 */
179 / QLNXR_CQE_SIZE)) /* 8M -4096/32 = 8,388,480 */
182 * The maximum CNQ size is not reachable because the FW supports a chain of u16
183 * (specifically 64k-1). The FW can buffer CNQ elements avoiding an overflow, on
224 #define QLNXR_MAX_SGID 128 /* TBD - add more source gids... */
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/freebsd/usr.sbin/bhyve/
H A Dpci_nvme.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
31 * bhyve PCIe-NVMe device emulation.
34 * -s <n>,nvme,devpath,maxq=#,qsz=#,ioslots=#,sectsz=#,ser=A-Z,eui64=#,dsm=<opt>
45 * ser = serial number (20-chars max)
52 - create async event for smart and log
53 - intr coalesce
120 /* Convert a zero-based value into a one-based value */
122 /* Convert a one-based value into a zero-based value */
123 #define ZERO_BASED(one) ((one) - 1)
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/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3588-tiger.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/leds/common.h>
8 #include <dt-bindings/pinctrl/rockchip.h>
12 compatible = "tsd,rk3588-tiger", "rockchip,rk3588";
19 emmc_pwrseq: emmc-pwrseq {
20 compatible = "mmc-pwrseq-emmc";
21 pinctrl-0 = <&emmc_reset>;
22 pinctrl-names = "default";
23 reset-gpios = <&gpio2 RK_PA3 GPIO_ACTIVE_HIGH>;
[all …]
/freebsd/sys/dev/mlx4/mlx4_core/
H A Dmlx4_main.c17 * - Redistributions of source code must retain the above
21 * - Redistributions in binary form must reproduce the above
42 #include <linux/dma-mapping.h>
44 #include <linux/io-mapping.h>
61 MODULE_DESCRIPTION("Mellanox ConnectX HCA low-level driver");
78 MODULE_PARM_DESC(msi_x, "attempt to use MSI-X if nonzero");
106 " flow steering when available, set to -1");
111 "Enable 64 byte CQEs/EQEs when the FW supports this (default: True)");
153 MODULE_PARM_DESC(log_num_mac, "Log2 max number of MACs per ETH port (1-7)");
157 MODULE_PARM_DESC(log_num_vlan, "Log2 max number of VLANs per ETH port (0-7)");
[all …]

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