Lines Matching +full:supports +full:- +full:cqe

2  * Copyright (c) 2018-2019 Cavium, Inc.
44 #include <linux/dma-mapping.h>
167 /* CQE Limitation
168  * Although FW supports two layer PBL we use single layer since it is more
170  * it reaches the maximum number of page pointers. Notice is the '-1' in the
177                                   sizeof(u64)) - 1) /* 64k -1 */
179                              / QLNXR_CQE_SIZE)) /* 8M -4096/32 = 8,388,480 */
182  * The maximum CNQ size is not reachable because the FW supports a chain of u16
183  * (specifically 64k-1). The FW can buffer CNQ elements avoiding an overflow, on
224 #define QLNXR_MAX_SGID			128 /* TBD - add more source gids... */
294         /* Abilty to support RNR-NAK generation */
536         /* destroy-IRQ handler race prevention */
575                 p_info->index = (p_info->index + 1) &           \
576                         ecore_chain_get_capacity(p_info->pbl)     \
738         info->cons = (info->cons + 1) % info->max_wr;  in qlnxr_inc_sw_cons()
739         info->wqe_cons++;  in qlnxr_inc_sw_cons()
745         info->prod = (info->prod + 1) % info->max_wr;  in qlnxr_inc_sw_prod()
798         return !!qp->srq;  in qlnxr_qp_has_srq()
803         if (qp->qp_type == IB_QPT_GSI)  in qlnxr_qp_has_sq()
811         if (qp->qp_type == IB_QPT_GSI || qlnxr_qp_has_srq(qp))  in qlnxr_qp_has_rq()
835         u8 *guid = &ah_attr->grh.dgid.raw[8]; /* GID's 64 MSBs are the GUID */  in qlnxr_get_dmac()
840         if (!memcmp(&ah_attr->grh.dgid, &zero_sgid, sizeof(union ib_gid))) {  in qlnxr_get_dmac()
842                 return -EINVAL;  in qlnxr_get_dmac()
845         memcpy(&in6, ah_attr->grh.dgid.raw, sizeof(in6));  in qlnxr_get_dmac()
848         /* get the MAC address from the GUID i.e. EUI-64 to MAC address */  in qlnxr_get_dmac()
856         memcpy(mac_addr, ah_attr->dmac, ETH_ALEN);  in qlnxr_get_dmac()
868 #define QLNX_IS_IWARP(rdev)	IS_IWARP(ECORE_LEADING_HWFN(rdev->cdev))
869 #define QLNX_IS_ROCE(rdev)	IS_ROCE(ECORE_LEADING_HWFN(rdev->cdev))