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/linux/lib/zstd/compress/
H A Dzstd_compress_superblock.c1 // SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
6 * This source code is licensed under both the BSD-style license (found in the
9 * You may select, at your option, one of the above-listed licenses.
12 /*-*************************************
24 * Compresses literals section for a sub-block.
33 * hufMetadata->hType has literals block type info.
34 * If it is set_basic, all sub-blocks literals section will be Raw_Literals_Block.
35 * If it is set_rle, all sub-blocks literals section will be RLE_Literals_Block.
36 …* If it is set_compressed, first sub-block's literals section will be Compressed_Literals_Blo…
37 * If it is set_compressed, first sub-block's literals section will be Treeless_Literals_Block
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/linux/Documentation/driver-api/media/
H A Dv4l2-subdev.rst1 .. SPDX-License-Identifier: GPL-2.0
3 V4L2 sub-devices
4 ----------------
6 Many drivers need to communicate with sub-devices. These devices can do all
8 encoding or decoding. For webcams common sub-devices are sensors and camera
12 driver with a consistent interface to these sub-devices the
13 :c:type:`v4l2_subdev` struct (v4l2-subdev.h) was created.
15 Each sub-device driver must have a :c:type:`v4l2_subdev` struct. This struct
16 can be stand-alone for simple sub-devices or it might be embedded in a larger
18 low-level device struct (e.g. ``i2c_client``) that contains the device data as
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/linux/Documentation/userspace-api/netlink/
H A Dgenetlink-legacy.rst1 .. SPDX-License-Identifier: BSD-3-Clause
9 the ``genetlink-legacy`` protocol level.
15 -------
29 --------------------
31 New Netlink families should use ``multi-attr`` to define arrays.
35 For reference the ``multi-attr`` array may look like this::
37 [ARRAY-ATTR]
41 [SOME-OTHER-ATTR]
42 [ARRAY-ATTR]
47 where ``ARRAY-ATTR`` is the array entry type.
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/linux/arch/arm64/crypto/
H A Daes-modes.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm64/crypto/aes-modes.S - chaining mode wrappers for AES
5 * Copyright (C) 2013 - 2017 Linaro Ltd <ard.biesheuvel@linaro.org>
8 /* included by aes-ce.S and aes-neon.S */
62 ld1 {v0.16b-v3.16b}, [x1], #64 /* get 4 pt blocks */
66 st1 {v0.16b-v3.16b}, [x0], #64
73 ld1 {v0.16b}, [x1], #16 /* get next pt block */
92 ld1 {v0.16b-v3.16b}, [x1], #64 /* get 4 ct blocks */
96 st1 {v0.16b-v3.16b}, [x0], #64
103 ld1 {v0.16b}, [x1], #16 /* get next ct block */
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/linux/Documentation/admin-guide/media/
H A Dfimc.rst1 .. SPDX-License-Identifier: GPL-2.0
8 Copyright |copy| 2012 - 2013 Samsung Electronics Co., Ltd.
17 drivers/media/platform/samsung/exynos4-is directory.
20 --------------
22 S5PC100 (mem-to-mem only), S5PV210, Exynos4210
25 ------------------
27 - camera parallel interface capture (ITU-R.BT601/565);
28 - camera serial interface capture (MIPI-CSI2);
29 - memory-to-memory processing (color space conversion, scaling, mirror
31 - dynamic pipeline re-configuration at runtime (re-attachment of any FIMC
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/linux/Documentation/filesystems/
H A Dzonefs.rst1 .. SPDX-License-Identifier: GPL-2.0
4 ZoneFS - Zone filesystem for Zoned block devices
10 zonefs is a very simple file system exposing each zone of a zoned block device
11 as a file. Unlike a regular POSIX-compliant file system with native zoned block
13 constraint of zoned block devices to the user. Files representing sequential
17 As such, zonefs is in essence closer to a raw block device access interface
18 than to a full-featured POSIX file system. The goal of zonefs is to simplify
19 the implementation of zoned block device support in applications by replacing
20 raw block device file accesses with a richer file API, avoiding relying on
21 direct block device file ioctls which may be more obscure to developers. One
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/linux/Documentation/devicetree/bindings/mailbox/
H A Dti,omap-mailbox.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mailbox/ti,omap-mailbox.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Suman Anna <s-anna@ti.com>
14 processors using a queued mailbox interrupt mechanism. The IP block is
19 Each mailbox IP block/cluster has a certain number of h/w fifo queues and
35 lines can also be routed to different processor sub-systems on DRA7xx as they
38 combine multiple clusters into a single IP block present within the Main
42 block comprising of multiple clusters, but the number of clusters are
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/linux/scripts/lib/kdoc/
H A Dkdoc_output.py2 # SPDX-License-Identifier: GPL-2.0
8 Implement output filters to print kernel-doc documentation.
30 type_constant2 = KernRe(r"\%([-_*\w]+)", cache=False)
32 type_param_ref = KernRe(r"([\!~\*]?)\@(\w*((\.\w+)|(->\w+))*(\.\.\.)?)", cache=False)
38 type_fp_param2 = KernRe(r"\@(\w+->\S+)\(\)", cache=False)
45 type_member = KernRe(r"\&([_\w]+)(\.|->)([_\w]+)", cache=False)
52 Base class for OutputFormat. If used as-is, it means that only
60 OUTPUT_INTERNAL = 3 # output non-exporte
112 highlight_block(self, block) global() argument
617 output_highlight(self, block) global() argument
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/linux/include/drm/
H A Ddrm_fourcc.h30 * DRM_FORMAT_MAX_PLANES - maximum number of planes a DRM format can have
59 * struct drm_format_info - information about a DRM format
91 * Number of bytes per block (per plane), where blocks are
104 * block and non-block formats in the same way.
106 * For formats that are intended to be used only with non-linear
118 * Block width in pixels, this is intended to be accessed through
126 * Block height in pixels, this is intended to be accessed through
142 /** @is_color_indexed: Is it a color-indexed format? */
147 * drm_format_info_is_yuv_packed - check that the format info matches a YUV
157 return info->is_yuv && info->num_planes == 1; in drm_format_info_is_yuv_packed()
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/linux/lib/crypto/arm64/
H A Dsha256-ce.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * sha2-ce-core.S - core SHA-224/SHA-256 transform using v8 Crypto Extensions
12 .arch armv8-a+crypto
51 * The SHA-256 round constants
75 ld1 { v0.4s- v3.4s}, [\tmp], #64
76 ld1 { v4.4s- v7.4s}, [\tmp], #64
77 ld1 { v8.4s-v11.4s}, [\tmp], #64
78 ld1 {v12.4s-v15.4s}, [\tmp]
94 0: ld1 {v16.4s-v19.4s}, [x1], #64
95 sub x2, x2, #1
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/linux/arch/x86/crypto/
H A Daes-gcm-aesni-x86_64.S1 /* SPDX-License-Identifier: Apache-2.0 OR BSD-2-Clause */
3 // AES-NI optimized AES-GCM for x86_64
9 //------------------------------------------------------------------------------
11 // This file is dual-licensed, meaning that you can use it under your choice of
17 // http://www.apache.org/licenses/LICENSE-2.0
49 //------------------------------------------------------------------------------
51 // This file implements AES-GCM (Galois/Counter Mode) for x86_64 CPUs that
52 // support the original set of AES instructions, i.e. AES-NI. Two
55 // that the AVX implementation takes advantage of VEX-coded instructions in some
57 // implementation does *not* use 256-bit vectors, as AES is not supported on
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H A Daes-xts-avx-x86_64.S1 /* SPDX-License-Identifier: Apache-2.0 OR BSD-2-Clause */
3 // AES-XTS for modern x86_64 CPUs
9 //------------------------------------------------------------------------------
11 // This file is dual-licensed, meaning that you can use it under your choice of
17 // http://www.apache.org/licenses/LICENSE-2.0
50 * This file implements AES-XTS for modern x86_64 CPUs. To handle the
55 * AES-NI && AVX
56 * - 128-bit vectors (1 AES block per vector)
57 * - VEX-coded instructions
58 * - xmm0-xmm15
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/linux/Documentation/devicetree/bindings/powerpc/fsl/
H A Dsrio-rmu.txt5 node is composed of three types of sub-nodes ("fsl-srio-msg-unit",
6 "fsl-srio-dbell-unit" and "fsl-srio-port-write-unit").
10 - compatible
13 Definition: Must include "fsl,srio-rmu-vX.Y", "fsl,srio-rmu".
15 The version X.Y should match the general SRIO controller's IP Block
18 - reg
20 Value type: <prop-encoded-array>
25 - fsl,liodn
26 Usage: optional-but-recommended (for devices with PAMU)
27 Value type: <prop-encoded-array>
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/linux/lib/crypto/x86/
H A Dsha256-ni-asm.S2 * Intel SHA Extensions optimized implementation of a SHA-256 update function
83 movdqa (\i-32)*4(SHA256CONSTANTS), MSG
100 * Intel SHA Extensions optimized implementation of a SHA-256 block function
102 * This function takes a pointer to the current SHA-256 state, a pointer to the
103 * input data, and the number of 64-byte blocks to process. Once all blocks
120 * DCBA, HGFE -> ABEF, CDGH
223 // Do 4 rounds of SHA-256 for each of two messages (interleaved). m0_a and m0_b
228 // computes 4 more message schedule words for each message. m1_a-m3_a contain
230 // likewise m1_b-m3_b for the second. After consuming the current value of
236 movdqa (\i-32)*4(SHA256CONSTANTS), TMP_A
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/linux/fs/xfs/scrub/
H A Drepair.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2018-2023 Oracle. All Rights Reserved.
58 * told us to fix it. This function returns -EAGAIN to mean "re-run scrub",
69 trace_xrep_attempt(XFS_I(file_inode(sc->file)), sc->sm, error); in xrep_attempt()
71 xchk_ag_btcur_free(&sc->sa); in xrep_attempt()
72 xchk_rtgroup_btcur_free(&sc->sr); in xrep_attempt()
75 ASSERT(sc->ops->repair); in xrep_attempt()
76 run->repair_attempted = true; in xrep_attempt()
78 error = sc->ops->repair(sc); in xrep_attempt()
79 trace_xrep_done(XFS_I(file_inode(sc->file)), sc->sm, error); in xrep_attempt()
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/linux/Documentation/devicetree/bindings/interconnect/
H A Dsamsung,exynos-bus.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/interconnect/samsung,exynos-bus.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chanwoo Choi <cw00.choi@samsung.com>
11 - Krzysztof Kozlowski <krzk@kernel.org>
15 sub-blocks in SoC. Most Exynos SoCs share the common architecture for buses.
20 sub-blocks.
22 The Exynos SoC includes the various sub-blocks which have the each AXI bus.
24 line. The power line might be shared among one more sub-blocks. So, we can
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/linux/Documentation/userspace-api/media/
H A Dglossary.rst1 .. SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-no-invariants-or-later
58 **Field-programmable Gate Array**
63 See https://en.wikipedia.org/wiki/Field-programmable_gate_array.
67 :term:`SPI` device, or an :term:`IP Block` inside an
72 together make a larger user-facing functional peripheral. For
73 instance, the :term:`SoC` :term:`ISP` :term:`IP Block`
80 **Inter-Integrated Circuit**
82 A multi-master, multi-slave, packet switched, single-ended,
84 like sub-device hardware components.
86 See http://www.nxp.com/docs/en/user-guide/UM10204.pdf.
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/linux/arch/sparc/lib/
H A DM7memset.S15 * Fast assembler language version of the following C-program for memset
16 * which represents the `standard' for the C-library.
25 * } while (--n != 0);
35 * Then store as many 4-byte chunks, followed by trailing bytes.
39 * store 8-bytes chunks to align the address on 64 byte boundary
42 * 64-byte cache line to zero which will also clear the
49 * In the main loop, continue pre-setting the first long
56 * store remaining data in 64-byte chunks until less than
59 * Store as many 8-byte chunks, followed by trailing bytes.
61 * BIS = Block Init Store
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H A DNG2memcpy.S1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* NG2memcpy.S: Niagara-2 optimized memcpy.
262 /* 2 blocks (128 bytes) is the minimum we can do the block
264 * once in the block copy loop. At worst we'll need to align
265 * the destination to a 64-byte boundary which can chew up
266 * to (64 - 1) bytes from the length before we perform the
267 * block copy loop.
269 * However, the cut-off point, performance wise, is around
270 * 4 64-byte blocks.
280 * The block copy loops can use %o4, %g2, %g3 as
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/linux/arch/arm/crypto/
H A Daes-ce-core.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * aes-ce-core.S - AES in CBC/CTR/XTS mode using ARMv8 Crypto Extensions
12 .arch armv8-a
13 .fpu crypto-neon-fp-armv8
102 vld1.32 {q10-q11}, [ip]!
104 vld1.32 {q12-q13}, [ip]!
106 vld1.32 {q10-q11}, [ip]!
108 vld1.32 {q12-q13}, [ip]!
110 blo 0f @ AES-128: 10 rounds
111 vld1.32 {q10-q11}, [ip]!
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/linux/include/linux/ceph/
H A Drados.h1 /* SPDX-License-Identifier: GPL-2.0 */
29 #define CEPH_SNAPDIR ((__u64)(-1)) /* reserved for hidden .snap dir */
30 #define CEPH_NOSNAP ((__u64)(-2)) /* "head", "live" revision */
31 #define CEPH_MAXSNAP ((__u64)(-3)) /* largest valid snapid */
40 * object layout - how objects are mapped into PGs
47 * pg layout -- how PGs are mapped onto (sets of) OSDs
69 * pg_num -- base number of pseudorandomly placed pgs
71 * pgp_num -- effective number when calculating pg placement. this
78 * lpg_num -- localized pg count (per device). replicas are randomly
81 * lpgp_num -- as above.
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/linux/arch/sparc/mm/
H A Dviking.S1 /* SPDX-License-Identifier: GPL-2.0 */
12 #include <asm/asm-offsets.h>
40 sub %o0, %g2, %g3
43 clr %o1 ! set counter, 0 - 127
44 sethi %hi(PAGE_OFFSET + PAGE_SIZE - 0x80000000), %o3
49 clr %o2 ! block counter, 0 - 3
54 sll %o2, 26, %g5 ! block << 26
81 sll %o2, 26, %g5 ! block << 26
93 sub %o0, %g2, %g3
94 sub %g3, -PAGE_SIZE, %g3 ! ppage + PAGE_SIZE
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/linux/scripts/
H A Dkernel-doc.pl2 # SPDX-License-Identifier: GPL-2.0
11 ## Copyright (C) 2005-2012 Randy Dunlap ##
23 kernel-doc - Print formatted kernel documentation to stdout
27 …kernel-doc [-h] [-v] [-Werror] [-Wall] [-Wreturn] [-Wshort-desc[ription]] [-Wcontents-before-secti…
28 [ -man |
29 -rst [-enable-lineno] |
30 -none
33 -export |
34 -internal |
35 [-function NAME] ... |
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/linux/sound/soc/stm/
H A Dstm32_sai_sub.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
10 #include <linux/clk-provider.h>
41 #define STM_SAI_IS_PLAYBACK(ip) ((ip)->dir == SNDRV_PCM_STREAM_PLAYBACK)
42 #define STM_SAI_IS_CAPTURE(ip) ((ip)->dir == SNDRV_PCM_STREAM_CAPTURE)
47 #define STM_SAI_IS_SUB_A(x) ((x)->id == STM_SAI_A_ID)
53 #define STM_SAI_PROTOCOL_IS_SPDIF(ip) ((ip)->spdi
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/linux/Documentation/devicetree/bindings/reset/
H A Dreset.txt10 reset consumer (the module being reset, or a module managing when a sub-
15 specifier - a list of DT cells that represents the reset signal within the
23 the DT node of each affected HW block, since if activated, an unrelated block
27 block node for dedicated reset signals. The intent of this binding is to give
30 block.
35 #reset-cells: Number of cells in a reset specifier; Typically 0 for nodes
41 rst: reset-controller {
42 #reset-cells = <1>;
51 #reset-cells, then only the phandle portion of the pair will
55 reset-names: List of reset signal name strings sorted in the same order as
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