1b2441318SGreg Kroah-Hartman/* SPDX-License-Identifier: GPL-2.0 */ 288278ca2SAdrian Bunk/* 31da177e4SLinus Torvalds * viking.S: High speed Viking cache/mmu operations 41da177e4SLinus Torvalds * 51da177e4SLinus Torvalds * Copyright (C) 1997 Eddie C. Dost (ecd@skynet.be) 61da177e4SLinus Torvalds * Copyright (C) 1997,1998,1999 Jakub Jelinek (jj@ultra.linux.cz) 71da177e4SLinus Torvalds * Copyright (C) 1999 Pavel Semerad (semerad@ss1000.ms.mff.cuni.cz) 81da177e4SLinus Torvalds */ 91da177e4SLinus Torvalds 101da177e4SLinus Torvalds#include <asm/ptrace.h> 111da177e4SLinus Torvalds#include <asm/psr.h> 1247003497SSam Ravnborg#include <asm/asm-offsets.h> 131da177e4SLinus Torvalds#include <asm/asi.h> 141da177e4SLinus Torvalds#include <asm/mxcc.h> 151da177e4SLinus Torvalds#include <asm/page.h> 16*8e958839SWill Deacon#include <asm/pgtable.h> 171da177e4SLinus Torvalds#include <asm/pgtsrmmu.h> 181da177e4SLinus Torvalds#include <asm/viking.h> 191da177e4SLinus Torvalds 201da177e4SLinus Torvalds#ifdef CONFIG_SMP 211da177e4SLinus Torvalds .data 221da177e4SLinus Torvalds .align 4 231da177e4SLinus Torvaldssun4dsmp_flush_tlb_spin: 241da177e4SLinus Torvalds .word 0 251da177e4SLinus Torvalds#endif 261da177e4SLinus Torvalds 271da177e4SLinus Torvalds .text 281da177e4SLinus Torvalds .align 4 291da177e4SLinus Torvalds 301da177e4SLinus Torvalds .globl viking_flush_cache_all, viking_flush_cache_mm 311da177e4SLinus Torvalds .globl viking_flush_cache_range, viking_flush_cache_page 321da177e4SLinus Torvalds .globl viking_flush_page, viking_mxcc_flush_page 331da177e4SLinus Torvalds .globl viking_flush_page_for_dma, viking_flush_page_to_ram 341da177e4SLinus Torvalds .globl viking_flush_sig_insns 351da177e4SLinus Torvalds .globl viking_flush_tlb_all, viking_flush_tlb_mm 361da177e4SLinus Torvalds .globl viking_flush_tlb_range, viking_flush_tlb_page 371da177e4SLinus Torvalds 381da177e4SLinus Torvaldsviking_flush_page: 391da177e4SLinus Torvalds sethi %hi(PAGE_OFFSET), %g2 401da177e4SLinus Torvalds sub %o0, %g2, %g3 411da177e4SLinus Torvalds srl %g3, 12, %g1 ! ppage >> 12 421da177e4SLinus Torvalds 431da177e4SLinus Torvalds clr %o1 ! set counter, 0 - 127 441da177e4SLinus Torvalds sethi %hi(PAGE_OFFSET + PAGE_SIZE - 0x80000000), %o3 451da177e4SLinus Torvalds sethi %hi(0x80000000), %o4 461da177e4SLinus Torvalds sethi %hi(VIKING_PTAG_VALID), %o5 471da177e4SLinus Torvalds sethi %hi(2*PAGE_SIZE), %o0 481da177e4SLinus Torvalds sethi %hi(PAGE_SIZE), %g7 491da177e4SLinus Torvalds clr %o2 ! block counter, 0 - 3 501da177e4SLinus Torvalds5: 511da177e4SLinus Torvalds sll %o1, 5, %g4 521da177e4SLinus Torvalds or %g4, %o4, %g4 ! 0x80000000 | (set << 5) 531da177e4SLinus Torvalds 541da177e4SLinus Torvalds sll %o2, 26, %g5 ! block << 26 551da177e4SLinus Torvalds6: 561da177e4SLinus Torvalds or %g5, %g4, %g5 571da177e4SLinus Torvalds ldda [%g5] ASI_M_DATAC_TAG, %g2 581da177e4SLinus Torvalds cmp %g3, %g1 ! ptag == ppage? 591da177e4SLinus Torvalds bne 7f 601da177e4SLinus Torvalds inc %o2 611da177e4SLinus Torvalds 621da177e4SLinus Torvalds andcc %g2, %o5, %g0 ! ptag VALID? 631da177e4SLinus Torvalds be 7f 641da177e4SLinus Torvalds add %g4, %o3, %g2 ! (PAGE_OFFSET + PAGE_SIZE) | (set << 5) 651da177e4SLinus Torvalds ld [%g2], %g3 661da177e4SLinus Torvalds ld [%g2 + %g7], %g3 671da177e4SLinus Torvalds add %g2, %o0, %g2 681da177e4SLinus Torvalds ld [%g2], %g3 691da177e4SLinus Torvalds ld [%g2 + %g7], %g3 701da177e4SLinus Torvalds add %g2, %o0, %g2 711da177e4SLinus Torvalds ld [%g2], %g3 721da177e4SLinus Torvalds ld [%g2 + %g7], %g3 731da177e4SLinus Torvalds add %g2, %o0, %g2 741da177e4SLinus Torvalds ld [%g2], %g3 751da177e4SLinus Torvalds b 8f 761da177e4SLinus Torvalds ld [%g2 + %g7], %g3 771da177e4SLinus Torvalds 781da177e4SLinus Torvalds7: 791da177e4SLinus Torvalds cmp %o2, 3 801da177e4SLinus Torvalds ble 6b 811da177e4SLinus Torvalds sll %o2, 26, %g5 ! block << 26 821da177e4SLinus Torvalds 831da177e4SLinus Torvalds8: inc %o1 841da177e4SLinus Torvalds cmp %o1, 0x7f 851da177e4SLinus Torvalds ble 5b 861da177e4SLinus Torvalds clr %o2 871da177e4SLinus Torvalds 881da177e4SLinus Torvalds9: retl 891da177e4SLinus Torvalds nop 901da177e4SLinus Torvalds 911da177e4SLinus Torvaldsviking_mxcc_flush_page: 921da177e4SLinus Torvalds sethi %hi(PAGE_OFFSET), %g2 931da177e4SLinus Torvalds sub %o0, %g2, %g3 941da177e4SLinus Torvalds sub %g3, -PAGE_SIZE, %g3 ! ppage + PAGE_SIZE 951da177e4SLinus Torvalds sethi %hi(MXCC_SRCSTREAM), %o3 ! assume %hi(MXCC_SRCSTREAM) == %hi(MXCC_DESTSTREAM) 961da177e4SLinus Torvalds mov 0x10, %g2 ! set cacheable bit 971da177e4SLinus Torvalds or %o3, %lo(MXCC_SRCSTREAM), %o2 981da177e4SLinus Torvalds or %o3, %lo(MXCC_DESSTREAM), %o3 991da177e4SLinus Torvalds sub %g3, MXCC_STREAM_SIZE, %g3 1001da177e4SLinus Torvalds6: 1011da177e4SLinus Torvalds stda %g2, [%o2] ASI_M_MXCC 1021da177e4SLinus Torvalds stda %g2, [%o3] ASI_M_MXCC 1031da177e4SLinus Torvalds andncc %g3, PAGE_MASK, %g0 1041da177e4SLinus Torvalds bne 6b 1051da177e4SLinus Torvalds sub %g3, MXCC_STREAM_SIZE, %g3 1061da177e4SLinus Torvalds 1071da177e4SLinus Torvalds9: retl 1081da177e4SLinus Torvalds nop 1091da177e4SLinus Torvalds 1101da177e4SLinus Torvaldsviking_flush_cache_page: 1111da177e4SLinus Torvaldsviking_flush_cache_range: 1121da177e4SLinus Torvalds#ifndef CONFIG_SMP 113961246b4SOlivier DANET ld [%o0 + VMA_VM_MM], %o0 1141da177e4SLinus Torvalds#endif 1151da177e4SLinus Torvaldsviking_flush_cache_mm: 1161da177e4SLinus Torvalds#ifndef CONFIG_SMP 1171da177e4SLinus Torvalds ld [%o0 + AOFF_mm_context], %g1 1181da177e4SLinus Torvalds cmp %g1, -1 1191da177e4SLinus Torvalds bne viking_flush_cache_all 1201da177e4SLinus Torvalds nop 1211da177e4SLinus Torvalds b,a viking_flush_cache_out 1221da177e4SLinus Torvalds#endif 1231da177e4SLinus Torvaldsviking_flush_cache_all: 1241da177e4SLinus Torvalds WINDOW_FLUSH(%g4, %g5) 1251da177e4SLinus Torvaldsviking_flush_cache_out: 1261da177e4SLinus Torvalds retl 1271da177e4SLinus Torvalds nop 1281da177e4SLinus Torvalds 1291da177e4SLinus Torvaldsviking_flush_tlb_all: 1301da177e4SLinus Torvalds mov 0x400, %g1 1311da177e4SLinus Torvalds retl 1321da177e4SLinus Torvalds sta %g0, [%g1] ASI_M_FLUSH_PROBE 1331da177e4SLinus Torvalds 1341da177e4SLinus Torvaldsviking_flush_tlb_mm: 1351da177e4SLinus Torvalds mov SRMMU_CTX_REG, %g1 1361da177e4SLinus Torvalds ld [%o0 + AOFF_mm_context], %o1 1371da177e4SLinus Torvalds lda [%g1] ASI_M_MMUREGS, %g5 1381da177e4SLinus Torvalds#ifndef CONFIG_SMP 1391da177e4SLinus Torvalds cmp %o1, -1 1401da177e4SLinus Torvalds be 1f 1411da177e4SLinus Torvalds#endif 1421da177e4SLinus Torvalds mov 0x300, %g2 1431da177e4SLinus Torvalds sta %o1, [%g1] ASI_M_MMUREGS 1441da177e4SLinus Torvalds sta %g0, [%g2] ASI_M_FLUSH_PROBE 1451da177e4SLinus Torvalds retl 1461da177e4SLinus Torvalds sta %g5, [%g1] ASI_M_MMUREGS 1471da177e4SLinus Torvalds#ifndef CONFIG_SMP 1481da177e4SLinus Torvalds1: retl 1491da177e4SLinus Torvalds nop 1501da177e4SLinus Torvalds#endif 1511da177e4SLinus Torvalds 1521da177e4SLinus Torvaldsviking_flush_tlb_range: 153961246b4SOlivier DANET ld [%o0 + VMA_VM_MM], %o0 1541da177e4SLinus Torvalds mov SRMMU_CTX_REG, %g1 1551da177e4SLinus Torvalds ld [%o0 + AOFF_mm_context], %o3 1561da177e4SLinus Torvalds lda [%g1] ASI_M_MMUREGS, %g5 1571da177e4SLinus Torvalds#ifndef CONFIG_SMP 1581da177e4SLinus Torvalds cmp %o3, -1 1591da177e4SLinus Torvalds be 2f 1601da177e4SLinus Torvalds#endif 161*8e958839SWill Deacon sethi %hi(~((1 << PGDIR_SHIFT) - 1)), %o4 1621da177e4SLinus Torvalds sta %o3, [%g1] ASI_M_MMUREGS 1631da177e4SLinus Torvalds and %o1, %o4, %o1 1641da177e4SLinus Torvalds add %o1, 0x200, %o1 1651da177e4SLinus Torvalds sta %g0, [%o1] ASI_M_FLUSH_PROBE 1661da177e4SLinus Torvalds1: sub %o1, %o4, %o1 1671da177e4SLinus Torvalds cmp %o1, %o2 1681da177e4SLinus Torvalds blu,a 1b 1691da177e4SLinus Torvalds sta %g0, [%o1] ASI_M_FLUSH_PROBE 1701da177e4SLinus Torvalds retl 1711da177e4SLinus Torvalds sta %g5, [%g1] ASI_M_MMUREGS 1721da177e4SLinus Torvalds#ifndef CONFIG_SMP 1731da177e4SLinus Torvalds2: retl 1741da177e4SLinus Torvalds nop 1751da177e4SLinus Torvalds#endif 1761da177e4SLinus Torvalds 1771da177e4SLinus Torvaldsviking_flush_tlb_page: 178961246b4SOlivier DANET ld [%o0 + VMA_VM_MM], %o0 1791da177e4SLinus Torvalds mov SRMMU_CTX_REG, %g1 1801da177e4SLinus Torvalds ld [%o0 + AOFF_mm_context], %o3 1811da177e4SLinus Torvalds lda [%g1] ASI_M_MMUREGS, %g5 1821da177e4SLinus Torvalds#ifndef CONFIG_SMP 1831da177e4SLinus Torvalds cmp %o3, -1 1841da177e4SLinus Torvalds be 1f 1851da177e4SLinus Torvalds#endif 1861da177e4SLinus Torvalds and %o1, PAGE_MASK, %o1 1871da177e4SLinus Torvalds sta %o3, [%g1] ASI_M_MMUREGS 1881da177e4SLinus Torvalds sta %g0, [%o1] ASI_M_FLUSH_PROBE 1891da177e4SLinus Torvalds retl 1901da177e4SLinus Torvalds sta %g5, [%g1] ASI_M_MMUREGS 1911da177e4SLinus Torvalds#ifndef CONFIG_SMP 1921da177e4SLinus Torvalds1: retl 1931da177e4SLinus Torvalds nop 1941da177e4SLinus Torvalds#endif 1951da177e4SLinus Torvalds 1961da177e4SLinus Torvaldsviking_flush_page_to_ram: 1971da177e4SLinus Torvaldsviking_flush_page_for_dma: 1981da177e4SLinus Torvaldsviking_flush_sig_insns: 1991da177e4SLinus Torvalds retl 2001da177e4SLinus Torvalds nop 2011da177e4SLinus Torvalds 2021da177e4SLinus Torvalds#ifdef CONFIG_SMP 2031da177e4SLinus Torvalds .globl sun4dsmp_flush_tlb_all, sun4dsmp_flush_tlb_mm 2041da177e4SLinus Torvalds .globl sun4dsmp_flush_tlb_range, sun4dsmp_flush_tlb_page 2051da177e4SLinus Torvaldssun4dsmp_flush_tlb_all: 2061da177e4SLinus Torvalds sethi %hi(sun4dsmp_flush_tlb_spin), %g3 2071da177e4SLinus Torvalds1: ldstub [%g3 + %lo(sun4dsmp_flush_tlb_spin)], %g5 2081da177e4SLinus Torvalds tst %g5 2091da177e4SLinus Torvalds bne 2f 2101da177e4SLinus Torvalds mov 0x400, %g1 2111da177e4SLinus Torvalds sta %g0, [%g1] ASI_M_FLUSH_PROBE 2121da177e4SLinus Torvalds retl 2131da177e4SLinus Torvalds stb %g0, [%g3 + %lo(sun4dsmp_flush_tlb_spin)] 2141da177e4SLinus Torvalds2: tst %g5 2151da177e4SLinus Torvalds bne,a 2b 2161da177e4SLinus Torvalds ldub [%g3 + %lo(sun4dsmp_flush_tlb_spin)], %g5 2171da177e4SLinus Torvalds b,a 1b 2181da177e4SLinus Torvalds 2191da177e4SLinus Torvaldssun4dsmp_flush_tlb_mm: 2201da177e4SLinus Torvalds sethi %hi(sun4dsmp_flush_tlb_spin), %g3 2211da177e4SLinus Torvalds1: ldstub [%g3 + %lo(sun4dsmp_flush_tlb_spin)], %g5 2221da177e4SLinus Torvalds tst %g5 2231da177e4SLinus Torvalds bne 2f 2241da177e4SLinus Torvalds mov SRMMU_CTX_REG, %g1 2251da177e4SLinus Torvalds ld [%o0 + AOFF_mm_context], %o1 2261da177e4SLinus Torvalds lda [%g1] ASI_M_MMUREGS, %g5 2271da177e4SLinus Torvalds mov 0x300, %g2 2281da177e4SLinus Torvalds sta %o1, [%g1] ASI_M_MMUREGS 2291da177e4SLinus Torvalds sta %g0, [%g2] ASI_M_FLUSH_PROBE 2301da177e4SLinus Torvalds sta %g5, [%g1] ASI_M_MMUREGS 2311da177e4SLinus Torvalds retl 2321da177e4SLinus Torvalds stb %g0, [%g3 + %lo(sun4dsmp_flush_tlb_spin)] 2331da177e4SLinus Torvalds2: tst %g5 2341da177e4SLinus Torvalds bne,a 2b 2351da177e4SLinus Torvalds ldub [%g3 + %lo(sun4dsmp_flush_tlb_spin)], %g5 2361da177e4SLinus Torvalds b,a 1b 2371da177e4SLinus Torvalds 2381da177e4SLinus Torvaldssun4dsmp_flush_tlb_range: 2391da177e4SLinus Torvalds sethi %hi(sun4dsmp_flush_tlb_spin), %g3 2401da177e4SLinus Torvalds1: ldstub [%g3 + %lo(sun4dsmp_flush_tlb_spin)], %g5 2411da177e4SLinus Torvalds tst %g5 2421da177e4SLinus Torvalds bne 3f 2431da177e4SLinus Torvalds mov SRMMU_CTX_REG, %g1 244961246b4SOlivier DANET ld [%o0 + VMA_VM_MM], %o0 2451da177e4SLinus Torvalds ld [%o0 + AOFF_mm_context], %o3 2461da177e4SLinus Torvalds lda [%g1] ASI_M_MMUREGS, %g5 247*8e958839SWill Deacon sethi %hi(~((1 << PGDIR_SHIFT) - 1)), %o4 2481da177e4SLinus Torvalds sta %o3, [%g1] ASI_M_MMUREGS 2491da177e4SLinus Torvalds and %o1, %o4, %o1 2501da177e4SLinus Torvalds add %o1, 0x200, %o1 2511da177e4SLinus Torvalds sta %g0, [%o1] ASI_M_FLUSH_PROBE 2521da177e4SLinus Torvalds2: sub %o1, %o4, %o1 2531da177e4SLinus Torvalds cmp %o1, %o2 2541da177e4SLinus Torvalds blu,a 2b 2551da177e4SLinus Torvalds sta %g0, [%o1] ASI_M_FLUSH_PROBE 2561da177e4SLinus Torvalds sta %g5, [%g1] ASI_M_MMUREGS 2571da177e4SLinus Torvalds retl 2581da177e4SLinus Torvalds stb %g0, [%g3 + %lo(sun4dsmp_flush_tlb_spin)] 2591da177e4SLinus Torvalds3: tst %g5 2601da177e4SLinus Torvalds bne,a 3b 2611da177e4SLinus Torvalds ldub [%g3 + %lo(sun4dsmp_flush_tlb_spin)], %g5 2621da177e4SLinus Torvalds b,a 1b 2631da177e4SLinus Torvalds 2641da177e4SLinus Torvaldssun4dsmp_flush_tlb_page: 2651da177e4SLinus Torvalds sethi %hi(sun4dsmp_flush_tlb_spin), %g3 2661da177e4SLinus Torvalds1: ldstub [%g3 + %lo(sun4dsmp_flush_tlb_spin)], %g5 2671da177e4SLinus Torvalds tst %g5 2681da177e4SLinus Torvalds bne 2f 2691da177e4SLinus Torvalds mov SRMMU_CTX_REG, %g1 270961246b4SOlivier DANET ld [%o0 + VMA_VM_MM], %o0 2711da177e4SLinus Torvalds ld [%o0 + AOFF_mm_context], %o3 2721da177e4SLinus Torvalds lda [%g1] ASI_M_MMUREGS, %g5 2731da177e4SLinus Torvalds and %o1, PAGE_MASK, %o1 2741da177e4SLinus Torvalds sta %o3, [%g1] ASI_M_MMUREGS 2751da177e4SLinus Torvalds sta %g0, [%o1] ASI_M_FLUSH_PROBE 2761da177e4SLinus Torvalds sta %g5, [%g1] ASI_M_MMUREGS 2771da177e4SLinus Torvalds retl 2781da177e4SLinus Torvalds stb %g0, [%g3 + %lo(sun4dsmp_flush_tlb_spin)] 2791da177e4SLinus Torvalds2: tst %g5 2801da177e4SLinus Torvalds bne,a 2b 2811da177e4SLinus Torvalds ldub [%g3 + %lo(sun4dsmp_flush_tlb_spin)], %g5 2821da177e4SLinus Torvalds b,a 1b 2831da177e4SLinus Torvalds nop 2841da177e4SLinus Torvalds#endif 285