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Searched +full:stm32mp25 +full:- +full:rcc (Results 1 – 17 of 17) sorted by relevance

/linux/Documentation/devicetree/bindings/clock/
H A Dst,stm32mp25-rcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/st,stm32mp25-rcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STM32MP25 Reset Clock Controller
10 - Gabriel Fernandez <gabriel.fernandez@foss.st.com>
13 The RCC hardware block is both a reset and a clock controller.
14 RCC makes also power management (resume/suspend).
17 include/dt-bindings/clock/st,stm32mp25-rcc.h
18 include/dt-bindings/reset/st,stm32mp25-rcc.h
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/linux/Documentation/devicetree/bindings/pci/
H A Dst,stm32-pcie-ep.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/st,stm32-pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32MP25 PCIe Endpoint
10 - Christian Bruel <christian.bruel@foss.st.com>
16 - $ref: /schemas/pci/snps,dw-pcie-ep.yaml#
17 - $ref: /schemas/pci/st,stm32-pcie-common.yaml#
21 const: st,stm32mp25-pcie-ep
25 - description: Data Bus Interface (DBI) registers.
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H A Dst,stm32-pcie-host.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/st,stm32-pcie-host.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32MP25 PCIe Root Complex
10 - Christian Bruel <christian.bruel@foss.st.com>
16 - $ref: /schemas/pci/snps,dw-pcie.yaml#
17 - $ref: /schemas/pci/st,stm32-pcie-common.yaml#
21 const: st,stm32mp25-pcie-rc
25 - description: Data Bus Interface (DBI) registers.
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/linux/Documentation/devicetree/bindings/spi/
H A Dst,stm32mp25-ospi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/st,stm32mp25-ospi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Patrice Chotard <patrice.chotard@foss.st.com>
13 - $ref: spi-controller.yaml#
17 const: st,stm32mp25-ospi
22 memory-region:
24 Memory region to be used for memory-map read access.
25 In memory-mapped mode, read access are performed from the memory
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H A Dst,stm32-spi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/st,stm32-spi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 the Serial Peripheral Interface. It supports full-duplex, half-duplex and
13 from 4 to 32-bit data size.
16 - Erwan Leray <erwan.leray@foss.st.com>
17 - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
20 - $ref: spi-controller.yaml#
21 - if:
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/linux/Documentation/devicetree/bindings/net/
H A Dstm32-dwmac.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/net/stm32-dwmac.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Alexandre Torgue <alexandre.torgue@foss.st.com>
12 - Christophe Roullier <christophe.roullier@foss.st.com>
23 - st,stm32-dwmac
24 - st,stm32mp1-dwmac
25 - st,stm32mp13-dwmac
26 - st,stm32mp25-dwmac
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/linux/Documentation/devicetree/bindings/memory-controllers/
H A Dst,stm32mp25-omm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/st,stm32mp25-omm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Patrice Chotard <patrice.chotard@foss.st.com>
13 The STM32 Octo Memory Manager is a low-level interface that enables an
17 - Two single/dual/quad/octal SPI interfaces
18 - Two ports for pin assignment
22 const: st,stm32mp25-omm
24 "#address-cells":
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H A Dst,stm32-fmc2-ebi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/st,stm32-fmc2-ebi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 asynchronous static devices (such as PSNOR, PSRAM or other memory-mapped
14 - to translate AXI transactions into the appropriate external device
16 - to meet the access time requirements of the external devices
22 - Christophe Kerello <christophe.kerello@foss.st.com>
27 - st,stm32mp1-fmc2-ebi
28 - st,stm32mp25-fmc2-ebi
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/linux/Documentation/devicetree/bindings/i2c/
H A Dst,stm32-i2c.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/i2c/st,stm32-i2c.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Pierre-Yves MORDRET <pierre-yves.mordret@foss.st.com>
13 - $ref: /schemas/i2c/i2c-controller.yaml#
14 - if:
19 - st,stm32f7-i2c
20 - st,stm32mp13-i2c
21 - st,stm32mp15-i2c
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/linux/Documentation/devicetree/bindings/rtc/
H A Dst,stm32-rtc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rtc/st,stm32-rtc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Gabriel Fernandez <gabriel.fernandez@foss.st.com>
15 - st,stm32-rtc
16 - st,stm32h7-rtc
17 - st,stm32mp1-rtc
18 - st,stm32mp25-rtc
27 clock-names:
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/linux/arch/arm64/boot/dts/st/
H A Dstm32mp253.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
11 compatible = "arm,cortex-a35";
14 enable-method = "psci";
15 power-domains = <&CPU_PD1>;
16 power-domain-names = "psci";
20 arm-pmu {
23 interrupt-affinity = <&cpu0>, <&cpu1>;
27 CPU_PD1: power-domain-cpu1 {
28 #power-domain-cells = <0>;
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H A Dstm32mp233.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2025 - All Rights Reserved
11 compatible = "arm,cortex-a35";
14 enable-method = "psci";
15 power-domains = <&cpu1_pd>;
16 power-domain-names = "psci";
20 arm-pmu {
23 interrupt-affinity = <&cpu0>, <&cpu1>;
27 cpu1_pd: power-domain-cpu1 {
28 #power-domain-cells = <0>;
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H A Dstm32mp235.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2025 - All Rights Reserved
10 compatible = "st,stm32mp25-vdec";
13 clocks = <&rcc CK_BUS_VDEC>;
14 access-controllers = <&rifsc 89>;
/linux/Documentation/devicetree/bindings/mtd/
H A Dst,stm32-fmc2-nand.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/st,stm32-fmc2-nand.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Christophe Kerello <christophe.kerello@foss.st.com>
15 - st,stm32mp15-fmc2
16 - st,stm32mp1-fmc2-nfc
17 - st,stm32mp25-fmc2-nfc
28 - description: tx DMA channel
29 - description: rx DMA channel
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/linux/drivers/pci/controller/dwc/
H A Dpcie-stm32-ep.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * STMicroelectronics STM32MP25 PCIe endpoint driver.
18 #include "pcie-designware.h"
19 #include "pcie-stm32.h"
44 regmap_update_bits(stm32_pcie->regmap, SYSCFG_PCIECR, in stm32_pcie_enable_link()
55 regmap_update_bits(stm32_pcie->regmap, SYSCFG_PCIECR, STM32MP25_PCIECR_LTSSM_EN, 0); in stm32_pcie_disable_link()
63 dev_dbg(pci->dev, "Enable link\n"); in stm32_pcie_start_link()
67 dev_err(pci->dev, "PCIe cannot establish link: %d\n", ret); in stm32_pcie_start_link()
71 enable_irq(stm32_pcie->perst_irq); in stm32_pcie_start_link()
80 dev_dbg(pci->dev, "Disable link\n"); in stm32_pcie_stop_link()
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/linux/Documentation/devicetree/bindings/mmc/
H A Darm,pl18x.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
11 - Ulf Hansson <ulf.hansson@linaro.org>
20 - $ref: /schemas/arm/primecell.yaml#
21 - $ref: mmc-controller.yaml#
29 - arm,pl180
30 - arm,pl181
31 - arm,pl18x
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/linux/drivers/clk/stm32/
H A Dclk-stm32mp25.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved
8 #include <linux/clk-provider.h>
12 #include "clk-stm32-core.h"
13 #include "reset-stm32.h"
16 #include <dt-bindings/clock/st,stm32mp25-rcc.h>
17 #include <dt-bindings/reset/st,stm32mp25-rcc.h>
20 #define SECF_NONE -1
523 /* CSI-HOST */
539 /* CSI-PHY */
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