Home
last modified time | relevance | path

Searched +full:stm32h7 +full:- +full:sai (Results 1 – 3 of 3) sorted by relevance

/linux/sound/soc/stm/
H A Dstm32_sai.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * STM32 ALSA SoC Digital Audio Interface (SAI) driver.
5 * Copyright (C) 2016, STMicroelectronics - All Rights Reserved
22 static int stm32_sai_get_parent_clk(struct stm32_sai_data *sai);
35 * - STM32H7: rely on default settings
36 * - STM32MP1: retrieve settings from registers
47 * - do not use SAI parent clock source selection
48 * - do not use DMA burst mode
55 { .compatible = "st,stm32f4-sai", .data = (void *)&stm32_sai_conf_f4 },
56 { .compatible = "st,stm32h7-sai", .data = (void *)&stm32_sai_conf_h7 },
[all …]
/linux/drivers/clk/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
59 Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs
87 These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each.
91 tristate "Raspberry Pi RP1-based clock support"
96 This multi-function device has 3 main PLLs and several clock
97 generators to drive the internal sub-peripherals.
106 multi-function device has one fixed-rate oscillator, clocked
137 be pre-programmed to support other configurations and features not yet
186 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
204 For example, the CDCE925 contains two PLLs with spread-spectrum
[all …]
/linux/drivers/iio/adc/
H A Dstm32-dfsdm-core.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
24 #include "stm32-dfsdm.h"
27 * struct stm32_dfsdm_dev_data - DFSDM compatible configuration data
31 * @regmap_cfg: SAI register map configuration pointer
114 ret = clk_prepare_enable(priv->clk); in stm32_dfsdm_clk_prepare_enable()
115 if (ret || !priv->aclk) in stm32_dfsdm_clk_prepare_enable()
118 ret = clk_prepare_enable(priv->aclk); in stm32_dfsdm_clk_prepare_enable()
120 clk_disable_unprepare(priv->clk); in stm32_dfsdm_clk_prepare_enable()
129 clk_disable_unprepare(priv->aclk); in stm32_dfsdm_clk_disable_unprepare()
[all …]