Searched +full:stm32 +full:- +full:uart (Results 1 – 15 of 15) sorted by relevance
/linux/Documentation/devicetree/bindings/serial/ |
H A D | st,stm32-uart.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/serial/st,stm32-uart.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 8 - Erwan Le Ray <erwan.leray@foss.st.com> 10 title: STMicroelectronics STM32 USART 15 - st,stm32-uart 16 - st,stm32f7-uart 17 - st,stm32h7-uart 32 description: label associated with this uart [all …]
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/linux/arch/arm/boot/dts/st/ |
H A D | stm32f746.dtsi | 2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com> 4 * This file is dual-licensed: you can use it either under the terms 43 #include "../armv7-m.dtsi" 44 #include <dt-bindings/clock/stm32fx-clock.h> 45 #include <dt-bindings/mfd/stm32f7-rcc.h> 48 #address-cells = <1>; 49 #size-cells = <1>; 52 clk_hse: clk-hse { 53 #clock-cells = <0>; 54 compatible = "fixed-clock"; [all …]
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H A D | stm32f429.dtsi | 2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com> 4 * This file is dual-licensed: you can use it either under the terms 22 * MA 02110-1301 USA 48 #include "../armv7-m.dtsi" 49 #include <dt-bindings/clock/stm32fx-clock.h> 50 #include <dt-bindings/mfd/stm32f4-rcc.h> 53 #address-cells = <1>; 54 #size-cells = <1>; 57 clk_hse: clk-hse { 58 #clock-cells = <0>; [all …]
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H A D | stm32h743.dtsi | 2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com> 4 * This file is dual-licensed: you can use it either under the terms 43 #include "../armv7-m.dtsi" 44 #include <dt-bindings/clock/stm32h7-clks.h> 45 #include <dt-bindings/mfd/stm32h7-rcc.h> 46 #include <dt-bindings/interrupt-controller/irq.h> 49 #address-cells = <1>; 50 #size-cells = <1>; 53 clk_hse: clk-hse { 54 #clock-cells = <0>; [all …]
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H A D | stm32mp15xx-dhcor-avenger96.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) 3 * Copyright (C) Linaro Ltd 2019 - All Rights Reserved 9 #include "stm32mp15xx-dhcor-io1v8.dtsi" 22 cec_clock: clk-cec-fixed { 23 #clock-cells = <0>; 24 compatible = "fixed-clock"; 25 clock-frequency = <24000000>; 29 stdout-path = "serial0:115200n8"; 32 hdmi-out { 33 compatible = "hdmi-connector"; [all …]
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/linux/Documentation/devicetree/bindings/bus/ |
H A D | st,stm32-etzpc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/bus/st,stm32-etzpc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STM32 Extended TrustZone protection controller 11 devices with programmable-security attributes (securable resources). 14 - Gatien Chevallier <gatien.chevallier@foss.st.com> 20 const: st,stm32-etzpc 22 - compatible 27 - const: st,stm32-etzpc [all …]
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H A D | st,stm32mp25-rifsc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/bus/st,stm32mp25-rifsc.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STM32 Resource isolation framework security controller 10 - Gatien Chevallier <gatien.chevallier@foss.st.com> 14 designed to enforce and manage isolation of STM32 hardware resources like 19 - RISC registers associated with RISUP logic (resource isolation device unit 20 for peripherals), assign all non-RIF aware peripherals to zero, one or 22 - RIMC registers: associated with RIMU logic (resource isolation master [all …]
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/linux/Documentation/devicetree/bindings/dma/stm32/ |
H A D | st,stm32-dma.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/dma/stm32/st,stm32-dma.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: STMicroelectronics STM32 DMA Controller 10 The STM32 DMA is a general-purpose direct memory access controller capable of 12 DMA clients connected to the STM32 DMA controller must use the format 13 described in the dma.txt file, using a four-cell specifier for each 19 -bit 9: Peripheral Increment Address 22 -bit 10: Memory Increment Address [all …]
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/linux/drivers/bus/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 37 Driver for the Broadcom Set Top Box System-on-a-chip internal bus 42 bool "Baikal-T1 APB-bus driver" 46 Baikal-T1 AXI-APB bridge is used to access the SoC subsystem CSRs. 53 errors counter. The counter and the APB-bus operations timeout can be 57 bool "Baikal-T1 AXI-bus driver" 61 AXI3-bus is the main communication bus connecting all high-speed 62 peripheral IP-cores with RAM controller and with MIPS P5600 cores on 63 Baikal-T1 SoC. Traffic arbitration is done by means of DW AMBA 3 AXI 114 cores. This bus is for per-CPU tightly coupled devices such as the [all …]
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/linux/include/uapi/linux/ |
H A D | serial_core.h | 1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */ 19 #define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */ 20 #define PORT_OCTEON 17 /* Cavium OCTEON internal UART */ 21 #define PORT_AR7 18 /* Texas Instruments AR7 internal UART */ 22 #define PORT_U6_16550A 19 /* ST-Ericsson U6xxx internal UART */ 23 #define PORT_TEGRA 20 /* NVIDIA Tegra internal UART */ 24 #define PORT_XR17D15X 21 /* Exar XR17D15x UART */ 25 #define PORT_LPC3220 22 /* NXP LPC32xx SoC "Standard" UART */ 29 #define PORT_ALTR_16550_F32 26 /* Altera 16550 UART with 32 FIFOs */ 30 #define PORT_ALTR_16550_F64 27 /* Altera 16550 UART with 64 FIFOs */ [all …]
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/linux/drivers/tty/serial/ |
H A D | stm32-usart.c | 1 // SPDX-License-Identifier: GPL-2.0 5 * Authors: Maxime Coquelin <mcoquelin.stm32@gmail.com> 9 * Inspired by st-asc.c from STMicroelectronics (c) 16 #include <linux/dma-direction.h> 18 #include <linux/dma-mapping.h> 37 #include "stm32-usart.h" 124 val = readl_relaxed(port->membase + reg); in stm32_usart_set_bits() 126 writel_relaxed(val, port->membase + reg); in stm32_usart_set_bits() 133 val = readl_relaxed(port->membase + reg); in stm32_usart_clr_bits() 135 writel_relaxed(val, port->membase + reg); in stm32_usart_clr_bits() [all …]
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/linux/drivers/dma/stm32/ |
H A D | stm32-dma.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Driver for STM32 DMA controller 5 * Inspired by dma-jz4740.c and tegra20-apb-dma.c 9 * Pierre-Yves Mordret <pierre-yves.mordret@st.com> 16 #include <linux/dma-mapping.h> 31 #include "../virt-dma.h" 49 * If (chan->id % 4) is 2 or 3, left shift the mask by 16 bits; 64 #define STM32_DMA_SCR_TRBUFF BIT(20) /* Bufferable transfer for USART/UART */ 158 * struct stm32_dma_cfg - STM32 DMA custom configuration 197 * struct stm32_dma_mdma_config - STM32 DMA MDMA configuration [all …]
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/linux/ |
H A D | MAINTAINERS | 5 ---------- [all...] |
/linux/drivers/watchdog/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 16 on-line as fast as possible after a lock-up. There's both a watchdog 21 <file:Documentation/watchdog/watchdog-api.rst> in the kernel source. 51 bool "Update boot-enabled watchdog until userspace takes over" 77 bool "Enable watchdog hrtimer-based pretimeouts" 198 tristate "ChromeOS EC-based watchdog" 252 tristate "Watchdog device controlled through GPIO-line" 257 controlled through GPIO-line. 280 will be called lenovo-se10-wdt. 394 module will be called mlx-wdt. [all …]
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/linux/drivers/clk/stm32/ |
H A D | clk-stm32mp25.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) STMicroelectronics 2023 - All Rights Reserved 8 #include <linux/clk-provider.h> 12 #include "clk-stm32-core.h" 13 #include "reset-stm32.h" 16 #include <dt-bindings/clock/st,stm32mp25-rcc.h> 17 #include <dt-bindings/reset/st,stm32mp25-rcc.h> 20 #define SECF_NONE -1 523 /* CSI-HOST */ 539 /* CSI-PHY */ [all …]
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