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/linux/arch/arm/boot/dts/st/
H A Dstm32f746.dtsi2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "../armv7-m.dtsi"
44 #include <dt-bindings/clock/stm32fx-clock.h>
45 #include <dt-bindings/mfd/stm32f7-rcc.h>
46 #include <dt-bindings/interrupt-controller/irq.h>
49 #address-cells = <1>;
50 #size-cells = <1>;
53 clk_hse: clk-hse {
54 #clock-cells = <0>;
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H A Dstm32f429.dtsi2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
22 * MA 02110-1301 USA
48 #include "../armv7-m.dtsi"
49 #include <dt-bindings/clock/stm32fx-clock.h>
50 #include <dt-bindings/mfd/stm32f4-rcc.h>
53 #address-cells = <1>;
54 #size-cells = <1>;
57 clk_hse: clk-hse {
58 #clock-cells = <0>;
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H A Dstm32h743.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "../armv7-m.dtsi"
44 #include <dt-bindings/clock/stm32h7-clks.h>
45 #include <dt-bindings/mfd/stm32h7-rcc.h>
46 #include <dt-bindings/interrupt-controller/irq.h>
49 #address-cells = <1>;
50 #size-cells = <1>;
53 clk_hse: clk-hse {
54 #clock-cells = <0>;
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H A Dstm32f469-disco.dts2 * Copyright 2016 - Lee Jones <lee.jones@linaro.org>
4 * This file is dual-licensed: you can use it either under the terms
22 * MA 02110-1301 USA
48 /dts-v1/;
50 #include "stm32f469-pinctrl.dtsi"
51 #include <dt-bindings/gpio/gpio.h>
52 #include <dt-bindings/input/input.h>
55 model = "STMicroelectronics STM32F469i-DISCO board";
56 compatible = "st,stm32f469i-disco", "st,stm32f469";
60 stdout-path = "serial0:115200n8";
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H A Dstm32429i-eval.dts2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
22 * MA 02110-1301 USA
48 /dts-v1/;
50 #include "stm32f429-pinctrl.dtsi"
51 #include <dt-bindings/input/input.h>
52 #include <dt-bindings/gpio/gpio.h>
53 #include <dt-bindings/media/video-interfaces.h>
56 model = "STMicroelectronics STM32429i-EVAL board";
57 compatible = "st,stm32429i-eval", "st,stm32f429";
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H A Dstm32746g-eval.dts2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
45 #include "stm32f746-pinctrl.dtsi"
46 #include <dt-bindings/input/input.h>
47 #include <dt-bindings/interrupt-controller/irq.h>
50 model = "STMicroelectronics STM32746g-EVAL board";
51 compatible = "st,stm32746g-eval", "st,stm32f746";
55 stdout-path = "serial0:115200n8";
68 compatible = "gpio-leds";
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H A Dstm32f769-disco.dts2 * Copyright 2017 - Vikas MANOCHA <vikas.manocha@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
45 #include "stm32f769-pinctrl.dtsi"
46 #include <dt-bindings/input/input.h>
47 #include <dt-bindings/gpio/gpio.h>
50 model = "STMicroelectronics STM32F769-DISCO board";
51 compatible = "st,stm32f769-disco", "st,stm32f769";
55 stdout-path = "serial0:115200n8";
63 reserved-memory {
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H A Dstm32f429-disco.dts2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
22 * MA 02110-1301 USA
48 /dts-v1/;
50 #include "stm32f429-pinctrl.dtsi"
51 #include <dt-bindings/input/input.h>
52 #include <dt-bindings/interrupt-controller/irq.h>
53 #include <dt-bindings/gpio/gpio.h>
56 model = "STMicroelectronics STM32F429i-DISCO board";
57 compatible = "st,stm32f429i-disco", "st,stm32f429";
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H A Dstm32f746-disco.dts2 * Copyright 2017 - Vikas MANOCHA <vikas.manocha@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 /dts-v1/;
45 #include "stm32f746-pinctrl.dtsi"
46 #include <dt-bindings/gpio/gpio.h>
47 #include <dt-bindings/input/input.h>
48 #include <dt-bindings/interrupt-controller/irq.h>
51 model = "STMicroelectronics STM32F746-DISCO board";
52 compatible = "st,stm32f746-disco", "st,stm32f746";
56 stdout-path = "serial0:115200n8";
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/linux/Documentation/devicetree/bindings/mfd/
H A Dst,stm32-lptimer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/st,stm32-lptimer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 Low-Power Timers
10 The STM32 Low-Power Timer (LPTIM) is a 16-bit timer that provides several
12 - PWM output (with programmable prescaler, configurable polarity)
13 - Trigger source for STM32 ADC/DAC (LPTIM_OUT)
14 - Several counter modes:
15 - quadrature encoder to detect angular position and direction of rotary
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/linux/drivers/pwm/
H A Dpwm-stm32-lp.c1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Low-Power Timer PWM driver
9 * Inspired by Gerald Baeza's pwm-stm32 driver
13 #include <linux/mfd/stm32-lptimer.h>
18 #include <linux/pwm.h>
31 /* STM32 Low-Power Timer is preceded by a configurable power-of-2 prescaler */
40 /* Only one PWM on this LPTIMER: enable, prescaler and reload value can be changed */ in stm32_pwm_lp_update_allowed()
41 if (!priv->num_cc_chans) in stm32_pwm_lp_update_allowed()
44 ret = regmap_read(priv->regmap, STM32_LPTIM_CCMR1, &ccmr1); in stm32_pwm_lp_update_allowed()
71 if (!priv->num_cc_chans) in stm32_pwm_lp_compare_channel_apply()
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H A Dpwm-stm32.c1 // SPDX-License-Identifier: GPL-2.0
7 * Inspired by timer-stm32.c from Maxime Coquelin
8 * pwm-atmel.c from Bo Shen
12 #include <linux/mfd/stm32-timers.h>
17 #include <linux/pwm.h>
31 struct mutex lock; /* protect pwm config/enable */
50 regmap_read(dev->regmap, TIM_CCER, &ccer); in active_channels()
63 struct pwm_device *pwm, in stm32_pwm_round_waveform_tohw() argument
69 unsigned int ch = pwm->hwpwm; in stm32_pwm_round_waveform_tohw()
74 if (wf->period_length_ns == 0) { in stm32_pwm_round_waveform_tohw()
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/linux/drivers/bus/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
37 Driver for the Broadcom Set Top Box System-on-a-chip internal bus
42 bool "Baikal-T1 APB-bus driver"
46 Baikal-T1 AXI-APB bridge is used to access the SoC subsystem CSRs.
53 errors counter. The counter and the APB-bus operations timeout can be
57 bool "Baikal-T1 AXI-bus driver"
61 AXI3-bus is the main communication bus connecting all high-speed
62 peripheral IP-cores with RAM controller and with MIPS P5600 cores on
63 Baikal-T1 SoC. Traffic arbitration is done by means of DW AMBA 3 AXI
120 cores. This bus is for per-CPU tightly coupled devices such as the
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/linux/Documentation/ABI/testing/
H A Dsysfs-bus-iio-adc-stm325 The STM32 ADC can be configured to use external trigger sources
6 (e.g. timers, pwm or exti gpio). Then, it can be tuned to start
9 - "rising-edge"
10 - "falling-edge"
11 - "both-edges".
/linux/drivers/clocksource/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
60 bool "OMAP dual-mode timer driver" if ARCH_K3 || COMPILE_TEST
64 Enables the support for the TI dual-mode timer driver.
198 Enable 24-bit TIMER0 and TIMER1 counters in the NPCM7xx architecture,
221 32-bit free running decrementing counters.
256 bool "Integrator-AP timer driver" if COMPILE_TEST
259 Enables support for the Integrator-AP timer.
284 available on many OMAP-like platforms.
287 bool "Clocksource for STM32 SoCs" if !ARCH_STM32
293 bool "Low power clocksource for STM32 SoCs"
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_TIMER_OF) += timer-of.o
3 obj-$(CONFIG_TIMER_PROBE) += timer-probe.o
4 obj-$(CONFIG_ATMEL_PIT) += timer-atmel-pit.o
5 obj-$(CONFIG_ATMEL_ST) += timer-atmel-st.o
6 obj-$(CONFIG_ATMEL_TCB_CLKSRC) += timer-atmel-tcb.o
7 obj-$(CONFIG_X86_PM_TIMER) += acpi_pm.o
8 obj-$(CONFIG_SCx200HR_TIMER) += scx200_hrt.o
9 obj-$(CONFIG_CS5535_CLOCK_EVENT_SRC) += timer-cs5535.o
10 obj-$(CONFIG_CLKSRC_JCORE_PIT) += jcore-pit.o
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/linux/drivers/clk/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
59 Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs
87 These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each.
91 tristate "Raspberry Pi RP1-based clock support"
96 This multi-function device has 3 main PLLs and several clock
97 generators to drive the internal sub-peripherals.
106 multi-function device has one fixed-rate oscillator, clocked
137 be pre-programmed to support other configurations and features not yet
186 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
204 For example, the CDCE925 contains two PLLs with spread-spectrum
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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