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/linux/Documentation/devicetree/bindings/mfd/
H A Dst,stm32-lptimer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/st,stm32-lptimer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectronics STM32 Low-Power Timers
10 The STM32 Low-Power Timer (LPTIM) is a 16-bit timer that provides several
12 - PWM output (with programmable prescaler, configurable polarity)
13 - Trigger source for STM32 ADC/DAC (LPTIM_OUT)
14 - Several counter modes:
15 - quadrature encoder to detect angular position and direction of rotary
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/linux/drivers/iio/trigger/
H A Dstm32-lptimer-trigger.c1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Low-Power Timer Trigger driver
9 * Inspired by Benjamin Gaignard's stm32-timer-trigger driver
13 #include <linux/iio/timer/stm32-lptim-trigger.h>
14 #include <linux/mfd/stm32-lptimer.h>
28 /* List Low-Power Timer triggers for H7, MP13, MP15 */
35 /* List Low-Power Timer triggers for STM32MP25 */
62 if (indio_dev->modes & INDIO_HARDWARE_TRIGGERED) in stm32_lptim_validate_device()
65 return -EINVAL; in stm32_lptim_validate_device()
76 * return true if the trigger is a valid STM32 IIO Low-Power Timer Trigger
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
7 menu "Triggers - standalone"
17 module will be called iio-trig-hrtimer.
26 module will be called iio-trig-interrupt.
29 tristate "STM32 Low-Power Timer Trigger"
32 Select this option to enable STM32 Low-Power Timer Trigger.
33 This can be used as trigger source for STM32 internal ADC
37 module will be called stm32-lptimer-trigger.
40 tristate "STM32 Timer Trigger"
43 Select this option to enable STM32 Timer Trigger
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 # Makefile for triggers not associated with iio-devices
8 obj-$(CONFIG_IIO_HRTIMER_TRIGGER) += iio-trig-hrtimer.o
9 obj-$(CONFIG_IIO_INTERRUPT_TRIGGER) += iio-trig-interrupt.o
10 obj-$(CONFIG_IIO_STM32_LPTIMER_TRIGGER) += stm32-lptimer-trigger.o
11 obj-$(CONFIG_IIO_STM32_TIMER_TRIGGER) += stm32-timer-trigger.o
12 obj-$(CONFIG_IIO_SYSFS_TRIGGER) += iio-trig-sysfs.o
13 obj-$(CONFIG_IIO_TIGHTLOOP_TRIGGER) += iio-trig-loop.o
/linux/arch/arm/boot/dts/st/
H A Dstm32h743.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "../armv7-m.dtsi"
44 #include <dt-bindings/clock/stm32h7-clks.h>
45 #include <dt-bindings/mfd/stm32h7-rcc.h>
46 #include <dt-bindings/interrupt-controller/irq.h>
49 #address-cells = <1>;
50 #size-cells = <1>;
53 clk_hse: clk-hse {
54 #clock-cells = <0>;
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H A Dstm32f746.dtsi2 * Copyright 2015 - Maxime Coquelin <mcoquelin.stm32@gmail.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "../armv7-m.dtsi"
44 #include <dt-bindings/clock/stm32fx-clock.h>
45 #include <dt-bindings/mfd/stm32f7-rcc.h>
46 #include <dt-bindings/interrupt-controller/irq.h>
49 #address-cells = <1>;
50 #size-cells = <1>;
53 clk_hse: clk-hse {
54 #clock-cells = <0>;
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/linux/drivers/clocksource/
H A Dtimer-stm32-lp.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
12 #include <linux/mfd/stm32-lptimer.h>
44 regmap_write(priv->reg, STM32_LPTIM_CR, 0); in stm32_clkevent_lp_shutdown()
45 regmap_write(priv->reg, STM32_LPTIM_IER, 0); in stm32_clkevent_lp_shutdown()
47 regmap_write(priv->reg, STM32_LPTIM_ICR, STM32_LPTIM_ARRMCF); in stm32_clkevent_lp_shutdown()
57 regmap_read(priv->reg, STM32_LPTIM_CR, &val); in stm32mp25_clkevent_lp_set_evt()
59 /* Enable LPTIMER to be able to write into IER and ARR registers */ in stm32mp25_clkevent_lp_set_evt()
60 regmap_write(priv->reg, STM32_LPTIM_CR, STM32_LPTIM_ENABLE); in stm32mp25_clkevent_lp_set_evt()
64 * 62.5 micro-seconds, round it up. in stm32mp25_clkevent_lp_set_evt()
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/linux/drivers/pwm/
H A Dpwm-stm32-lp.c1 // SPDX-License-Identifier: GPL-2.0
3 * STM32 Low-Power Timer PWM driver
9 * Inspired by Gerald Baeza's pwm-stm32 driver
13 #include <linux/mfd/stm32-lptimer.h>
31 /* STM32 Low-Power Timer is preceded by a configurable power-of-2 prescaler */
40 /* Only one PWM on this LPTIMER: enable, prescaler and reload value can be changed */ in stm32_pwm_lp_update_allowed()
41 if (!priv->num_cc_chans) in stm32_pwm_lp_update_allowed()
44 ret = regmap_read(priv->regmap, STM32_LPTIM_CCMR1, &ccmr1); in stm32_pwm_lp_update_allowed()
71 if (!priv->num_cc_chans) in stm32_pwm_lp_compare_channel_apply()
74 ret = regmap_read(priv->regmap, STM32_LPTIM_CCMR1, &ccmr1); in stm32_pwm_lp_compare_channel_apply()
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/linux/drivers/counter/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0-only
6 obj-$(CONFIG_COUNTER) += counter.o
7 counter-y := counter-core.o counter-sysfs.o counter-chrdev.o
9 obj-$(CONFIG_I8254) += i8254.o
10 obj-$(CONFIG_104_QUAD_8) += 104-quad-8.o
11 obj-$(CONFIG_INTERRUPT_CNT) += interrupt-cnt.o
12 obj-$(CONFIG_RZ_MTU3_CNT) += rz-mtu3-cnt.o
13 obj-$(CONFIG_STM32_TIMER_CNT) += stm32-timer-cnt.o
14 obj-$(CONFIG_STM32_LPTIMER_CNT) += stm32-lptimer-cnt.o
15 obj-$(CONFIG_TI_EQEP) += ti-eqep.o
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H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
31 tristate "ACCES 104-QUAD-8 driver"
37 Say yes here to build support for the ACCES 104-QUAD-8 quadrature
38 encoder counter/interface device family (104-QUAD-8, 104-QUAD-4).
41 operation on the respective count value attribute. The 104-QUAD-8
58 module will be called ftm-quaddec.
69 will be called intel-qep.
79 module will be called interrupt-cnt.
91 module will be called microchip-tcb-capture.
98 SoCs. This IP supports both 16-bit and 32-bit phase counting mode
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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