Lines Matching +full:stm32 +full:- +full:lptimer

1 // SPDX-License-Identifier: GPL-2.0
3  * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
11 #include <linux/mfd/stm32-lptimer.h>
42 	regmap_write(priv->reg, STM32_LPTIM_CR, 0);
43 	regmap_write(priv->reg, STM32_LPTIM_IER, 0);
45 	regmap_write(priv->reg, STM32_LPTIM_ICR, STM32_LPTIM_ARRMCF);
56 	/* disable LPTIMER to be able to write into IER register*/
57 	regmap_write(priv->reg, STM32_LPTIM_CR, 0);
59 	regmap_write(priv->reg, STM32_LPTIM_IER, STM32_LPTIM_ARRMIE);
60 	/* enable LPTIMER to be able to write into ARR register */
61 	regmap_write(priv->reg, STM32_LPTIM_CR, STM32_LPTIM_ENABLE);
63 	regmap_write(priv->reg, STM32_LPTIM_ARR, evt);
67 		regmap_write(priv->reg, STM32_LPTIM_CR,
70 		regmap_write(priv->reg, STM32_LPTIM_CR,
87 	return stm32_clkevent_lp_set_timer(priv->period, clkevt, true);
94 	return stm32_clkevent_lp_set_timer(priv->period, clkevt, false);
102 	regmap_write(priv->reg, STM32_LPTIM_ICR, STM32_LPTIM_ARRMCF);
104 	if (clkevt->event_handler)
105 		clkevt->event_handler(clkevt);
120 	regmap_write(priv->reg, STM32_LPTIM_CFGR, i << CFGR_PSC_OFFSET);
124 	priv->period = DIV_ROUND_UP(*rate, HZ);
125 	priv->psc = i;
135 	clk_disable_unprepare(priv->clk);
142 	clk_prepare_enable(priv->clk);
145 	regmap_write(priv->reg, STM32_LPTIM_CFGR, priv->psc << CFGR_PSC_OFFSET);
151 	priv->clkevt.name = np->full_name;
152 	priv->clkevt.cpumask = cpu_possible_mask;
153 	priv->clkevt.features = CLOCK_EVT_FEAT_PERIODIC |
155 	priv->clkevt.set_state_shutdown = stm32_clkevent_lp_shutdown;
156 	priv->clkevt.set_state_periodic = stm32_clkevent_lp_set_periodic;
157 	priv->clkevt.set_state_oneshot = stm32_clkevent_lp_set_oneshot;
158 	priv->clkevt.set_next_event = stm32_clkevent_lp_set_next_event;
159 	priv->clkevt.rating = STM32_LP_RATING;
160 	priv->clkevt.suspend = stm32_clkevent_lp_suspend;
161 	priv->clkevt.resume = stm32_clkevent_lp_resume;
163 	clockevents_config_and_register(&priv->clkevt, rate, 0x1,
169 	struct stm32_lptimer *ddata = dev_get_drvdata(pdev->dev.parent);
174 	priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
176 		return -ENOMEM;
178 	priv->reg = ddata->regmap;
179 	priv->clk = ddata->clk;
180 	ret = clk_prepare_enable(priv->clk);
182 		return -EINVAL;
184 	rate = clk_get_rate(priv->clk);
186 		ret = -EINVAL;
190 	irq = platform_get_irq(to_platform_device(pdev->dev.parent), 0);
196 	if (of_property_read_bool(pdev->dev.parent->of_node, "wakeup-source")) {
197 		device_set_wakeup_capable(&pdev->dev, true);
199 		ret = dev_pm_set_wake_irq(&pdev->dev, irq);
204 	ret = devm_request_irq(&pdev->dev, irq, stm32_clkevent_lp_irq_handler,
205 			       IRQF_TIMER, pdev->name, &priv->clkevt);
211 	stm32_clkevent_lp_init(priv, pdev->dev.parent->of_node, rate);
213 	priv->dev = &pdev->dev;
218 	clk_disable_unprepare(priv->clk);
223 	{ .compatible = "st,stm32-lptimer-timer", },
231 		.name = "stm32-lptimer-timer",
238 MODULE_ALIAS("platform:stm32-lptimer-timer");
239 MODULE_DESCRIPTION("STMicroelectronics STM32 clockevent low power driver");