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/linux/drivers/iio/dac/
H A Dad5592r-base.c26 struct ad5592r_state *st = gpiochip_get_data(chip); in ad5592r_gpio_get() local
30 scoped_guard(mutex, &st->gpio_lock) { in ad5592r_gpio_get()
31 if (st->gpio_out & BIT(offset)) in ad5592r_gpio_get()
32 val = st->gpio_val; in ad5592r_gpio_get()
34 ret = st->ops->gpio_read(st, &val); in ad5592r_gpio_get()
46 struct ad5592r_state *st = gpiochip_get_data(chip); in ad5592r_gpio_set() local
48 guard(mutex)(&st->gpio_lock); in ad5592r_gpio_set()
51 st->gpio_val |= BIT(offset); in ad5592r_gpio_set()
53 st->gpio_val &= ~BIT(offset); in ad5592r_gpio_set()
55 return st->ops->reg_write(st, AD5592R_REG_GPIO_SET, st->gpio_val); in ad5592r_gpio_set()
[all …]
H A Dad3552r-hs.c72 static int ad3552r_hs_reg_read(struct ad3552r_hs_state *st, u32 reg, u32 *val, in ad3552r_hs_reg_read() argument
76 WARN_ON_ONCE(st->config_d & AD3552R_MASK_SPI_CONFIG_DDR); in ad3552r_hs_reg_read()
78 return st->data->bus_reg_read(st->back, reg, val, xfer_size); in ad3552r_hs_reg_read()
81 static int ad3552r_hs_set_data_source(struct ad3552r_hs_state *st, in ad3552r_hs_set_data_source() argument
86 for (i = 0; i < st->model_data->num_hw_channels; ++i) { in ad3552r_hs_set_data_source()
87 ret = iio_backend_data_source_set(st->back, i, type); in ad3552r_hs_set_data_source()
95 static int ad3552r_hs_update_reg_bits(struct ad3552r_hs_state *st, u32 reg, in ad3552r_hs_update_reg_bits() argument
101 ret = ad3552r_hs_reg_read(st, reg, &rval, xfer_size); in ad3552r_hs_update_reg_bits()
107 return st->data->bus_reg_write(st->back, reg, rval, xfer_size); in ad3552r_hs_update_reg_bits()
114 struct ad3552r_hs_state *st = iio_priv(indio_dev); in ad3552r_hs_read_raw() local
[all …]
/linux/Documentation/devicetree/bindings/iio/
H A Dst,st-sensors.yaml4 $id: http://devicetree.org/schemas/iio/st,st-sensors.yaml#
16 - Denis Ciocca <denis.ciocca@st.com>
24 - st,h3lis331dl-accel
25 - st,lis2de12
26 - st,lis2dw12
27 - st,lis2hh12
28 - st,lis2dh12-accel
29 - st,lis2ds12
30 - st,lis302dl
31 - st,lis331dl-accel
[all …]
/linux/drivers/gpu/drm/arm/display/komeda/
H A Dkomeda_private_obj.c11 komeda_component_state_reset(struct komeda_component_state *st) in komeda_component_state_reset() argument
13 st->binding_user = NULL; in komeda_component_state_reset()
14 st->affected_inputs = st->active_inputs; in komeda_component_state_reset()
15 st->active_inputs = 0; in komeda_component_state_reset()
16 st->changed_active_inputs = 0; in komeda_component_state_reset()
22 struct komeda_layer_state *st; in komeda_layer_atomic_duplicate_state() local
24 st = kmemdup(obj->state, sizeof(*st), GFP_KERNEL); in komeda_layer_atomic_duplicate_state()
25 if (!st) in komeda_layer_atomic_duplicate_state()
28 komeda_component_state_reset(&st->base); in komeda_layer_atomic_duplicate_state()
29 __drm_atomic_helper_private_obj_duplicate_state(obj, &st->base.obj); in komeda_layer_atomic_duplicate_state()
[all …]
/linux/drivers/macintosh/
H A Dwindfarm_pid.c25 void wf_pid_init(struct wf_pid_state *st, struct wf_pid_param *param) in wf_pid_init() argument
27 memset(st, 0, sizeof(struct wf_pid_state)); in wf_pid_init()
28 st->param = *param; in wf_pid_init()
29 st->first = 1; in wf_pid_init()
33 s32 wf_pid_run(struct wf_pid_state *st, s32 new_sample) in wf_pid_run() argument
37 int i, hlen = st->param.history_len; in wf_pid_run()
40 error = new_sample - st->param.itarget; in wf_pid_run()
43 if (st->first) { in wf_pid_run()
45 st->samples[i] = new_sample; in wf_pid_run()
46 st->errors[i] = error; in wf_pid_run()
[all …]
/linux/drivers/hwmon/
H A Dltc4282.c161 struct ltc4282_state *st = container_of(hw, struct ltc4282_state, in ltc4282_set_rate() local
168 return regmap_update_bits(st->map, LTC4282_CLK_DIV, LTC4282_CLKOUT_MASK, in ltc4282_set_rate()
192 struct ltc4282_state *st = container_of(hw, struct ltc4282_state, in ltc4282_recalc_rate() local
197 ret = regmap_read(st->map, LTC4282_CLK_DIV, &clkdiv); in ltc4282_recalc_rate()
212 struct ltc4282_state *st = container_of(clk_hw, struct ltc4282_state, in ltc4282_disable() local
215 regmap_clear_bits(st->map, LTC4282_CLK_DIV, LTC4282_CLKOUT_MASK); in ltc4282_disable()
218 static int ltc4282_read_voltage_word(const struct ltc4282_state *st, u32 reg, in ltc4282_read_voltage_word() argument
224 ret = regmap_bulk_read(st->map, reg, &in, sizeof(in)); in ltc4282_read_voltage_word()
236 static int ltc4282_read_voltage_byte_cached(const struct ltc4282_state *st, in ltc4282_read_voltage_byte_cached() argument
246 ret = regmap_read(st->map, reg, &in); in ltc4282_read_voltage_byte_cached()
[all …]
/linux/drivers/iio/addac/
H A Dad74413r.c175 struct ad74413r_state *st = context; in ad74413r_reg_write() local
177 ad74413r_format_reg_write(reg, val, st->reg_tx_buf); in ad74413r_reg_write()
179 return spi_write(st->spi, st->reg_tx_buf, AD74413R_FRAME_SIZE); in ad74413r_reg_write()
182 static int ad74413r_crc_check(struct ad74413r_state *st, u8 *buf) in ad74413r_crc_check() argument
187 dev_err(st->dev, "Bad CRC %02x for %02x%02x%02x\n", in ad74413r_crc_check()
197 struct ad74413r_state *st = context; in ad74413r_reg_read() local
200 .tx_buf = st->reg_tx_buf, in ad74413r_reg_read()
205 .rx_buf = st->reg_rx_buf, in ad74413r_reg_read()
212 st->reg_tx_buf); in ad74413r_reg_read()
214 ret = spi_sync_transfer(st->spi, reg_read_xfer, in ad74413r_reg_read()
[all …]
/linux/Documentation/devicetree/bindings/iio/accel/
H A Dlis302.txt8 - compatible: should be set to "st,lis3lv02d-spi"
15 - compatible: should be set to "st,lis3lv02d"
23 - st,click-single-{x,y,z}: if present, tells the device to issue an
26 - st,click-double-{x,y,z}: if present, tells the device to issue an
29 - st,click-thresh-{x,y,z}: set the x/y/z axis threshold
30 - st,click-click-time-limit: click time limit, from 0 to 127.5msec
32 - st,click-latency: click latency, from 0 to 255 msec with
34 - st,click-window: click window, from 0 to 255 msec with
36 - st,irq{1,2}-disable: disable IRQ 1/2
37 - st,irq{1,2}-ff-wu-1: raise IRQ 1/2 on FF_WU_1 condition
[all …]
/linux/drivers/iio/frequency/
H A Dadf4350.c79 static int adf4350_sync_config(struct adf4350_state *st) in adf4350_sync_config() argument
84 if ((st->regs_hw[i] != st->regs[i]) || in adf4350_sync_config()
93 st->val = cpu_to_be32(st->regs[i] | i); in adf4350_sync_config()
94 ret = spi_write(st->spi, &st->val, 4); in adf4350_sync_config()
97 st->regs_hw[i] = st->regs[i]; in adf4350_sync_config()
98 dev_dbg(&st->spi->dev, "[%d] 0x%X\n", in adf4350_sync_config()
99 i, (u32)st->regs[i] | i); in adf4350_sync_config()
109 struct adf4350_state *st = iio_priv(indio_dev); in adf4350_reg_access() local
115 mutex_lock(&st->lock); in adf4350_reg_access()
117 st->regs[reg] = writeval & ~(BIT(0) | BIT(1) | BIT(2)); in adf4350_reg_access()
[all …]
H A Dadf4377.c479 struct adf4377_state *st = iio_priv(indio_dev); in adf4377_reg_access() local
482 return regmap_read(st->regmap, reg, read_val); in adf4377_reg_access()
484 return regmap_write(st->regmap, reg, write_val); in adf4377_reg_access()
491 static int adf4377_soft_reset(struct adf4377_state *st) in adf4377_soft_reset() argument
496 ret = regmap_update_bits(st->regmap, 0x0, ADF4377_0000_SOFT_RESET_MSK | in adf4377_soft_reset()
503 return regmap_read_poll_timeout(st->regmap, 0x0, read_val, in adf4377_soft_reset()
508 static int adf4377_get_freq(struct adf4377_state *st, u64 *freq) in adf4377_get_freq() argument
514 mutex_lock(&st->lock); in adf4377_get_freq()
515 ret = regmap_read(st->regmap, 0x12, &ref_div_factor); in adf4377_get_freq()
519 ret = regmap_bulk_read(st->regmap, 0x10, st->buf, sizeof(st->buf)); in adf4377_get_freq()
[all …]
/linux/Documentation/devicetree/bindings/arm/stm32/
H A Dstm32.yaml10 - Alexandre Torgue <alexandre.torgue@foss.st.com>
21 - const: st,stm32mp157
24 - st,stm32f429i-disco
25 - st,stm32429i-eval
26 - const: st,stm32f429
29 - st,stm32f469i-disco
30 - const: st,stm32f469
33 - st,stm32f746-disco
34 - st,stm32746g-eval
35 - const: st,stm32f746
[all …]
/linux/drivers/isdn/mISDN/
H A Dstack.c21 _queue_message(struct mISDNstack *st, struct sk_buff *skb) in _queue_message() argument
28 skb_queue_tail(&st->msgq, skb); in _queue_message()
29 if (likely(!test_bit(mISDN_STACK_STOPPED, &st->status))) { in _queue_message()
30 test_and_set_bit(mISDN_STACK_WORK, &st->status); in _queue_message()
31 wake_up_interruptible(&st->workq); in _queue_message()
38 _queue_message(ch->st, skb); in mISDN_queue_message()
43 get_channel4id(struct mISDNstack *st, u_int id) in get_channel4id() argument
47 mutex_lock(&st->lmutex); in get_channel4id()
48 list_for_each_entry(ch, &st->layer2, list) { in get_channel4id()
54 mutex_unlock(&st->lmutex); in get_channel4id()
[all …]
/linux/drivers/iio/adc/
H A Dat91-sama5d2_adc.c441 #define at91_adc_readl(st, reg) \ argument
442 readl_relaxed((st)->base + (st)->soc_info.platform->layout->reg)
443 #define at91_adc_read_chan(st, reg) \ argument
444 readl_relaxed((st)->base + reg)
445 #define at91_adc_writel(st, reg, val) \ argument
446 writel_relaxed(val, (st)->base + (st)->soc_info.platform->layout->reg)
781 struct at91_adc_state *st = iio_priv(indio_dev); in at91_adc_active_scan_mask_to_reg() local
790 return mask & GENMASK(st->soc_info.platform->nr_channels, 0); in at91_adc_active_scan_mask_to_reg()
793 static void at91_adc_cor(struct at91_adc_state *st, in at91_adc_cor() argument
800 cur_cor = at91_adc_readl(st, COR); in at91_adc_cor()
[all …]
H A Dat91_adc.c136 #define AT91_ADC_CHAN(st, ch) \ argument
137 (st->registers->channel_base + (ch * 4))
138 #define at91_adc_readl(st, reg) \ argument
139 (readl_relaxed(st->reg_base + reg))
140 #define at91_adc_writel(st, reg, val) \ argument
141 (writel_relaxed(val, st->reg_base + reg))
268 struct at91_adc_state *st = iio_priv(idev); in at91_adc_trigger_handler() local
274 st->buffer[j] = at91_adc_readl(st, AT91_ADC_CHAN(st, chan->channel)); in at91_adc_trigger_handler()
278 iio_push_to_buffers_with_timestamp(idev, st->buffer, pf->timestamp); in at91_adc_trigger_handler()
283 at91_adc_readl(st, AT91_ADC_LCDR); in at91_adc_trigger_handler()
[all …]
H A Dad4130.c394 static int ad4130_get_reg_size(struct ad4130_state *st, unsigned int reg, in ad4130_get_reg_size() argument
405 static unsigned int ad4130_data_reg_size(struct ad4130_state *st) in ad4130_data_reg_size() argument
410 ret = ad4130_get_reg_size(st, AD4130_DATA_REG, &data_reg_size); in ad4130_data_reg_size()
417 static unsigned int ad4130_resolution(struct ad4130_state *st) in ad4130_resolution() argument
419 return ad4130_data_reg_size(st) * BITS_PER_BYTE; in ad4130_resolution()
424 struct ad4130_state *st = context; in ad4130_reg_write() local
428 ret = ad4130_get_reg_size(st, reg, &size); in ad4130_reg_write()
432 st->reg_write_tx_buf[0] = reg; in ad4130_reg_write()
436 put_unaligned_be24(val, &st->reg_write_tx_buf[1]); in ad4130_reg_write()
439 put_unaligned_be16(val, &st->reg_write_tx_buf[1]); in ad4130_reg_write()
[all …]
H A Dad7606.c247 int ad7606_reset(struct ad7606_state *st) in ad7606_reset() argument
249 if (st->gpio_reset) { in ad7606_reset()
250 gpiod_set_value(st->gpio_reset, 1); in ad7606_reset()
252 gpiod_set_value(st->gpio_reset, 0); in ad7606_reset()
263 struct ad7606_state *st = iio_priv(indio_dev); in ad7606_16bit_chan_scale_setup() local
264 struct ad7606_chan_scale *cs = &st->chan_scales[chan->scan_index]; in ad7606_16bit_chan_scale_setup()
266 if (!st->sw_mode_en) { in ad7606_16bit_chan_scale_setup()
286 struct ad7606_state *st = iio_priv(indio_dev); in ad7606_get_chan_config() local
287 unsigned int num_channels = st->chip_info->num_adc_channels; in ad7606_get_chan_config()
288 struct device *dev = st->dev; in ad7606_get_chan_config()
[all …]
H A Dti-ads7950.c60 #define TI_ADS7950_MAN_CMD_SETTINGS(st) \ argument
61 (TI_ADS7950_MAN_CMD(TI_ADS7950_CR_WRITE | st->cmd_settings_bitmask))
63 #define TI_ADS7950_GPIO_CMD_SETTINGS(st) \ argument
64 (TI_ADS7950_GPIO_CMD(st->gpio_cmd_settings_bitmask))
286 struct ti_ads7950_state *st = iio_priv(indio_dev); in ti_ads7950_update_scan_mode() local
292 st->tx_buf[len++] = cmd; in ti_ads7950_update_scan_mode()
295 /* Data for the 1st channel is not returned until the 3rd transfer */ in ti_ads7950_update_scan_mode()
296 st->tx_buf[len++] = 0; in ti_ads7950_update_scan_mode()
297 st->tx_buf[len++] = 0; in ti_ads7950_update_scan_mode()
299 st->ring_xfer.len = len * 2; in ti_ads7950_update_scan_mode()
[all …]
H A Dad7192.c232 struct ad7192_state *st = iio_priv(indio_dev); in ad7192_set_syscalib_mode() local
234 st->syscalib_mode[chan->channel] = mode; in ad7192_set_syscalib_mode()
242 struct ad7192_state *st = iio_priv(indio_dev); in ad7192_get_syscalib_mode() local
244 return st->syscalib_mode[chan->channel]; in ad7192_get_syscalib_mode()
252 struct ad7192_state *st = iio_priv(indio_dev); in ad7192_write_syscalib() local
263 temp = st->syscalib_mode[chan->channel]; in ad7192_write_syscalib()
266 ret = ad_sd_calibrate(&st->sd, AD7192_MODE_CAL_SYS_ZERO, in ad7192_write_syscalib()
269 ret = ad_sd_calibrate(&st->sd, AD7192_MODE_CAL_SYS_FULL, in ad7192_write_syscalib()
305 struct ad7192_state *st = ad_sigma_delta_to_ad7192(sd); in ad7192_set_channel() local
307 st->conf &= ~AD7192_CONF_CHAN_MASK; in ad7192_set_channel()
[all …]
/linux/drivers/iio/accel/
H A Dadxl367.c271 static int adxl367_set_measure_en(struct adxl367_state *st, bool en) in adxl367_set_measure_en() argument
277 ret = regmap_update_bits(st->regmap, ADXL367_REG_POWER_CTL, in adxl367_set_measure_en()
294 static void adxl367_scale_act_thresholds(struct adxl367_state *st, in adxl367_scale_act_thresholds() argument
298 st->act_threshold = st->act_threshold in adxl367_scale_act_thresholds()
301 st->inact_threshold = st->inact_threshold in adxl367_scale_act_thresholds()
306 static int _adxl367_set_act_threshold(struct adxl367_state *st, in _adxl367_set_act_threshold() argument
316 st->act_threshold_buf[0] = FIELD_PREP(ADXL367_THRESH_H_MASK, in _adxl367_set_act_threshold()
319 st->act_threshold_buf[1] = FIELD_PREP(ADXL367_THRESH_L_MASK, in _adxl367_set_act_threshold()
323 ret = regmap_bulk_write(st->regmap, reg, st->act_threshold_buf, in _adxl367_set_act_threshold()
324 sizeof(st->act_threshold_buf)); in _adxl367_set_act_threshold()
[all …]
H A Dsca3000.c277 static int sca3000_write_reg(struct sca3000_state *st, u8 address, u8 val) in sca3000_write_reg() argument
279 st->tx[0] = SCA3000_WRITE_REG(address); in sca3000_write_reg()
280 st->tx[1] = val; in sca3000_write_reg()
281 return spi_write(st->us, st->tx, 2); in sca3000_write_reg()
284 static int sca3000_read_data_short(struct sca3000_state *st, in sca3000_read_data_short() argument
291 .tx_buf = st->tx, in sca3000_read_data_short()
294 .rx_buf = st->rx, in sca3000_read_data_short()
297 st->tx[0] = SCA3000_READ_REG(reg_address_high); in sca3000_read_data_short()
299 return spi_sync_transfer(st->us, xfer, ARRAY_SIZE(xfer)); in sca3000_read_data_short()
304 * @st: Driver specific device instance data.
[all …]
/linux/drivers/staging/iio/frequency/
H A Dad9834.c109 static int ad9834_write_frequency(struct ad9834_state *st, in ad9834_write_frequency() argument
115 clk_freq = clk_get_rate(st->mclk); in ad9834_write_frequency()
122 st->freq_data[0] = cpu_to_be16(addr | (regval & in ad9834_write_frequency()
124 st->freq_data[1] = cpu_to_be16(addr | ((regval >> in ad9834_write_frequency()
128 return spi_sync(st->spi, &st->freq_msg); in ad9834_write_frequency()
131 static int ad9834_write_phase(struct ad9834_state *st, in ad9834_write_phase() argument
136 st->data = cpu_to_be16(addr | phase); in ad9834_write_phase()
138 return spi_sync(st->spi, &st->msg); in ad9834_write_phase()
147 struct ad9834_state *st = iio_priv(indio_dev); in ad9834_write() local
156 mutex_lock(&st->lock); in ad9834_write()
[all …]
H A Dad9832.c128 static int ad9832_write_frequency(struct ad9832_state *st, in ad9832_write_frequency() argument
136 clk_freq = clk_get_rate(st->mclk); in ad9832_write_frequency()
147 st->freq_data[i] = cpu_to_be16(FIELD_PREP(AD9832_CMD_MSK, freq_cmd) | in ad9832_write_frequency()
152 return spi_sync(st->spi, &st->freq_msg); in ad9832_write_frequency()
155 static int ad9832_write_phase(struct ad9832_state *st, in ad9832_write_phase() argument
169 st->phase_data[i] = cpu_to_be16(FIELD_PREP(AD9832_CMD_MSK, phase_cmd) | in ad9832_write_phase()
174 return spi_sync(st->spi, &st->phase_msg); in ad9832_write_phase()
181 struct ad9832_state *st = iio_priv(indio_dev); in ad9832_write() local
190 mutex_lock(&st->lock); in ad9832_write()
194 ret = ad9832_write_frequency(st, this_attr->address, val); in ad9832_write()
[all …]
/linux/drivers/iio/imu/inv_mpu6050/
H A Dinv_mpu_core.c317 static int inv_mpu6050_pwr_mgmt_1_write(struct inv_mpu6050_state *st, bool sleep, in inv_mpu6050_pwr_mgmt_1_write() argument
323 clock = st->chip_config.clk; in inv_mpu6050_pwr_mgmt_1_write()
325 temp_dis = !st->chip_config.temp_en; in inv_mpu6050_pwr_mgmt_1_write()
335 dev_dbg(regmap_get_device(st->map), "pwr_mgmt_1: 0x%x\n", val); in inv_mpu6050_pwr_mgmt_1_write()
336 return regmap_write(st->map, st->reg->pwr_mgmt_1, val); in inv_mpu6050_pwr_mgmt_1_write()
339 static int inv_mpu6050_clock_switch(struct inv_mpu6050_state *st, in inv_mpu6050_clock_switch() argument
344 switch (st->chip_type) { in inv_mpu6050_clock_switch()
349 ret = inv_mpu6050_pwr_mgmt_1_write(st, false, false, clock, -1); in inv_mpu6050_clock_switch()
352 st->chip_config.clk = clock; in inv_mpu6050_clock_switch()
362 int inv_mpu6050_switch_engine(struct inv_mpu6050_state *st, bool en, in inv_mpu6050_switch_engine() argument
[all …]
/linux/drivers/iio/imu/inv_icm42600/
H A Dinv_icm42600_buffer.c101 void inv_icm42600_buffer_update_fifo_period(struct inv_icm42600_state *st) in inv_icm42600_buffer_update_fifo_period() argument
105 if (st->fifo.en & INV_ICM42600_SENSOR_GYRO) in inv_icm42600_buffer_update_fifo_period()
106 period_gyro = inv_icm42600_odr_to_period(st->conf.gyro.odr); in inv_icm42600_buffer_update_fifo_period()
110 if (st->fifo.en & INV_ICM42600_SENSOR_ACCEL) in inv_icm42600_buffer_update_fifo_period()
111 period_accel = inv_icm42600_odr_to_period(st->conf.accel.odr); in inv_icm42600_buffer_update_fifo_period()
120 st->fifo.period = period; in inv_icm42600_buffer_update_fifo_period()
123 int inv_icm42600_buffer_set_fifo_en(struct inv_icm42600_state *st, in inv_icm42600_buffer_set_fifo_en() argument
143 ret = regmap_update_bits(st->map, INV_ICM42600_REG_FIFO_CONFIG1, mask, val); in inv_icm42600_buffer_set_fifo_en()
147 st->fifo.en = fifo_en; in inv_icm42600_buffer_set_fifo_en()
148 inv_icm42600_buffer_update_fifo_period(st); in inv_icm42600_buffer_set_fifo_en()
[all …]
H A Dinv_icm42600_core.c186 const struct inv_icm42600_state *st = iio_device_get_drvdata(indio_dev); in inv_icm42600_get_mount_matrix() local
188 return &st->orientation; in inv_icm42600_get_mount_matrix()
227 static int inv_icm42600_set_pwr_mgmt0(struct inv_icm42600_state *st, in inv_icm42600_set_pwr_mgmt0() argument
232 enum inv_icm42600_sensor_mode oldgyro = st->conf.gyro.mode; in inv_icm42600_set_pwr_mgmt0()
233 enum inv_icm42600_sensor_mode oldaccel = st->conf.accel.mode; in inv_icm42600_set_pwr_mgmt0()
234 bool oldtemp = st->conf.temp_en; in inv_icm42600_set_pwr_mgmt0()
247 ret = regmap_write(st->map, INV_ICM42600_REG_PWR_MGMT0, val); in inv_icm42600_set_pwr_mgmt0()
251 st->conf.gyro.mode = gyro; in inv_icm42600_set_pwr_mgmt0()
252 st->conf.accel.mode = accel; in inv_icm42600_set_pwr_mgmt0()
253 st->conf.temp_en = temp; in inv_icm42600_set_pwr_mgmt0()
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