Searched +full:st +full:- +full:mipid02 (Results 1 – 3 of 3) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/media/i2c/st,s[all...]
1 STMicroelectronics MIPID02 CSI-2 to PARALLEL bridge3 MIPID02 has two CSI-2 input ports, only one of those ports can be active at a4 time. Active port input stream will be de-serialized and its content outputted6 CSI-2 first input port is a dual lane 800Mbps per lane whereas CSI-2 second11 YUV420 8-bit, YUV422 8-bit and YUV420 10-bit.14 - compatible: shall be "st,st-mipid02"15 - clocks: reference to the xclk input clock.16 - clock-names: shall be "xclk".17 - VDDE-supply: sensor digital IO supply. Must be 1.8 volts.18 - VDDIN-supply: sensor internal regulator supply. Must be 1.8 volts.[all …]
1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)3 * Copyright (C) Linaro Ltd 2019 - All Rights Reserved9 #include "stm32mp15xx-dhcor-io1v8.dtsi"22 cec_clock: clk-cec-fixe[all...]