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/linux/arch/arm/boot/dts/nxp/vf/
H A Dvf610-bk4.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
15 stdout-path = &uart1;
23 audio_ext: oscillator-audio {
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
26 clock-frequency = <24576000>;
29 enet_ext: oscillator-ethernet {
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
[all …]
H A Dvf610-zii-dev.dtsi4 * Based on an original 'vf610-twr.dts' which is Copyright 2015,
7 * This file is dual-licensed: you can use it either under the terms
49 stdout-path = "serial0:115200n8";
57 gpio-leds {
58 compatible = "gpio-leds";
59 pinctrl-0 = <&pinctrl_leds_debug>;
60 pinctrl-names = "default";
62 led-debug {
65 linux,default-trigger = "heartbeat";
69 reg_vcc_3v3_mcu: regulator-vcc-3v3-mcu {
[all …]
/linux/Documentation/devicetree/bindings/iio/resolver/
H A Dadi,ad2s1210.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analog Devices AD2S1210 Resolver-to-Digital Converter
10 - Michael Hennerich <michael.hennerich@analog.com>
13 The AD2S1210 is a complete 10-bit to 16-bit resolution tracking
14 resolver-to-digital converter, integrating an on-board programmable
23 selected by the A0 and A1 input pins. In normal mode, data is latched by
29 0 0 Normal mode - position output
30 0 1 Normal mode - velocity output
[all …]
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dmicrochip,mcp23s08.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip I/O expander with serial interface (I2C/SPI)
10 - Himanshu Bhavani <himanshu.bhavani@siliconsignals.io>
14 chips.These chips provide 8 or 16 GPIO pins with either I2C or SPI interface.
17 - $ref: /schemas/spi/spi-peripheral-props.yaml#
22 - microchip,mcp23s08
23 - microchip,mcp23s17
24 - microchip,mcp23s18
[all …]
H A Dmarvell,dove-pinctrl.txt3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,dove-pinctrl"
8 - clocks: (optional) phandle of pdma clock
9 - reg: register specifiers of MPP, MPP4, and PMU MPP registers
11 Available mpp pins/groups and functions:
16 name pins functions
23 uart1(cts), lcd-spi(cs1), pmu*
31 mpp11 11 gpio, pmu, sata(prsnt), sata-1(act), sdio0(ledctrl),
39 mpp16 16 gpio, uart3(rts), sdio0(cd), ac97(sdi1), lcd-spi(cs1)
41 ac97-1(sysclko)
[all …]
H A Dmediatek,mt7986-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/mediatek,mt7986-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sean Wang <sean.wang@kernel.org>
13 The MediaTek's MT7986 Pin controller is used to control SoC pins.
18 - mediatek,mt7986a-pinctrl
19 - mediatek,mt7986b-pinctrl
25 reg-names:
27 - const: gpio
[all …]
H A Dmarvell,armada-37xx-pinctrl.txt12 ------------------------
16 Refer to pinctrl-bindings.txt in this directory for details of the
22 - compatible: "marvell,armada3710-sb-pinctrl", "syscon, "simple-mfd"
24 "marvell,armada3710-nb-pinctrl", "syscon, "simple-mfd"
26 - reg: The first set of register are for pinctrl/gpio and the second
28 - interrupts: list of the interrupt use by the gpio
33 - pins 20-24
34 - functions jtag, gpio
37 - pins 8-10
38 - functions sdio, gpio
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6ul-kontron-sl-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/gpio/gpio.h>
12 stdout-path = &uart4;
22 cs-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
23 pinctrl-names = "default";
24 pinctrl-0 = <&pinctrl_ecspi2>;
28 compatible = "mxicy,mx25v8035f", "jedec,spi-nor";
29 spi-max-frequency = <50000000>;
35 pinctrl-names = "default";
36 pinctrl-0 = <&pinctrl_enet1 &pinctrl_enet1_mdio>;
[all …]
/linux/arch/arm64/boot/dts/exynos/
H A Dexynosautov920-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's ExynosAutov920 SoC pin-mux and pin-config device tree source
7 * Samsung's ExynosAutov920 SoC pin-mux and pin-config options are listed as
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include "exynos-pinctrl.h"
16 gpa0: gpa0-gpio-bank {
17 gpio-controller;
18 #gpio-cells = <2>;
19 interrupt-controller;
20 #interrupt-cells = <2>;
[all …]
/linux/arch/mips/boot/dts/ralink/
H A Dmt7628a.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #address-cells = <1>;
5 #size-cells = <1>;
6 compatible = "ralink,mt7628a-soc";
9 #address-cells = <1>;
10 #size-cells = <0>;
19 resetc: reset-controller {
20 compatible = "ralink,rt2880-reset";
21 #reset-cells = <1>;
24 cpuintc: interrupt-controller {
[all …]
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7622-bananapi-bpi-r64.dts5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/leds/common.h>
17 model = "Bananapi BPI-R64";
18 chassis-type = "embedded";
19 compatible = "bananapi,bpi-r64", "mediatek,mt7622";
26 stdout-path = "serial0:115200n8";
32 proc-supply = <&mt6380_vcpu_reg>;
[all …]
H A Dmt7986a-rfb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/pinctrl/mt65xx.h>
14 chassis-type = "embedded";
15 compatible = "mediatek,mt7986a-rfb", "mediatek,mt7986a";
22 stdout-path = "serial0:115200n8";
30 reg_1p8v: regulator-1p8v {
31 compatible = "regulator-fixed";
32 regulator-name = "fixed-1.8V";
33 regulator-min-microvolt = <1800000>;
[all …]
H A Dmt7622-rfb1.dts6 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
9 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/gpio/gpio.h>
18 chassis-type = "embedded";
19 compatible = "mediatek,mt7622-rfb1", "mediatek,mt7622";
26 stdout-path = "serial0:115200n8";
32 proc-supply = <&mt6380_vcpu_reg>;
33 sram-supply = <&mt6380_vm_reg>;
37 proc-supply = <&mt6380_vcpu_reg>;
[all …]
/linux/arch/arm/boot/dts/nuvoton/
H A Dnuvoton-npcm730-kudo.dts1 // SPDX-License-Identifier: GPL-2.0
4 /dts-v1/;
5 #include "nuvoton-npcm730.dtsi"
7 #include <dt-bindings/gpio/gpio.h>
41 stdout-path = &serial3;
48 iio-hwmon {
49 compatible = "iio-hwmon";
50 io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
55 compatible = "nuvoton,npcm750-jtag-master";
56 #address-cells = <1>;
[all …]
/linux/arch/arm/boot/dts/mediatek/
H A Dmt7629-rfb.dts1 // SPDX-License-Identifier: GPL-2.0
7 /dts-v1/;
8 #include <dt-bindings/input/input.h>
13 compatible = "mediatek,mt7629-rfb", "mediatek,mt7629";
20 stdout-path = "serial0:115200n8";
23 gpio-keys {
24 compatible = "gpio-keys";
26 button-reset {
32 button-wps {
44 reg_3p3v: regulator-3p3v {
[all …]
/linux/arch/arm/boot/dts/qcom/
H A Dqcom-ipq4018-jalapeno.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
4 #include "qcom-ipq4019.dtsi"
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
14 mdio_pins: mdio-state {
15 mdio-pins {
16 pins = "gpio53";
18 bias-pull-up;
21 mdc-pins {
22 pins = "gpio52";
[all …]
H A Dqcom-ipq4019-ap.dk07.1-c1.dts1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/gpio/gpio.h>
5 #include "qcom-ipq4019-ap.dk07.1.dtsi"
8 model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK07.1-C1";
9 compatible = "qcom,ipq4019-ap-dk07.1-c1", "qcom,ipq4019";
14 perst-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
17 spi@78b6000 {
22 serial_1_pins: serial1-state {
23 pins = "gpio8", "gpio9",
26 bias-disable;
[all …]
H A Dqcom-ipq4019-ap.dk04.1.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include "qcom-ipq4019.dtsi"
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/gpio/gpio.h>
9 model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK04.1";
17 stdout-path = "serial0:115200n8";
27 serial_0_pins: serial0-state {
28 pins = "gpio16", "gpio17";
30 bias-disable;
33 serial_1_pins: serial1-state {
[all …]
/linux/Documentation/devicetree/bindings/iio/adc/
H A Dadi,ad7192.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Michae
[all...]
/linux/arch/arm/boot/dts/ti/omap/
H A Dam335x-moxa-uc-2100-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2018 MOXA Inc. - https://www.moxa.com/
13 vbat: vbat-regulator {
14 compatible = "regulator-fixed";
18 vmmcsd_fixed: vmmcsd-regulator {
19 compatible = "regulator-fixed";
20 regulator-name = "vmmcsd_fixed";
21 regulator-min-microvolt = <3300000>;
22 regulator-max-microvolt = <3300000>;
23 regulator-boot-on;
[all …]
/linux/arch/arm/boot/dts/sunplus/
H A Dsunplus-sp7021.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/sunplus,sp7021-clkc.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/reset/sunplus,sp7021-reset.h>
11 #include <dt-bindings/pinctrl/sppctl-sp7021.h>
12 #include <dt-bindings/gpio/gpio.h>
22 compatible = "fixed-clock";
23 #clock-cells = <0>;
24 clock-frequency = <XTAL>;
25 clock-output-names = "extclk";
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dipq5332-rdp442.dts1 // SPDX-License-Identifier: BSD-3-Clause
8 /dts-v1/;
10 #include "ipq5332-rdp-common.dtsi"
14 compatible = "qcom,ipq5332-ap-mi01.3", "qcom,ipq5332";
18 clock-frequency = <400000>;
19 pinctrl-0 = <&i2c_1_pins>;
20 pinctrl-names = "default";
25 pinctrl-0 = <&spi_0_data_clk_pins &spi_0_cs_pins>;
26 pinctrl-names = "default";
30 compatible = "micron,n25q128a11", "jedec,spi-nor";
[all …]
H A Dipq5332-rdp468.dts1 // SPDX-License-Identifier: BSD-3-Clause
5 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
8 /dts-v1/;
10 #include "ipq5332-rdp-common.dtsi"
14 compatible = "qcom,ipq5332-ap-mi01.6", "qcom,ipq5332";
16 regulator_fixed_5p0: regulator-s0500 {
17 compatible = "regulator-fixed";
18 regulator-min-microvolt = <500000>;
19 regulator-max-microvolt = <500000>;
20 regulator-boot-on;
[all …]
/linux/arch/arm/boot/dts/marvell/
H A Darmada-385-clearfog-gtr.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 * Rabeeh Khoury <rabeeh@solid-run.com>, based on Russell King clearfog work
9 SERDES mapping -
10 0. SATA1 on CON18, or optionally mini PCIe CON3 - PCIe0
12 2. SATA0 on CON17, or optionally mini PCIe CON4 - PCIe1
14 4. mini PCIe CON2 - PCIe2
17 USB 2.0 mapping -
18 0. USB 2.0 - 0 USB pins header CON12
19 1. USB 2.0 - 1 mini PCIe CON2
20 2. USB 2.0 - 2 to USB 3.0 connector (used with SERDES #3)
[all …]
/linux/arch/arm/boot/dts/broadcom/
H A Dbcm2711.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/soc/bcm2835-pm.h>
10 #address-cells = <2>;
11 #size-cells = <1>;
13 interrupt-parent = <&gicv2>;
16 compatible = "brcm,bcm2711-vc5";
20 clk_27MHz: clk-27M {
21 #clock-cells = <0>;
22 compatible = "fixed-clock";
[all …]

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