xref: /linux/Documentation/devicetree/bindings/iio/adc/adi,ad7192.yaml (revision 3a39d672e7f48b8d6b91a09afa4b55352773b4b5)
1f7356e47SMircea Caprioru# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2f7356e47SMircea Caprioru# Copyright 2019 Analog Devices Inc.
3f7356e47SMircea Caprioru%YAML 1.2
4f7356e47SMircea Caprioru---
504dbd865SRob Herring$id: http://devicetree.org/schemas/iio/adc/adi,ad7192.yaml#
6f7356e47SMircea Caprioru$schema: http://devicetree.org/meta-schemas/core.yaml#
7f7356e47SMircea Caprioru
8f7356e47SMircea Capriorutitle: Analog Devices AD7192 ADC device driver
9f7356e47SMircea Caprioru
10f7356e47SMircea Capriorumaintainers:
11f7356e47SMircea Caprioru  - Michael Hennerich <michael.hennerich@analog.com>
12f7356e47SMircea Caprioru
13f7356e47SMircea Capriorudescription: |
14f7356e47SMircea Caprioru  Bindings for the Analog Devices AD7192 ADC device. Datasheet can be
15f7356e47SMircea Caprioru  found here:
16f7356e47SMircea Caprioru  https://www.analog.com/media/en/technical-documentation/data-sheets/AD7192.pdf
17f7356e47SMircea Caprioru
18f7356e47SMircea Caprioruproperties:
19f7356e47SMircea Caprioru  compatible:
20f7356e47SMircea Caprioru    enum:
21f7356e47SMircea Caprioru      - adi,ad7190
22f7356e47SMircea Caprioru      - adi,ad7192
23f7356e47SMircea Caprioru      - adi,ad7193
24caf7b763SAlisa-Dariana Roman      - adi,ad7194
25f7356e47SMircea Caprioru      - adi,ad7195
26f7356e47SMircea Caprioru
27caf7b763SAlisa-Dariana Roman  "#address-cells":
28caf7b763SAlisa-Dariana Roman    const: 1
29caf7b763SAlisa-Dariana Roman
30caf7b763SAlisa-Dariana Roman  "#size-cells":
31caf7b763SAlisa-Dariana Roman    const: 0
32caf7b763SAlisa-Dariana Roman
33f7356e47SMircea Caprioru  reg:
34f7356e47SMircea Caprioru    maxItems: 1
35f7356e47SMircea Caprioru
36f7356e47SMircea Caprioru  spi-cpol: true
37f7356e47SMircea Caprioru
38f7356e47SMircea Caprioru  spi-cpha: true
39f7356e47SMircea Caprioru
40f7356e47SMircea Caprioru  clocks:
41f7356e47SMircea Caprioru    maxItems: 1
42fe2e7969SAlisa-Dariana Roman    description:
43fe2e7969SAlisa-Dariana Roman      Optionally, either a crystal can be attached externally between MCLK1 and
44fe2e7969SAlisa-Dariana Roman      MCLK2 pins, or an external CMOS-compatible clock can drive the MCLK2
45*8524782eSAlisa-Dariana Roman      pin. If absent, internal 4.92MHz clock is used, which can be made
46*8524782eSAlisa-Dariana Roman      available on MCLK2 pin.
47f7356e47SMircea Caprioru
48f7356e47SMircea Caprioru  clock-names:
49fe2e7969SAlisa-Dariana Roman    enum:
50fe2e7969SAlisa-Dariana Roman      - xtal
51fe2e7969SAlisa-Dariana Roman      - mclk
52f7356e47SMircea Caprioru
53*8524782eSAlisa-Dariana Roman  "#clock-cells":
54*8524782eSAlisa-Dariana Roman    const: 0
55*8524782eSAlisa-Dariana Roman    description:
56*8524782eSAlisa-Dariana Roman      If present when internal clock is used, configured as clock provider.
57*8524782eSAlisa-Dariana Roman
58f7356e47SMircea Caprioru  interrupts:
59f7356e47SMircea Caprioru    maxItems: 1
60f7356e47SMircea Caprioru
61ecec83a2SAlisa-Dariana Roman  aincom-supply:
62ecec83a2SAlisa-Dariana Roman    description: |
63ecec83a2SAlisa-Dariana Roman      AINCOM voltage supply. Analog inputs AINx are referenced to this input
64ecec83a2SAlisa-Dariana Roman      when configured for pseudo-differential operation.
65ecec83a2SAlisa-Dariana Roman
66f7356e47SMircea Caprioru  dvdd-supply:
67f7356e47SMircea Caprioru    description: DVdd voltage supply
68f7356e47SMircea Caprioru
69f7356e47SMircea Caprioru  avdd-supply:
70f7356e47SMircea Caprioru    description: AVdd voltage supply
71f7356e47SMircea Caprioru
72c6dab724SFabrizio Lamarque  vref-supply:
73c6dab724SFabrizio Lamarque    description: VRef voltage supply
74c6dab724SFabrizio Lamarque
75f7356e47SMircea Caprioru  adi,rejection-60-Hz-enable:
76f7356e47SMircea Caprioru    description: |
77f7356e47SMircea Caprioru      This bit enables a notch at 60 Hz when the first notch of the sinc
78f7356e47SMircea Caprioru      filter is at 50 Hz. When REJ60 is set, a filter notch is placed at
79f7356e47SMircea Caprioru      60 Hz when the sinc filter first notch is at 50 Hz. This allows
80f7356e47SMircea Caprioru      simultaneous 50 Hz/ 60 Hz rejection.
81f7356e47SMircea Caprioru    type: boolean
82f7356e47SMircea Caprioru
83f7356e47SMircea Caprioru  adi,refin2-pins-enable:
84f7356e47SMircea Caprioru    description: |
85f7356e47SMircea Caprioru      External reference applied between the P1/REFIN2(+) and P0/REFIN2(−) pins.
86f7356e47SMircea Caprioru    type: boolean
87f7356e47SMircea Caprioru
88f7356e47SMircea Caprioru  adi,buffer-enable:
89f7356e47SMircea Caprioru    description: |
90f7356e47SMircea Caprioru      Enables the buffer on the analog inputs. If cleared, the analog inputs
91f7356e47SMircea Caprioru      are unbuffered, lowering the power consumption of the device. If this
92f7356e47SMircea Caprioru      bit is set, the analog inputs are buffered, allowing the user to place
93f7356e47SMircea Caprioru      source impedances on the front end without contributing gain errors to
94f7356e47SMircea Caprioru      the system.
95f7356e47SMircea Caprioru    type: boolean
96f7356e47SMircea Caprioru
97f7356e47SMircea Caprioru  adi,burnout-currents-enable:
98f7356e47SMircea Caprioru    description: |
99f7356e47SMircea Caprioru      When this bit is set to 1, the 500 nA current sources in the signal
100f7356e47SMircea Caprioru      path are enabled. When BURN = 0, the burnout currents are disabled.
101f7356e47SMircea Caprioru      The burnout currents can be enabled only when the buffer is active
102f7356e47SMircea Caprioru      and when chop is disabled.
103f7356e47SMircea Caprioru    type: boolean
104f7356e47SMircea Caprioru
105f7356e47SMircea Caprioru  bipolar:
1063490e333SMauro Carvalho Chehab    description: see Documentation/devicetree/bindings/iio/adc/adc.yaml
107f7356e47SMircea Caprioru    type: boolean
108f7356e47SMircea Caprioru
109caf7b763SAlisa-Dariana RomanpatternProperties:
110caf7b763SAlisa-Dariana Roman  "^channel@[0-9a-f]+$":
111caf7b763SAlisa-Dariana Roman    type: object
112caf7b763SAlisa-Dariana Roman    $ref: adc.yaml
113caf7b763SAlisa-Dariana Roman    unevaluatedProperties: false
114caf7b763SAlisa-Dariana Roman
115caf7b763SAlisa-Dariana Roman    properties:
116caf7b763SAlisa-Dariana Roman      reg:
117caf7b763SAlisa-Dariana Roman        description: The channel index.
118caf7b763SAlisa-Dariana Roman        minimum: 0
119caf7b763SAlisa-Dariana Roman        maximum: 271
120caf7b763SAlisa-Dariana Roman
121caf7b763SAlisa-Dariana Roman      diff-channels:
122caf7b763SAlisa-Dariana Roman        description:
123caf7b763SAlisa-Dariana Roman          Both inputs can be connected to pins AIN1 to AIN16 by choosing the
124caf7b763SAlisa-Dariana Roman          appropriate value from 1 to 16.
125caf7b763SAlisa-Dariana Roman        items:
126caf7b763SAlisa-Dariana Roman          minimum: 1
127caf7b763SAlisa-Dariana Roman          maximum: 16
128caf7b763SAlisa-Dariana Roman
129caf7b763SAlisa-Dariana Roman      single-channel:
130caf7b763SAlisa-Dariana Roman        description:
131caf7b763SAlisa-Dariana Roman          Positive input can be connected to pins AIN1 to AIN16 by choosing the
132caf7b763SAlisa-Dariana Roman          appropriate value from 1 to 16. Negative input is connected to AINCOM.
133caf7b763SAlisa-Dariana Roman        minimum: 1
134caf7b763SAlisa-Dariana Roman        maximum: 16
135caf7b763SAlisa-Dariana Roman
136caf7b763SAlisa-Dariana Roman    oneOf:
137caf7b763SAlisa-Dariana Roman      - required:
138caf7b763SAlisa-Dariana Roman          - reg
139caf7b763SAlisa-Dariana Roman          - diff-channels
140caf7b763SAlisa-Dariana Roman      - required:
141caf7b763SAlisa-Dariana Roman          - reg
142caf7b763SAlisa-Dariana Roman          - single-channel
143caf7b763SAlisa-Dariana Roman
144f7356e47SMircea Capriorurequired:
145f7356e47SMircea Caprioru  - compatible
146f7356e47SMircea Caprioru  - reg
147f7356e47SMircea Caprioru  - interrupts
148f7356e47SMircea Caprioru  - dvdd-supply
149f7356e47SMircea Caprioru  - avdd-supply
150c6dab724SFabrizio Lamarque  - vref-supply
151f7356e47SMircea Caprioru  - spi-cpol
152f7356e47SMircea Caprioru  - spi-cpha
153f7356e47SMircea Caprioru
15480137388SKrzysztof KozlowskiallOf:
15580137388SKrzysztof Kozlowski  - $ref: /schemas/spi/spi-peripheral-props.yaml#
156caf7b763SAlisa-Dariana Roman  - if:
157caf7b763SAlisa-Dariana Roman      properties:
158caf7b763SAlisa-Dariana Roman        compatible:
159caf7b763SAlisa-Dariana Roman          enum:
160caf7b763SAlisa-Dariana Roman            - adi,ad7190
161caf7b763SAlisa-Dariana Roman            - adi,ad7192
162caf7b763SAlisa-Dariana Roman            - adi,ad7193
163caf7b763SAlisa-Dariana Roman            - adi,ad7195
164caf7b763SAlisa-Dariana Roman    then:
165caf7b763SAlisa-Dariana Roman      patternProperties:
166caf7b763SAlisa-Dariana Roman        "^channel@[0-9a-f]+$": false
167fe2e7969SAlisa-Dariana Roman  - if:
168fe2e7969SAlisa-Dariana Roman      anyOf:
169fe2e7969SAlisa-Dariana Roman        - required:
170fe2e7969SAlisa-Dariana Roman            - clocks
171fe2e7969SAlisa-Dariana Roman        - required:
172fe2e7969SAlisa-Dariana Roman            - clock-names
173fe2e7969SAlisa-Dariana Roman    then:
174*8524782eSAlisa-Dariana Roman      properties:
175*8524782eSAlisa-Dariana Roman        "#clock-cells": false
176fe2e7969SAlisa-Dariana Roman      required:
177fe2e7969SAlisa-Dariana Roman        - clocks
178fe2e7969SAlisa-Dariana Roman        - clock-names
17980137388SKrzysztof Kozlowski
18080137388SKrzysztof KozlowskiunevaluatedProperties: false
1816fdc6e23SRob Herring
182f7356e47SMircea Caprioruexamples:
183f7356e47SMircea Caprioru  - |
18446908557SKrzysztof Kozlowski    spi {
1854d32db74SMaxime Ripard        #address-cells = <1>;
1864d32db74SMaxime Ripard        #size-cells = <0>;
1874d32db74SMaxime Ripard
188f7356e47SMircea Caprioru        adc@0 {
189f7356e47SMircea Caprioru            compatible = "adi,ad7192";
190f7356e47SMircea Caprioru            reg = <0>;
191f7356e47SMircea Caprioru            spi-max-frequency = <1000000>;
192f7356e47SMircea Caprioru            spi-cpol;
193f7356e47SMircea Caprioru            spi-cpha;
194f7356e47SMircea Caprioru            clocks = <&ad7192_mclk>;
195f7356e47SMircea Caprioru            clock-names = "mclk";
196f7356e47SMircea Caprioru            interrupts = <25 0x2>;
197f7356e47SMircea Caprioru            interrupt-parent = <&gpio>;
198ecec83a2SAlisa-Dariana Roman            aincom-supply = <&aincom>;
199f7356e47SMircea Caprioru            dvdd-supply = <&dvdd>;
200f7356e47SMircea Caprioru            avdd-supply = <&avdd>;
201c6dab724SFabrizio Lamarque            vref-supply = <&vref>;
202f7356e47SMircea Caprioru
203f7356e47SMircea Caprioru            adi,refin2-pins-enable;
204f7356e47SMircea Caprioru            adi,rejection-60-Hz-enable;
205f7356e47SMircea Caprioru            adi,buffer-enable;
206f7356e47SMircea Caprioru            adi,burnout-currents-enable;
207f7356e47SMircea Caprioru        };
208f7356e47SMircea Caprioru    };
209caf7b763SAlisa-Dariana Roman  - |
210caf7b763SAlisa-Dariana Roman    spi {
211caf7b763SAlisa-Dariana Roman        #address-cells = <1>;
212caf7b763SAlisa-Dariana Roman        #size-cells = <0>;
213caf7b763SAlisa-Dariana Roman
214caf7b763SAlisa-Dariana Roman        adc@0 {
215caf7b763SAlisa-Dariana Roman            compatible = "adi,ad7194";
216caf7b763SAlisa-Dariana Roman            reg = <0>;
217caf7b763SAlisa-Dariana Roman
218caf7b763SAlisa-Dariana Roman            #address-cells = <1>;
219caf7b763SAlisa-Dariana Roman            #size-cells = <0>;
220caf7b763SAlisa-Dariana Roman
221caf7b763SAlisa-Dariana Roman            spi-max-frequency = <1000000>;
222caf7b763SAlisa-Dariana Roman            spi-cpol;
223caf7b763SAlisa-Dariana Roman            spi-cpha;
224*8524782eSAlisa-Dariana Roman            #clock-cells = <0>;
225caf7b763SAlisa-Dariana Roman            interrupts = <25 0x2>;
226caf7b763SAlisa-Dariana Roman            interrupt-parent = <&gpio>;
227caf7b763SAlisa-Dariana Roman            aincom-supply = <&aincom>;
228caf7b763SAlisa-Dariana Roman            dvdd-supply = <&dvdd>;
229caf7b763SAlisa-Dariana Roman            avdd-supply = <&avdd>;
230caf7b763SAlisa-Dariana Roman            vref-supply = <&vref>;
231caf7b763SAlisa-Dariana Roman
232caf7b763SAlisa-Dariana Roman            channel@0 {
233caf7b763SAlisa-Dariana Roman                reg = <0>;
234caf7b763SAlisa-Dariana Roman                diff-channels = <1 6>;
235caf7b763SAlisa-Dariana Roman            };
236caf7b763SAlisa-Dariana Roman
237caf7b763SAlisa-Dariana Roman            channel@1 {
238caf7b763SAlisa-Dariana Roman                reg = <1>;
239caf7b763SAlisa-Dariana Roman                single-channel = <1>;
240caf7b763SAlisa-Dariana Roman            };
241caf7b763SAlisa-Dariana Roman        };
242caf7b763SAlisa-Dariana Roman    };
243