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/linux/Documentation/devicetree/bindings/timer/
H A Dst,spear-timer.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/st,spear-timer.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SPEAr ARM Timer
10 - Viresh Kumar <vireshk@kernel.org>
11 - Shiraz Hashim <shiraz.linux.kernel@gmail.com>
15 const: st,spear-timer
24 - compatible
25 - reg
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/linux/arch/arm/mach-spear/
H A Dspear3xx.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * arch/arm/mach-spear3xx/spear3xx.c
7 * Copyright (C) 2009-2012 ST Microelectronics
16 #include <linux/clk/spear.h>
21 #include "spear.h"
78 /* get the system timer clock */ in spear3xx_timer_init()
85 /* get the suitable parent clock for timer*/ in spear3xx_timer_init()
H A Dtime.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * arch/arm/plat-spear/time.c
29 * also affect other timer.
59 * Minimum clocksource/clockevent timer range in seconds
77 /* find out actual clock driving Timer */ in spear_clocksource_init()
97 /* stop the timer */ in spear_timer_shutdown()
113 /* stop the timer */ in spear_set_oneshot()
128 /* stop the timer */ in spear_set_periodic()
176 evt->event_handler(evt); in spear_timer_interrupt()
195 if (request_irq(irq, spear_timer_interrupt, IRQF_TIMER, "timer", NULL)) in spear_clockevent_init()
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H A Dspear13xx.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * arch/arm/mach-spear13xx/spear13xx.c
15 #include <linux/clk/spear.h>
19 #include <asm/hardware/cache-l2x0.h>
21 #include "spear.h"
27 * 512KB (64KB/way), 8-way associativity, parity supported in spear13xx_l2x0_init()
105 /* get the system timer clock */ in spear13xx_timer_init()
112 /* get the suitable parent clock for timer*/ in spear13xx_timer_init()
H A Dspear6xx.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * arch/arm/mach-spear6xx/spear6xx.c
8 * Rajeev Kumar<rajeev-dlh.kumar@st.com>
15 #include <linux/clk/spear.h>
26 #include "spear.h"
375 /* get the system timer clock */ in spear6xx_timer_init()
382 /* get the suitable parent clock for timer*/ in spear6xx_timer_init()
/linux/arch/arm/boot/dts/st/
H A Dspear13xx.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #address-cells = <1>;
10 #size-cells = <1>;
11 interrupt-parent = <&gic>;
14 #address-cells = <1>;
15 #size-cells = <0>;
18 compatible = "arm,cortex-a9";
21 next-level-cache = <&L2>;
25 compatible = "arm,cortex-a9";
28 next-level-cache = <&L2>;
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H A Dspear3xx.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
9 #address-cells = <1>;
10 #size-cells = <1>;
11 interrupt-parent = <&vic>;
14 #address-cells = <0>;
15 #size-cells = <0>;
18 compatible = "arm,arm926ej-s";
29 #address-cells = <1>;
30 #size-cells = <1>;
31 compatible = "simple-bus";
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H A Dspear1340-evb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
13 compatible = "st,spear1340-evb", "st,spear1340";
14 #address-cells = <1>;
15 #size-cells = <1>;
23 pinctrl-names = "default";
24 pinctrl-0 = <&state_default>;
47 spdif-in {
51 spdif-out {
59 smi-pmx {
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H A Dspear600.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
7 #address-cells = <1>;
8 #size-cells = <1>;
12 #address-cells = <0>;
13 #size-cells = <0>;
16 compatible = "arm,arm926ej-s";
27 #address-cells = <1>;
28 #size-cells = <1>;
29 compatible = "simple-bus";
32 vic0: interrupt-controller@f1100000 {
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/linux/drivers/rtc/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
44 This clock should be battery-backed, so that it reads the correct
45 time when the system boots from a power-off state. Otherwise, your
141 once-per-second update interrupts, used for synchronization.
159 will be called rtc-test.
173 will be called rtc-88pm860x.
183 will be called rtc-88pm80x.
193 will be called rtc-88pm886.
197 tristate "Abracon AB-RTCMC-32.768kHz-B5ZE-S3"
200 AB-RTCMC-32.768kHz-B5ZE-S3 I2C RTC chip.
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/linux/Documentation/networking/device_drivers/ethernet/stmicro/
H A Dstmmac.rst1 .. SPDX-License-Identifier: GPL-2.0+
13 - In This Release
14 - Feature List
15 - Kernel Configuration
16 - Command Line Parameters
17 - Driver Information and Notes
18 - Debug Information
19 - Support
28 (i.e. 7xxx/5xxx SoCs), SPEAr (arm), Loongson1B (mips) and XILINX XC2V3000
33 (and older) and DesignWare(R) Cores Ethernet Quality-of-Service version 4.0
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/linux/arch/arm/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
162 The ARM series is a line of low-power-consumption RISC chip designs
164 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
165 manufactured, but legacy ARM-based PC hardware remains popular in
173 relocations. The combined range is -/+ 256 MiB, which is usually
266 Patch phys-to-virt and virt-to-phys translation functions at
270 This can only be used with non-XIP MMU kernels where the base
316 bool "MMU-based Paged Memory Management Support"
319 Select if you want MMU-based virtualised addressing space
354 # This is sorted alphabetically by mach-* pathname. However, plat-*
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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