| /linux/tools/perf/Documentation/ |
| H A D | perf-arm-spe.txt | 1 perf-arm-spe(1) 5 ---- 6 perf-arm-spe - Support for Arm Statistical Profiling Extension within Perf tools 9 -------- 11 'perf record' -e arm_spe// 14 ----------- 16 The SPE (Statistical Profiling Extension) feature provides accurate attribution of latencies and 17 events down to individual instructions. Rather than being interrupt-driven, it picks an 32 This is chosen from a sample population, for SPE this is an IMPLEMENTATION DEFINED choice of all 33 architectural instructions or all micro-ops. Sampling happens at a programmable interval. The [all …]
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| H A D | perf-c2c.txt | 1 perf-c2c(1) 5 ---- 6 perf-c2c - Shared Data C2C/HITM Analyzer. 9 -------- 12 'perf c2c record' [<options>] \-- [<record command options>] <command> 16 ----------- 24 with thresholding feature. On AMD, the tool uses IBS op pmu (due to hardware 25 limitations, perf c2c is not supported on Zen3 cpus). On Arm64 it uses SPE to 27 required. See linkperf:perf-arm-spe[1] for a setup guide. Due to the 28 statistical nature of Arm SPE sampling, not every memory operation will be [all …]
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| H A D | perf-mem.txt | 1 perf-mem(1) 5 ---- 6 perf-mem - Profile memory accesses 9 -------- 14 ----------- 20 and stores are sampled. Use the -t option to limit to loads or stores. 22 Note that on Intel systems the memory latency reported is the use-latency, 26 On Arm64 this uses SPE to sample load and store operations, therefore hardware 27 and kernel support is required. See linkperf:perf-arm-spe[1] for a setup guide. 28 Due to the statistical nature of SPE sampling, not every memory operation will [all …]
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| H A D | perf.txt | 5 ---- 6 perf - Performance analysis tools for Linux 9 -------- 11 'perf' [--version] [--help] [OPTIONS] COMMAND [ARGS] 14 ------- 15 -h:: 16 --help:: 19 -v:: 20 --version:: 23 -vv:: [all …]
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| H A D | perf-record.txt | 1 perf-record(1) 5 ---- 6 perf-record - Run a command and record its profile into perf.data 9 -------- 11 'perf record' [-e <EVENT> | --event=EVENT] [-a] <command> 12 'perf record' [-e <EVENT> | --event=EVENT] [-a] \-- <command> [<options>] 15 ----------- 17 from it, into perf.data - without displaying anything. 23 ------- 27 -e:: [all …]
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| /linux/Documentation/devicetree/bindings/perf/ |
| H A D | spe-pmu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/perf/spe-pmu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: ARMv8.2 Statistical Profiling Extension (SPE) Performance Monitor Units (PMU) 10 - Will Deacon <will@kernel.org> 14 performance sample data using an in-memory trace buffer. 18 const: arm,statistical-profiling-extension-v1 23 The PPI to signal SPE events. For heterogeneous systems where SPE is only 24 supported on a subset of the CPUs, please consult the arm,gic-v3 binding [all …]
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| /linux/tools/perf/arch/arm64/util/ |
| H A D | arm-spe.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Arm Statistical Profiling Extensions (SPE) support 4 * Copyright (c) 2017-2018, Arm Ltd. 22 #include "../../../util/pmu.h" 27 #include "../../../util/arm-spe.h" 48 list_for_each_entry(term, &evsel->config_terms, list) { in arm_spe_is_set_freq() 49 if (term->type == EVSEL__CONFIG_TERM_FREQ) in arm_spe_is_set_freq() 62 struct perf_cpu_map *event_cpus = evlist->core.user_requested_cpus; in arm_spe_find_cpus() 101 struct perf_pmu *pmu = NULL; in arm_spe_save_cpu_header() local 108 return -ENOMEM; in arm_spe_save_cpu_header() [all …]
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| /linux/arch/arm64/kvm/hyp/nvhe/ |
| H A D | switch.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2015 - ARM Ltd 8 #include <hyp/sysreg-sr.h> 10 #include <linux/arm-smccc.h> 26 #include <asm/debug-monitors.h> 31 /* Non-VHE specific context */ 52 ___activate_traps(vcpu, vcpu->arch.hcr_el2); in __activate_traps() 55 write_sysreg(vcpu->arch.mdcr_el2, mdcr_el2); in __activate_traps() 63 struct kvm_cpu_context *ctxt = &vcpu->arch.ctxt; in __activate_traps() 104 write_sysreg_hcr(this_cpu_ptr(&kvm_init_params)->hcr_el2); in __deactivate_traps() [all …]
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| /linux/tools/perf/tests/shell/ |
| H A D | test_arm_spe.sh | 2 # Check Arm SPE trace data recording and synthesized samples (exclusive) 4 # Uses the 'perf record' to record trace data of Arm SPE events; 5 # then verify if any SPE event samples are generated by SPE with 8 # SPDX-License-Identifier: GPL-2.0 12 perf list pmu | grep -E -q 'arm_spe_[0-9]+//' && return 0 25 rm -f ${perfdata} 26 rm -f ${perfdata}.old 46 # from arm-spe.c/arm_spe_synth_events() 47 …events="(ld1-miss|ld1-access|llc-miss|lld-access|tlb-miss|tlb-access|branch-miss|remote-access|mem… 50 …# dd 3048 [002] 1 l1d-access: ffffaa64999c __GI___libc_write+0x3c (/lib/aarch64-… [all …]
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| H A D | test_arm_spe_fork.sh | 2 # Check Arm SPE doesn't hang when there are forks 4 # SPDX-License-Identifier: GPL-2.0 8 perf list pmu | grep -E -q 'arm_spe_[0-9]+//' && return 0 14 TEST_PROGRAM="perf test -w sqrtloop 10" 21 rm -f ${PERF_RECORD_LOG} 22 rm -f ${PERF_DATA} 28 perf record -o ${PERF_DATA} -e arm_spe/period=65536/ -vvv -- $TEST_PROGRAM > ${PERF_RECORD_LOG} 2>&… 31 # Check if perf hangs by checking the perf-record logs. 33 log0=$(wc -l $PERF_RECORD_LOG) 36 log1=$(wc -l $PERF_RECORD_LOG) [all …]
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| /linux/tools/perf/arch/arm/util/ |
| H A D | pmu.c | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <linux/coresight-pmu.h> 12 #include "arm-spe.h" 13 #include "hisi-ptt.h" 15 #include "../../../util/pmu.h" 16 #include "../../../util/cs-et 19 perf_pmu__arch_init(struct perf_pmu * pmu) perf_pmu__arch_init() argument [all...] |
| H A D | auxtrace.c | 1 // SPDX-License-Identifier: GPL-2.0 9 #include <linux/coresight-pmu.h> 16 #include "../../../util/pmu.h" 18 #include "cs-etm.h" 19 #include "arm-spe.h" 20 #include "hisi-ptt.h" 32 *err = -ENOMEM; in find_all_arm_spe_pmus() 40 *err = -ENOMEM; in find_all_arm_spe_pmus() 48 arm_spe_pmus[*nr_spes]->type, in find_all_arm_spe_pmus() 49 arm_spe_pmus[*nr_spes]->name); in find_all_arm_spe_pmus() [all …]
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| /linux/drivers/perf/ |
| H A D | arm_pmu_acpi.c | 1 // SPDX-License-Identifier: GPL-2.0-only 29 gsi = gicc->performance_interrupt; in arm_pmu_acpi_register_irq() 32 * Per the ACPI spec, the MADT cannot describe a PMU that doesn't in arm_pmu_acpi_register_irq() 41 if (gicc->flags & ACPI_MADT_PERFORMANCE_IRQ_MODE) in arm_pmu_acpi_register_irq() 67 gsi = gicc->performance_interrupt; in arm_pmu_acpi_unregister_irq() 83 if (pdev->num_resources != 1) in arm_acpi_register_pmu_device() 84 return -ENXIO; in arm_acpi_register_pmu_device() 86 if (pdev->resource[0].flags != IORESOURCE_IRQ) in arm_acpi_register_pmu_device() 87 return -ENXIO; in arm_acpi_register_pmu_device() 97 if (gicc->header.length < len) in arm_acpi_register_pmu_device() [all …]
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| H A D | arm_spe_pmu.c | 1 // SPDX-License-Identifier: GPL-2.0-only 54 event->hw.flags |= SPE_PMU_HW_FLAGS_CX; in set_spe_event_has_cx() 59 return !!(event->hw.flags & SPE_PMU_HW_FLAGS_CX); in get_spe_event_has_cx() 71 struct pmu pmu; member 99 #define to_spe_pmu(p) (container_of(p, struct arm_spe_pmu, pmu)) 101 /* Convert a free-running index from perf into an SPE buffer offset */ 103 ((idx) % ((unsigned long)(buf)->nr_pages << PAGE_SHIFT)) 132 return !!(spe_pmu->features & arm_spe_pmu_feat_caps[cap]); in arm_spe_pmu_cap_get() 136 return spe_pmu->counter_sz; in arm_spe_pmu_cap_get() 138 return spe_pmu->min_period; in arm_spe_pmu_cap_get() [all …]
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| /linux/arch/powerpc/platforms/ |
| H A D | Kconfig.cputype | 1 # SPDX-License-Identifier: GPL-2.0 7 bool "64-bit kernel" 10 This option selects whether a 32-bit or a 64-bit kernel 267 default "-mtune=power10" if $(cc-option,-mtune=power10) 268 default "-mtune=power9" if $(cc-option,-mtune=power9) 269 default "-mtune=power8" if $(cc-option,-mtune=power8) 346 This option enables kernel support for larger than 32-bit physical 351 is platform-dependent. 367 any affect on a non-altivec cpu (it does, however add code to the 383 VSX (P7 and above), but does not have any affect on a non-VSX [all …]
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| /linux/tools/perf/util/ |
| H A D | arm-spe.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * Arm Statistical Profiling Extensions (SPE) support 4 * Copyright (c) 2017-2018, Arm Ltd. 28 #include "thread-stack.h" 31 #include "util/synthetic-events.h" 33 #include "arm-spe.h" 34 #include "arm-spe-decoder/arm-spe-decoder.h" 35 #include "arm-spe-decoder/arm-spe-pkt-decoder.h" 101 struct arm_spe *spe; member 132 static void arm_spe_dump(struct arm_spe *spe __maybe_unused, in arm_spe_dump() [all …]
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| H A D | arm-spe.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 3 * Arm Statistical Profiling Extensions (SPE) support 4 * Copyright (c) 2017-2018, Arm Ltd. 30 /* PMU type shared by CPUs */ 46 /* Associated PMU type */
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| H A D | Build | 4 perf-util-y += arm64-frame-pointer-unwind-support.o 5 perf-util-y += addr2line.o 6 perf-util-y += addr_location.o 7 perf-util-y += annotate.o 8 perf-util-y += block-info.o 9 perf-util-y += block-range.o 10 perf-util-y += build-id.o 11 perf-util-y += cacheline.o 12 perf-util-y += capstone.o 13 perf-util-y += config.o [all …]
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| /linux/include/linux/perf/ |
| H A D | arm_pmu.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 3 * linux/arch/arm/include/asm/pmu.h 20 * The Armv7 and Armv8.8 or less CPU PMU supports up to 32 event counters. 21 * The Armv8.9/9.4 CPU PMU supports up to 33 event counters. 29 * ARM PMU hw_event flags 44 [0 ... PERF_COUNT_HW_MAX - 1] = HW_OP_UNSUPPORTED 47 [0 ... C(MAX) - 1] = { \ 48 [0 ... C(OP_MAX) - 1] = { \ 49 [0 ... C(RESULT_MAX) - 1] = CACHE_OP_UNSUPPORTED, \ 53 /* The events for a given PMU register set. */ [all …]
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| /linux/arch/arm64/include/asm/ |
| H A D | el2_setup.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 3 * Copyright (C) 2012,2013 - ARM Ltd 11 #error Assembly-only header 17 #include <linux/irqchip/arm-gic-v3.h> 23 * Compliant CPUs advertise their VHE-onlyness with 39 * - Fruity CPUs predate the !FEAT_E2H0 relaxation, and seem to 42 * - On CPUs that lack FEAT_FGT, a hypervisor can't trap guest 50 * effectively VHE-only or not. 102 * Allow Non-secure EL1 and EL0 to access physical timer and counter. 120 /* Branch to skip_label if SPE version is less than given version */ [all …]
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| /linux/Documentation/trace/coresight/ |
| H A D | coresight-perf.rst | 1 .. SPDX-License-Identifier: GPL-2.0 4 CoreSight - Perf 15 perf record -e cs_etm//u testbinary 22 perf report --stdio --dump -i perf.data 26 …ERF_RECORD_AUXTRACE size: 0x11dd0 offset: 0 ref: 0x1b614fc1061b0ad1 idx: 0 tid: 531230 cpu: -1 48 for the support such as libopencsd and libopencsd-dev or download it 60 ------------------------ 81 Fine-grained tracing with AUX pause and resume 82 ---------------------------------------------- 87 provides AUX pause and resume functionality for fine-grained tracing. [all …]
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| /linux/arch/arm64/boot/dts/arm/ |
| H A D | foundation-v8.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 /dts-v1/; 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 15 model = "Foundation-v8A"; 16 compatible = "arm,foundation-aarch64", "arm,vexpress"; 17 interrupt-parent = <&gic>; 18 #address-cells = <2>; 19 #size-cells = <2>; 22 stdout-path = "serial0:115200n8"; 33 #address-cells = <2>; [all …]
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| H A D | morello.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) 3 * Copyright (c) 2020-2024, Arm Limited. All rights reserved. 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 interrupt-parent = <&gic>; 11 #address-cells = <2>; 12 #size-cells = <2>; 14 soc_refclk50mhz: clock-50000000 { 15 compatible = "fixed-clock"; 16 #clock-cells = <0>; 17 clock-frequency = <50000000>; [all …]
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| H A D | fvp-base-revc.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * Architecture Envelope Model (AEM) ARMv8-A 11 /dts-v1/; 13 #include <dt-bindings/interrupt-controller/arm-gic.h> 17 #include "rtsm_ve-motherboard.dtsi" 18 #include "rtsm_ve-motherboard-rs2.dtsi" 22 compatible = "arm,fvp-base-revc", "arm,vexpress"; 23 interrupt-parent = <&gic>; 24 #address-cells = <2>; 25 #size-cells = <2>; [all …]
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| /linux/drivers/dma/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 80 depends on 440SPe || 440SP 96 tristate "Arm DMA-350 support" 101 Enable support for the Arm DMA-350 controller. 119 tristate "Analog Devices AXI-DMAC DMA support" 125 Enable support for the Analog Devices AXI-DMAC peripheral. This DMA 161 tristate "SA-11x0 DMA support" 166 Support the DMA engine found on Intel StrongARM SA-1100 and 167 SA-1110 SoCs. This DMA engine can only be used with on-chip 227 This module can be found on Freescale Vybrid and LS-1 SoCs. [all …]
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