Home
last modified time | relevance | path

Searched +full:spdif +full:- +full:controller (Results 1 – 25 of 179) sorted by relevance

12345678

/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dfsl,imx-audio-spdif.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/fsl,imx-audio-spdif.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
15 - items:
16 - enum:
17 - fsl,imx-sabreauto-spdif
18 - fsl,imx6sx-sdb-spdif
19 - const: fsl,imx-audio-spdif
[all …]
H A Dimx-audio-spdif.txt5 - compatible : "fsl,imx-audio-spdif"
7 - model : The user-visible name of this sound complex
9 - spdif-controller : The phandle of the i.MX S/PDIF controller
14 - spdif-out : This is a boolean property. If present, the
19 display-controller.
21 - spdif-in : This is a boolean property. If present, the receiving
30 sound-spdif {
31 compatible = "fsl,imx-audio-spdif";
32 model = "imx-spdif";
33 spdif-controller = <&spdif>;
[all …]
H A Dfsl,spdif.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/fsl,spdif.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale Sony/Philips Digital Interface Format (S/PDIF) Controller
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
20 - fsl,imx35-spdif
21 - fsl,vf610-spdif
22 - fsl,imx6sx-spdif
23 - fsl,imx8qm-spdif
[all …]
H A Damlogic,aiu.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Amlogic AIU audio output controller
10 - Jerome Brunet <jbrunet@baylibre.com>
13 - $ref: dai-common.yaml#
17 pattern: "^audio-controller@.*"
19 "#sound-dai-cells":
24 - enum:
25 - amlogic,aiu-gxbb
[all …]
H A Drockchip-spdif.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/rockchip-spdif.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip SPDIF transceive
[all...]
H A Dfsl-asoc-card.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/fsl-asoc-card.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
28 - Shengjiu Wang <shengjiu.wang@nxp.com>
33 - items:
34 - enum:
35 - fsl,imx-sgtl5000
36 - fsl,imx25-pdk-sgtl5000
37 - fsl,imx53-cpuvo-sgtl5000
[all …]
H A Dadi,axi-spdif-tx.txt1 ADI AXI-SPDIF controller
4 - compatible : Must be "adi,axi-spdif-tx-1.00.a"
5 - reg : Must contain SPDIF core's registers location and length
6 - clocks : Pairs of phandle and specifier referencing the controller's clocks.
7 The controller expects two clocks, the clock used for the AXI interface and
9 - clock-names: "axi" for the clock to the AXI interface, "ref" for the sample
11 - dmas: Pairs of phandle and specifier for the DMA channel that is used by
13 - dma-names : Must be "tx"
15 For more details on the 'dma', 'dma-names', 'clock' and 'clock-names' properties
17 * resource-names.txt
[all …]
H A Dfsl,spdif.txt1 Freescale Sony/Philips Digital Interface Format (S/PDIF) Controller
9 - compatible : Compatible list, should contain one of the following
11 "fsl,imx35-spdif",
12 "fsl,vf610-spdif",
13 "fsl,imx6sx-spdif",
15 - reg : Offset and length of the register set for the device.
17 - interrupts : Contains the spdif interrupt.
19 - dmas : Generic dma devicetree binding as described in
22 - dma-names : Two dmas have to be defined, "tx" and "rx".
24 - clocks : Contains an entry for each entry in clock-names.
[all …]
H A Dzte,zx-spdif.txt1 ZTE ZX296702 SPDIF controller
4 - compatible : Must be "zte,zx296702-spdif"
5 - reg : Must contain SPDIF core's registers location and length
6 - clocks : Pairs of phandle and specifier referencing the controller's clocks.
7 - clock-names: "tx" for the clock to the SPDIF interface.
8 - dmas: Pairs of phandle and specifier for the DMA channel that is used by
10 - dma-names : Must be "tx"
12 For more details on the 'dma', 'dma-names', 'clock' and 'clock-names' properties
14 * resource-names.txt
15 * clock/clock-bindings.txt
[all …]
H A Dnvidia,tegra20-spdif.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/nvidia,tegra20-spdif.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra20 S/PDIF Controller
10 The S/PDIF controller supports both input and output in serial audio
11 digital interface format. The input controller can digitally recover
12 a clock from the received stream. The S/PDIF controller is also used
16 - Thierry Reding <treding@nvidia.com>
17 - Jon Hunter <jonathanh@nvidia.com>
[all …]
H A Dallwinner,sun4i-a10-spdif.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/allwinner,sun4i-a10-spdif.yaml#
5 $schema: http://devicetree.org/meta-schema
[all...]
H A Dxlnx,spdif.txt1 Device-Tree bindings for Xilinx SPDIF IP
3 The IP supports playback and capture of SPDIF audio
6 - compatible: "xlnx,spdif-2.0"
7 - clock-names: List of input clocks.
9 - clocks: Input clock specifier. Refer to common clock bindings.
10 - reg: Base address and address length of the IP core instance.
11 - interrupts-parent: Phandle for interrupt controller.
12 - interrupts: List of Interrupt numbers.
13 - xlnx,spdif-mode: 0 :- receiver mode
14 1 :- transmitter mode
[all …]
H A Dimg,spdif-in.txt1 Imagination Technologies SPDIF Input Controller
5 - compatible : Compatible list, must contain "img,spdif-in"
7 - #sound-dai-cells : Must be equal to 0
9 - reg : Offset and length of the register set for the device
11 - dmas: Contains an entry for each entry in dma-names.
13 - dma-names: Must include the following entry:
16 - clocks : Contains an entry for each entry in clock-names
18 - clock-names : Includes the following entries:
23 - resets: Should contain a phandle to the spdif in reset signal, if any
25 - reset-names: Should contain the reset signal name "rst", if a
[all …]
H A Dimg,spdif-out.txt1 Imagination Technologies SPDIF Output Controller
5 - compatible : Compatible list, must contain "img,spdif-out"
7 - #sound-dai-cells : Must be equal to 0
9 - reg : Offset and length of the register set for the device
11 - dmas: Contains an entry for each entry in dma-names.
13 - dma-names: Must include the following entry:
16 - clocks : Contains an entry for each entry in clock-names.
18 - clock-names : Includes the following entries:
22 - resets: Contains a phandle to the spdif out reset signal
24 - reset-names: Contains the reset signal name "rst"
[all …]
H A Damlogic,axg-spdifin.txt1 * Amlogic Audio SPDIF Input
4 - compatible: 'amlogic,axg-spdifin' or
5 'amlogic,g12a-spdifin' or
6 'amlogic,sm1-spdifin'
7 - interrupts: interrupt specifier for the spdif input.
8 - clocks: list of clock phandle, one for each entry clock-names.
9 - clock-names: should contain the following:
11 * "refclk" : spdif input reference clock
12 - #sound-dai-cells: must be 0.
15 - resets: phandle to the dedicated reset line of the spdif input.
[all …]
H A Damlogic,axg-spdifin.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/amlogic,axg-spdifin.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Amlogic Audio AXG SPDIF Input
10 - Jerome Brunet <jbrunet@baylibre.com>
15 - const: amlogic,axg-spdifin
16 - items:
17 - enum:
18 - amlogic,g12a-spdifin
[all …]
H A Dbrcm,cygnus-audio.txt1 BROADCOM Cygnus Audio I2S/TDM/SPDIF controller
4 - compatible : "brcm,cygnus-audio"
5 - #address-cells: 32bit valued, 1 cell.
6 - #size-cells: 32bit valued, 0 cell.
7 - reg : Should contain audio registers location and length
8 - reg-names: names of the registers listed in "reg" property
10 set of DMA, I2S_OUT and SPDIF registers. "i2s_in" contains
12 - clocks: PLL and leaf clocks used by audio ports
13 - assigned-clocks: PLL and leaf clocks
14 - assigned-clock-parents: parent clocks of the assigned clocks
[all …]
H A Dfsl,xcvr.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP Audio Transceiver (XCVR) Controller
10 - Viorel Suman <viorel.suman@nxp.com>
13 NXP XCVR (Audio Transceiver) is a on-chip functional module
15 HDMI2.1 eARC, HDMI1.4 ARC and SPDIF.
23 - fsl,imx8mp-xcvr
24 - fsl,imx93-xcvr
25 - fsl,imx95-xcvr
[all …]
/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dspear1340.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
16 compatible = "st,spear-spics-gpio";
18 st-spics,peripcfg-reg = <0x42c>;
19 st-spic
[all...]
/freebsd/sys/contrib/device-tree/src/arm/allwinner/
H A Dsun5i-gr8-evb.dts5 * Mylène Josserand <mylene.josserand@free-electrons.com>
7 * This file is dual-licensed: you can use it either under the terms
46 /dts-v1/;
47 #include "sun5i-gr8.dtsi"
48 #include "sunxi-common-regulators.dtsi"
50 #include <dt-bindings/gpio/gpio.h>
51 #include <dt-bindings/input/input.h>
52 #include <dt-bindings/interrupt-controller/irq.h>
55 model = "NextThing GR8-EVB";
56 compatible = "nextthing,gr8-evb", "nextthing,gr8";
[all …]
/freebsd/sys/contrib/device-tree/src/mips/img/
H A Dpistachio.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <dt-bindings/clock/pistachio-clk.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/mips-gic.h>
11 #include <dt-bindings/reset/pistachio-resets.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
19 interrupt-parent = <&gic>;
22 #address-cells = <1>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/display/rockchip/
H A Dcdn-dp-rockchip.txt5 - compatible: must be "rockchip,rk3399-cdn-dp"
7 - reg: physical base address of the controller and length
9 - clocks: from common clock binding: handle to dp clock.
11 - clock-names: from common clock binding:
12 Required elements: "core-clk" "pclk" "spdif" "grf"
14 - resets : a list of phandle + reset specifier pairs
15 - reset-names : string of reset names
16 Required elements: "apb", "core", "dptx", "spdif"
17 - power-domains : power-domain property defined with a phandle
19 - assigned-clocks: main clock, should be <&cru SCLK_DP_CORE>
[all …]
/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6qdl-apf6dev.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
11 stdout-path = &uart4;
15 compatible = "pwm-backlight";
17 brightness-levels = <0 4 8 16 32 64 128 255>;
18 default-brightness-level = <0>;
19 power-supply = <&reg_5v>;
23 compatible = "fsl,imx-parallel-display";
[all …]
H A Dimx6sx-sabreauto.dts1 // SPDX-License-Identifier: GPL-2.0
5 /dts-v1/;
11 compatible = "fsl,imx6sx-sabreauto", "fsl,imx6sx";
19 compatible = "gpio-leds";
20 pinctrl-names = "default";
21 pinctrl-0 = <&pinctrl_led>;
23 led-user {
26 linux,default-trigger = "heartbeat";
30 vcc_sd3: regulator-vcc-sd3 {
31 compatible = "regulator-fixed";
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/rockchip/
H A Drk3328-rock64.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
20 stdout-path = "serial2:1500000n8";
23 gmac_clkin: external-gmac-clock {
24 compatible = "fixed-clock";
25 clock-frequency = <125000000>;
26 clock-output-names = "gmac_clkin";
27 #clock-cells = <0>;
30 vcc_sd: sdmmc-regulator {
31 compatible = "regulator-fixed";
[all …]

12345678