Lines Matching +full:spdif +full:- +full:controller

1 Freescale Sony/Philips Digital Interface Format (S/PDIF) Controller
9   - compatible		: Compatible list, should contain one of the following
11 			  "fsl,imx35-spdif",
12 			  "fsl,vf610-spdif",
13 			  "fsl,imx6sx-spdif",
15   - reg			: Offset and length of the register set for the device.
17   - interrupts		: Contains the spdif interrupt.
19   - dmas		: Generic dma devicetree binding as described in
22   - dma-names		: Two dmas have to be defined, "tx" and "rx".
24   - clocks		: Contains an entry for each entry in clock-names.
26   - clock-names		: Includes the following entries:
27 	"core"		  The core clock of spdif controller.
28 	"rxtx<0-7>"	  Clock source list for tx and rx clock.
30 			  list connecting to the spdif clock mux in "SPDIF
34 	"spba"		  The spba clock is required when SPDIF is placed as a
42    - big-endian		: If this property is absent, the native endian mode
48 spdif: spdif@2004000 {
49 	compatible = "fsl,imx35-spdif";
54 	dma-names = "rx", "tx";
61 	clock-names = "core", "rxtx0",
67 	big-endian;