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/linux/drivers/leds/trigger/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
15 This allows LEDs to be controlled by a programmable timer
17 blinking the LED without any further software interaction.
18 For more details read Documentation/leds/leds-class.rst.
23 tristate "LED One-shot Trigger"
25 This allows LEDs to blink in one-shot pulses with parameters
26 controlled via sysfs. It's useful to notify the user on
39 This allows LEDs to be controlled by disk activity.
46 This allows LEDs to be controlled by MTD activity.
52 This allows LEDs to be controlled by a CPU load average.
[all …]
/linux/drivers/regulator/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
20 drivers can still be used in systems with no software controllable
37 useful for systems which use a combination of software
38 managed regulators and simple non-configurable regulators.
53 There are some classes of devices that are controlled entirely
64 the netlink mechanism. User-space applications can subscribe to these events
65 for real-time updates on various regulator events.
75 They provide two I2C-controlled DC/DC step-down converters with
101 tristate "Active-semi act8865 voltage regulator"
106 This driver controls a active-semi act8865 voltage output
[all …]
/linux/tools/perf/pmu-events/arch/x86/icelakex/
H A Dother.json3 … where the core was running in a manner where Turbo may be clipped to the Non-AVX turbo schedule.",
7 …s running with power-delivery for baseline license level 0. This includes non-AVX codes, SSE, AVX…
16 … running with power-delivery for license level 1. This includes high current AVX 256-bit instruct…
25 …running with power-delivery for license level 2 (introduced in Skylake Server microarchitecture). …
113 …uster(SNC) Mode. In SNC Mode counts only those DRAM accesses that are controlled by the close SNC…
123 … on a distant memory controller of this socket when the system is in SNC (sub-NUMA cluster) mode.",
153 …uster(SNC) Mode. In SNC Mode counts only those DRAM accesses that are controlled by the close SNC…
163 …luster(SNC) Mode. In SNC Mode counts only those PMM accesses that are controlled by the close SNC…
203 … on a distant memory controller of this socket when the system is in SNC (sub-NUMA cluster) mode.",
213 … on a distant memory controller of this socket when the system is in SNC (sub-NUMA cluster) mode.",
[all …]
/linux/drivers/gpu/drm/amd/pm/powerplay/inc/
H A Dhardwaremanager.h5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
87 PHM_PlatformCaps_EnableVoltageControl, /* indicates voltage can be controlled */
88 PHM_PlatformCaps_EnableSideportControl, /* indicates Sideport can be controlled */
[all …]
/linux/Documentation/devicetree/bindings/leds/
H A Dleds-bcm6328.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/leds/leds-bcm6328.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Álvaro Fernández Rojas <noltari@gmail.com>
16 controller), which can either be controlled by software (exporting the 74x164
17 as spi-gpio. See
20 Some of these Serial LEDs are hardware controlled (e.g. ethernet LEDs) and
21 exporting the 74x164 as spi-gpio prevents those LEDs to be hardware
22 controlled, so the only chance to keep them working is by using this driver.
[all …]
/linux/tools/perf/pmu-events/arch/x86/sapphirerapids/
H A Dother.json39 …uster(SNC) Mode. In SNC Mode counts only those DRAM accesses that are controlled by the close SNC…
49 … on a distant memory controller of this socket when the system is in SNC (sub-NUMA cluster) mode.",
79 …uster(SNC) Mode. In SNC Mode counts only those DRAM accesses that are controlled by the close SNC…
89 … Sub NUMA Cluster(SNC) Mode. In SNC Mode counts PMM accesses that are controlled by the close or …
129 … on a distant memory controller of this socket when the system is in SNC (sub-NUMA cluster) mode.",
139 …"BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for …
149 …"BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for …
159software prefetches for exclusive ownership (PREFETCHW) that were supplied by DRAM attached to thi…
169software prefetches for exclusive ownership (PREFETCHW) that were supplied by DRAM on a distant me…
249 …uster(SNC) Mode. In SNC Mode counts only those DRAM accesses that are controlled by the close SNC…
[all …]
/linux/Documentation/hwmon/
H A Damc6821.rst19 -----------
22 The chip has one on-chip and one remote temperature sensor and one pwm fan
24 The pwm can be controlled either from software or automatically.
29 temp1_input ro on-chip temperature
55 pwm1_enable rw regulator mode, 1=open loop, 2=fan controlled
56 by remote temperature, 3=fan controlled by
57 combination of the on-chip temperature and
58 remote-sensor temperature,
59 4=fan controlled by target rpm set with
72 temp1_auto_point2_temp rw The low-temperature limit of the proportional
[all …]
/linux/tools/perf/pmu-events/arch/x86/emeraldrapids/
H A Dother.json39 …uster(SNC) Mode. In SNC Mode counts only those DRAM accesses that are controlled by the close SNC…
49 … on a distant memory controller of this socket when the system is in SNC (sub-NUMA cluster) mode.",
79 …uster(SNC) Mode. In SNC Mode counts only those DRAM accesses that are controlled by the close SNC…
99 … on a distant memory controller of this socket when the system is in SNC (sub-NUMA cluster) mode.",
109 …"BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for …
119 …"BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for …
129software prefetches for exclusive ownership (PREFETCHW) that were supplied by DRAM attached to thi…
139software prefetches for exclusive ownership (PREFETCHW) that were supplied by DRAM on a distant me…
219 …uster(SNC) Mode. In SNC Mode counts only those DRAM accesses that are controlled by the close SNC…
229 …Sub NUMA Cluster(SNC) Mode. In SNC Mode counts DRAM accesses that are controlled by the close or …
[all …]
/linux/include/uapi/sound/
H A Dfirewire.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
30 unsigned int notification; /* DICE-specific bits */
33 #define SND_EFW_TRANSACTION_USER_SEQNUM_MAX ((__u32)((__u16)~0) - 1)
51 __u32 message; /* Digi00x-specific message */
56 __u32 message; /* MOTU-specific bits. */
77 * struct snd_firewire_event_ff400_message - the container for message from Fireface 400 when
139 * Returns -EBUSY if the driver is already streaming.
149 * In below MOTU models, software is allowed to control their DSP by accessing to registers.
150 * - 828mk2
151 * - 896hd
[all …]
/linux/Documentation/networking/
H A Drepresentors.rst1 .. SPDX-License-Identifier: GPL-2.0
9 used to control internal switching on SmartNICs. For the closely-related port
10 representors on physical (multi-port) switches, see
14 ----------
16 Since the mid-2010s, network cards have started offering more complex
17 virtualisation capabilities than the legacy SR-IOV approach (with its simple
18 MAC/VLAN-based switching model) can support. This led to a desire to offload
19 software-defined networks (such as OpenVSwitch) to these NICs to specify the
24 virtual switches and IOV devices. Just as each physical port of a Linux-
25 controlled switch has a separate netdev, so does each virtual port of a virtual
[all …]
/linux/drivers/net/mdio/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
20 loadable module or built-in.
58 tristate "APM X-Gene SoC MDIO bus controller"
62 APM X-Gene SoC's.
72 third revision of the ASPEED MDIO register interface - the first two
81 This module implements the MDIO bus protocol in software,
109 tristate "GPIO lib-based bitbanged MDIO buses"
113 Supports GPIO lib-based MDIO busses.
116 will be called mdio-gpio.
177 IPQ40xx, IPQ60xx, IPQ807x and IPQ50xx series Soc-s.
[all …]
/linux/drivers/clk/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
6 The <linux/clk.h> calls support software clock gating and
59 Low-Noise JESD204B Compliant Clock Jitter Cleaner With Dual Loop PLLs
66 This driver supports NCO (Numerically Controlled Oscillator) blocks
88 These multi-function devices have two fixed-rate oscillators, clocked at 32KHz each.
98 multi-function device has one fixed-rate oscillator, clocked
102 tristate "Clock driver controlled via SCMI interface"
105 This driver provides support for clocks that are controlled
112 tristate "Clock driver controlled via SCPI interface"
115 This driver provides support for clocks that are controlled
[all …]
/linux/Documentation/admin-guide/hw-vuln/
H A Dsrso.rst1 .. SPDX-License-Identifier: GPL-2.0
8 known scenario of poisoning CPU functional units - the Branch Target
9 Buffer (BTB) and Return Address Predictor (RAP) in this case - and then
14 Return Address Stack/Return Stack Buffer). In some cases, a non-architectural
20 but the concern is that an attacker can mis-train the CPU BTB to predict
21 non-architectural CALL instructions in kernel space and use this to
23 leading to information disclosure via a speculative side-channel.
25 The issue is tracked under CVE-2023-20569.
28 -------------------
30 AMD Zen, generations 1-4. That is, all families 0x17 and 0x19. Older
[all …]
H A Dspectre.rst1 .. SPDX-License-Identifier: GPL-2.0
14 -------------------
22 - Intel Core, Atom, Pentium, and Xeon processors
24 - AMD Phenom, EPYC, and Zen processors
26 - IBM POWER and zSeries processors
28 - Higher end ARM processors
30 - Apple CPUs
32 - Higher end MIPS CPUs
34 - Likely most other high performance CPUs. Contact your CPU vendor for details.
40 ------------
[all …]
/linux/arch/arm/boot/dts/allwinner/
H A Dsun4i-a10-pcduino2.dts4 * This file is dual-licensed: you can use it either under the terms
9 * a) This file is free software; you can redistribute it and/or
11 * published by the Free Software Foundation; either version 2 of the
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
31 * included in all copies or substantial portions of the Software.
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
[all …]
/linux/drivers/infiniband/core/
H A Dpacker.c5 * This software is available to you under a choice of one of two
15 * - Redistributions of source code must retain the above
19 * - Redistributions in binary form must reproduce the above
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
53 * ib_pack - Pack a structure into a buffer
60 * controlled by the array of fields in @desc.
76 shift = 32 - desc[i].offset_bits - desc[i].size_bits; in ib_pack()
84 mask = cpu_to_be32(((1ull << desc[i].size_bits) - 1) << shift); in ib_pack()
[all …]
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Driscv,cpu-intc.yaml1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/riscv,cpu-intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: RISC-V Hart-Level Interrupt Controller (HLIC)
10 RISC-V cores include Control Status Registers (CSRs) which are local to
11 each CPU core (HART in RISC-V terminology) and can be read or written by
12 software. Some of these CSRs are used to control local interrupts connected
16 The RISC-V supervisor ISA manual specifies three interrupt sources that are
17 attached to every HLIC namely software interrupts, the timer interrupt, and
[all …]
/linux/Documentation/infiniband/
H A Dtag_matching.rst5 The MPI standard defines a set of rules, known as tag-matching, for matching
10 * User tag - wild card may be specified by the receiver
15 message envelopes may match, the pair that includes the earliest posted-send
16 and the earliest posted-receive is the pair that must be used to satisfy the
31 1. The Eager protocol- the complete message is sent when the send is
35 2. The Rendezvous Protocol - the sender sends the tag-matching header,
48 maintained by the hardware, with the software expected to shadow this list.
51 pre-posted receive for this arriving message, it is passed to the software and
54 specified receive buffer. This allows overlapping receive-side MPI tag
57 When a receive-message is posted, the communication library will first check
[all …]
/linux/include/net/
H A Dcodel_impl.h5 * Codel - The Controlled-Delay Active Queue Management algorithm
7 * Copyright (C) 2011-2012 Kathleen Nichols <nichols@pollere.com>
8 * Copyright (C) 2011-2012 Van Jacobson <van@pollere.net>
22 * derived from this software without specific prior written permission.
25 * software may be distributed under the terms of the GNU General
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
56 params->interval = MS2TIME(100); in codel_params_init()
57 params->target = MS2TIME(5); in codel_params_init()
58 params->ce_threshold = CODEL_DISABLED_THRESHOLD; in codel_params_init()
[all …]
H A Dcodel_qdisc.h5 * Codel - The Controlled-Delay Active Queue Management algorithm
7 * Copyright (C) 2011-2012 Kathleen Nichols <nichols@pollere.com>
8 * Copyright (C) 2011-2012 Van Jacobson <van@pollere.net>
22 * derived from this software without specific prior written permission.
25 * software may be distributed under the terms of the GNU General
29 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
39 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
64 return (struct codel_skb_cb *)qdisc_skb_cb(skb)->data; in get_codel_cb()
69 return get_codel_cb(skb)->enqueue_time; in codel_get_enqueue_time()
74 get_codel_cb(skb)->enqueue_time = codel_get_time(); in codel_set_enqueue_time()
/linux/Documentation/ABI/testing/
H A Dsysfs-class-led-trigger-netdev4 Contact: linux-leds@vger.kernel.org
11 Contact: linux-leds@vger.kernel.org
24 Contact: linux-leds@vger.kernel.org
38 Contact: linux-leds@vger.kernel.org
47 When offloaded is true, the blink interval is controlled by
53 Contact: linux-leds@vger.kernel.org
62 When offloaded is true, the blink interval is controlled by
68 Contact: linux-leds@vger.kernel.org
71 hardware or whether software fallback is used.
73 If 0, the LED is using software fallback to blink.
[all …]
/linux/tools/perf/pmu-events/arch/x86/graniterapids/
H A Dother.json39 …uster(SNC) Mode. In SNC Mode counts only those DRAM accesses that are controlled by the close SNC…
69 …"BriefDescription": "Counts demand reads for ownership (RFO) requests and software prefetches for …
79software prefetches for exclusive ownership (PREFETCHW) that were supplied by DRAM attached to thi…
133 … This is usually caused when the front-end pipeline runs into starvation periods (e.g. branch misp…
145 …servation Station (RS) was empty. Could be useful to closely sample on front-end latency issues (s…
/linux/Documentation/devicetree/bindings/gpio/
H A Dspear_spics.txt10 Chipselects can be controlled by software by turning them as GPIOs. SPEAr
11 provides another interface through system registers through which software can
17 * compatible: should be defined as "st,spear-spics-gpio"
19 * st-spics,peripcfg-reg: peripheral configuration register offset
20 * st-spics,sw-enable-bit: bit offset to enable sw control
21 * st-spics,cs-value-bit: bit offset to drive chipselect low or high
22 * st-spics,cs-enable-mask: chip select number bit mask
23 * st-spics,cs-enable-shift: chip select number program offset
24 * gpio-controller: Marks the device node as gpio controller
25 * #gpio-cells: should be 1 and will mention chip select number
[all …]
/linux/arch/mips/include/asm/octeon/
H A Dcvmx-fpa.h7 * Copyright (c) 2003-2008 Cavium Networks
9 * This file is free software; you can redistribute it and/or modify
11 * published by the Free Software Foundation.
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
20 * along with this file; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
41 #include <asm/octeon/cvmx-address.h>
42 #include <asm/octeon/cvmx-fpa-defs.h>
56 * the (64-bit word) location in scratchpad to write
62 /* the ID of the device on the non-coherent bus */
[all …]
/linux/Documentation/arch/arm64/
H A Dlegacy_instructions.rst11 The emulation mode can be controlled by writing to sysctl nodes
13 behaviours and the corresponding values of the sysctl nodes -
24 Uses software emulation. To aid migration of software, in this mode
46 -----------------------------
66 for this feature to be enabled. If a new CPU - which doesn't support mixed
67 endian - is hotplugged in after this feature has been enabled, there could

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