| /linux/drivers/gpu/drm/panfrost/ |
| H A D | panfrost_issues.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* (C) COPYRIGHT 2014-2018 ARM Limited. All rights reserved. */
16 /* Need way to guarantee that all previously-translated memory accesses
20 /* On job complete with non-done the cache is not flushed */
43 /* Repeatedly Soft-stopping a job chain consisting of (Vertex Shader,
50 /* Change in RMUs in use causes problems related with the core's SDC */
53 /* Compute endpoint has a 4-deep queue of tasks, meaning a soft stop
57 /* HT: Tiler returns TERMINATED for non-terminated command */
71 /* Missing cache flush in multi core-group configuration */
77 /* Soft-stopping fragment jobs might fail with TILE_RANGE_FAULT */
[all …]
|
| /linux/Documentation/driver-api/ |
| H A D | rfkill.rst | 2 rfkill - RF kill switch support
21 The rfkill subsystem has a concept of "hard" and "soft" block, which
25 - hard block
26 read-only radio block that cannot be overridden by software
28 - soft block
34 admin-guide/kernel-parameters.rst.
42 * the rfkill core,
43 * the deprecated rfkill-input module (an input layer handler, being
47 The rfkill core provides API for kernel drivers to register their radio
49 the system know about hardware-disabled states that may be implemented on
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| /linux/drivers/watchdog/ |
| H A D | octeon-wdt-main.c | 1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (C) 2007-2017 Cavium, Inc.
11 * (c) Copyright 1996-1997 Alan Cox <alan@lxorguk.ukuu.org.uk>,
16 * "AS-IS" and at no charge.
32 * is asserted, then after an additional period a chip wide soft reset.
63 #include <asm/octeon/cvmx-boot-vector.h>
64 #include <asm/octeon/cvmx-ciu2-defs.h>
65 #include <asm/octeon/cvmx-rst-defs.h>
81 /* Set to non-zero when userspace countdown mode active */
123 * octeon_wdt_poke_irq - Poke the watchdog when an interrupt is received
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| /linux/Documentation/devicetree/bindings/pci/ |
| H A D | hisilicon-histb-pcie.txt | 3 The HiSilicon STB PCIe host controller is based on the DesignWare PCIe core.
4 It shares common functions with the DesignWare PCIe core driver and inherits
6 Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml.
11 - compatible: Should be one of the following strings:
12 "hisilicon,hi3798cv200-pcie"
13 - reg: Should contain sysctl, rc_dbi, config registers location and length.
14 - reg-names: Must include the following entries:
16 "rc-dbi": configuration space of PCIe controller;
18 - bus-range: PCI bus numbers covered.
19 - interrupts: MSI interrupt.
[all …]
|
| /linux/arch/arc/kernel/ |
| H A D | intc-compact.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011-12 Synopsys, Inc. (www.synopsys.com)
18 * -Platform independent, needed for each CPU (not foldable into init_IRQ)
19 * -Called very early (start_kernel -> setup_arch -> setup_processor)
22 * -Optionally, setup the High priority Interrupts as Level 2 IRQs
38 pr_info("Level-2 interrupts bitset %x\n", level_mask); in arc_init_IRQ()
54 * ARC700 core includes a simple on-chip intc supporting
55 * -per IRQ enable/disable
56 * -2 levels of interrupts (high/low)
57 * -all interrupts being level triggered
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| /linux/drivers/infiniband/sw/rxe/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
24 To configure and work with soft-RoCE driver please use the
25 following wiki page under "configure Soft-RoCE (RXE)" section:
27 https://github.com/linux-rdma/rdma-core/blob/master/Documentation/rxe.md
|
| /linux/include/linux/ |
| H A D | rfkill.h | 2 * Copyright (C) 2006 - 2007 Ivo van Doorn
44 * struct rfkill_ops - rfkill driver methods
46 * @poll: poll the rfkill block state(s) -- only assign this method
55 * the rfkill core query your driver before setting a requested
58 * (blocked == true) -- ignore and return 0 when hard blocked.
69 * rfkill_alloc - Allocate rfkill structure
70 * @name: name of the struct -- the string is not copied internally
86 * rfkill_register - Register a rfkill structure.
103 * rfkill_pause_polling - Pause polling
106 * Pause polling -- say transmitter is off for other reasons.
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| /linux/Documentation/devicetree/bindings/usb/ |
| H A D | hisilicon,hi3798mv200-dwc3.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/usb/hisilicon,hi3798mv200-dwc3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Yang Xiwen <forbidden405@foxmail.com>
14 const: hisilicon,hi3798mv200-dwc3
16 '#address-cells':
19 '#size-cells':
26 - description: Controller bus clock
27 - description: Controller suspend clock
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|
| /linux/Documentation/devicetree/bindings/regulator/ |
| H A D | qcom-labibb-regulator.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/regulator/qcom-labibb-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sumit Semwal <sumit.semwal@linaro.org>
20 - const: qcom,pmi8998-lab-ibb
21 - items:
22 - enum:
23 - qcom,pmi8950-lab-ibb
24 - const: qcom,pmi8998-lab-ibb
[all …]
|
| /linux/arch/arm/mach-versatile/ |
| H A D | platsmp.c | 1 // SPDX-License-Identifier: GPL-2.0-only
8 * woken, and where there is no way to hot-unplug CPUs. Real platforms
29 volatile int versatile_cpu_release = -1;
46 * the limited-bandwidth bus - which affects the calibration value.
57 versatile_write_cpu_release(-1); in versatile_secondary_init()
79 * since we haven't sent them a soft interrupt, they shouldn't in versatile_boot_secondary()
85 * Send the secondary CPU a soft interrupt, thereby causing in versatile_boot_secondary()
94 if (versatile_cpu_release == -1) in versatile_boot_secondary()
101 * now the secondary core is starting up let it run its in versatile_boot_secondary()
106 return versatile_cpu_release != -1 ? -ENOSYS : 0; in versatile_boot_secondary()
|
| /linux/sound/oss/dmasound/ |
| H A D | dmasound_core.c | 1 // SPDX-License-Identifier: GPL-2.0-only
13 * interface and the u-law to signed byte conversion.
15 * Michael Marte (marte@informatik.uni-muenchen.de) did the sound queue,
18 * - Michael Schlueter for initial ideas and documentation on the MFP and
20 * - Therapy? for their CD 'Troublegum' which really made me rock.
30 * - Fixed atari_stram_alloc() call, the timer
33 * - Afte
[all...] |
| /linux/drivers/staging/media/atomisp/ |
| H A D | notes.txt | 6 The ISP has its own address-space and main memory needs to be mapped into
11 the hmm code finds the backing hmm-buffer-object (hmm_bo) by looking
28 this means that unlike in fixed pipelines the soft pipelines
36 the core atomisp code. The most important parts of the struct
37 are filled by the atomisp core itself, like e.g. the port number.
40 -metadata_width, metadata_height, metadata_effective_width, set by
41 the ov5693 driver (and used by the atomisp core)
42 -raw_bayer_order, adjusted by the ov2680 driver when flipping since
|
| /linux/Documentation/devicetree/bindings/reset/ |
| H A D | microchip,rst.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Steen Hegelund <steen.hegelund@microchip.com>
11 - Lars Povlsen <lars.povlsen@microchip.com>
16 - One Time Switch Core Reset (Soft Reset)
20 pattern: "^reset-controller@[0-9a-f]+$"
24 - enum:
25 - microchip,sparx5-switch-reset
26 - microchip,lan966x-switch-reset
[all …]
|
| /linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/ |
| H A D | fsl,qe-ucc-qmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,qe-ucc-qmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Herve Codina <herve.codina@bootlin.com>
19 - enum:
20 - fsl,mpc8321-ucc-qmc
21 - const: fsl,qe-ucc-qmc
25 - description: UCC (Unified communication controller) register base
26 - description: Dual port ram base
[all …]
|
| /linux/sound/soc/codecs/ |
| H A D | tda7419.c | 1 // SPDX-License-Identifier: GPL-2.0-only
14 #include <sound/core.h>
136 if (tvc->reg == tvc->rreg) in tda7419_vol_is_stereo()
146 (struct tda7419_vol_control *)kcontrol->private_value; in tda7419_vol_info()
148 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in tda7419_vol_info()
149 uinfo->coun in tda7419_vol_info()
[all...] |
| H A D | cs4349.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * cs4349.c -- CS4349 ALSA Soc Audio driver
21 #include <sound/core.h>
25 #include <sound/soc-dapm.h>
32 { 2, 0x00 }, /* r02 - Mode Control */
33 { 3, 0x09 }, /* r03 - Volume, Mixing and Inversion Control */
34 { 4, 0x81 }, /* r04 - Mute Control */
35 { 5, 0x00 }, /* r05 - Channel A Volume Control */
36 { 6, 0x00 }, /* r06 - Channel B Volume Control */
37 { 7, 0xB1 }, /* r07 - Ramp and Filter Control */
[all …]
|
| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | xlnx,clocking-wizard.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/xlnx,clocking-wizard.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shubhrajyoti Datta <shubhrajyoti.datta@amd.com>
13 The clocking wizard is a soft ip clocking block of Xilinx versal. It
20 - xlnx,clocking-wizard
21 - xlnx,clocking-wizard-v5.2
22 - xlnx,clocking-wizard-v6.0
23 - xlnx,versal-clk-wizard
[all …]
|
| /linux/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | xlnx,intc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/xlnx,intc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michal Simek <michal.simek@amd.com>
13 The controller is a soft IP core that is configured at build time for the
19 const: xlnx,xps-intc-1.00.a
27 power-domains:
33 "#interrupt-cells":
40 interrupt-controller: true
[all …]
|
| /linux/drivers/net/wireless/broadcom/b43/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
27 b43-fwcutter.
61 # Auto-select SSB PCI-HOST support, if possible
69 # Auto-select SSB PCICORE driver, if possible
81 Broadcom 43xx device support for Soft-MAC SDIO devices.
83 With this config option you can drive Soft-MAC b43 cards with a
87 Note that this does not support Broadcom 43xx Full-MAC devices.
108 bool "Support for G-PHY (802.11g) devices"
117 bool "Support for N-PHY (the main 802.11n series) devices"
128 bool "Support for LP-PHY (low-power 802.11g) devices"
[all …]
|
| /linux/Documentation/devicetree/bindings/power/supply/ |
| H A D | summit,smb347-charger.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/supply/summit,smb347-charger.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - David Heidelberg <david@ixit.cz>
11 - Dmitry Osipenko <digetx@gmail.com>
16 - summit,smb345
17 - summit,smb347
18 - summit,smb358
26 monitored-battery: true
[all …]
|
| /linux/Documentation/block/ |
| H A D | bfq-iosched.rst | 5 BFQ is a proportional-share I/O scheduler, with some extra
6 low-latency capabilities. In addition to cgroups support (blkio or io
9 - BFQ guarantees a high system and application responsiveness, and a
10 low latency for time-sensitive applications, such as audio or video
12 - BFQ distributes bandwidth, not just time, among processes or
19 goal, for a given device, is to achieve the maximum-possible
20 throughput at all times, then do switch off all low-latency heuristics
25 As every I/O scheduler, BFQ adds some overhead to per-I/O-request
27 single-lock-protected, per-request processing time of BFQ---i.e., the
29 completion hooks---is, e.g., 1.9 us on an Intel Core i7-2760QM@2.40GHz
[all …]
|
| /linux/Documentation/devicetree/bindings/leds/ |
| H A D | leds-sgm3140.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/leds-sgm3140.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Luca Weiss <luca@z3ntu.xyz>
13 The SGM3140 is a current-regulated charge pump which can regulate two current
17 http://www.sg-micro.com/uploads/soft/20190626/1561535688.pdf
22 - ocs,ocp8110
23 - richtek,rt5033-led
24 - sgmicro,sgm3140
[all …]
|
| /linux/Documentation/devicetree/bindings/net/ |
| H A D | altr,socfpga-stmmac.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/altr,socfpga-stmmac.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Maxime Chevallier <maxime.chevallier@bootlin.com>
16 # TODO: Determine how to handle the Arria10 reset-name, stmmaceth-ocp, that
24 - altr,socfpga-stmmac
25 - altr,socfpga-stmmac-a10-s10
26 - altr,socfpga-stmmac-agilex5
29 - compatible
[all …]
|
| /linux/Documentation/driver-api/fpga/ |
| H A D | intro.rst | 5 Linux. Some of the core intentions of the FPGA subsystems are:
16 other users. Write the linux-fpga mailing list and maintainers and
24 ------------
29 includes the framework in fpga-mgr.c and the low level drivers that
33 -----------
37 programming begins and re-enabled afterwards. An FPGA bridge may be
38 actual hard hardware that gates a bus to a CPU or a soft ("freeze")
40 of an FPGA. This subsystem includes fpga-bridge.c and the low level
44 -----------
49 The FPGA Region framework (fpga-region.c) associates managers and
[all …]
|
| /linux/arch/powerpc/include/asm/ |
| H A D | paca.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
21 #include <asm/exception-64e.h>
23 #include <asm/exception-64s.h>
34 #include <asm-generic/mmiowb_types.h>
49 #define get_slb_shadow() (get_paca()->slb_shadow_ptr)
66 * read-only (after boot) fields in the first cacheline to
96 /* this becomes non-zero. */
105 u64 dscr_default; /* per-CPU default DSCR */
118 u8 stab_rr; /* stab/slb round-robin counter */
134 /* Shared by all threads of a core -- points to tcd of first thread */
[all …]
|