Home
last modified time | relevance | path

Searched +full:soc +full:- +full:nvmem (Results 1 – 25 of 78) sorted by relevance

1234

/linux/Documentation/devicetree/bindings/soc/imx/
H A Dimx8m-soc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/imx8m-soc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8M Series SoC
10 - Alice Guo <alice.guo@nxp.com>
13 NXP i.MX8M series SoCs contain fuse entries from which SoC Unique ID can be
21 - fsl,imx8mm
22 - fsl,imx8mn
23 - fsl,imx8mp
[all …]
/linux/Documentation/devicetree/bindings/nvmem/
H A Dxlnx,zynqmp-nvmem.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/nvmem/xlnx,zynqmp-nvmem.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 like SOC revision, IDCODE and specific purpose efuses.
14 - Kalyani Akula <kalyani.akula@amd.com>
15 - Praveen Teja Kundanala <praveen.teja.kundanala@amd.com>
18 - $ref: nvmem.yaml#
22 const: xlnx,zynqmp-nvmem-fw
25 - compatible
[all …]
H A Dqcom,sec-qfprom.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/nvmem/qcom,sec-qfprom.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Komal Bajaj <quic_kbajaj@quicinc.com>
13 For some of the Qualcomm SoC's, it is possible that the qfprom region is
14 protected from non-secure access. In such situations, the OS have to use
18 - $ref: nvmem.yaml#
19 - $ref: nvmem-deprecated-cells.yaml#
24 - enum:
[all …]
H A Dapple,efuses.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/nvmem/apple,efuses.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Apple SoC eFuse-based NVMEM
10 Apple SoCs such as the M1 contain factory-programmed eFuses used to e.g. store
11 calibration data for the PCIe and the Type-C PHY or unique chip identifiers
15 - Sven Peter <sven@svenpeter.dev>
18 - $ref: nvmem.yaml#
19 - $ref: nvmem-deprecated-cells.yaml#
[all …]
H A Dqcom,qfprom.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/nvmem/qcom,qfprom.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 - $ref: nvmem.yaml#
14 - $ref: nvmem-deprecated-cells.yaml#
19 - enum:
20 - qcom,apq8064-qfprom
21 - qcom,apq8084-qfprom
[all …]
H A Dfsl,t1023-sfp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/nvmem/fsl,t1023-sfp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Richard Alpe <richard@bit42.se>
13 Read support for the eFuses (SFP) on NXP QorIQ series SoC's.
16 - $ref: nvmem.yaml#
20 const: fsl,t1023-sfp
26 - compatible
27 - reg
[all …]
H A Dimx-ocotp.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/nvmem/imx-ocotp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX On-Chip OTP Controller (OCOTP)
10 - Shawn Guo <shawnguo@kernel.org>
11 - Sascha Hauer <s.hauer@pengutronix.de>
12 - Fabio Estevam <festevam@gmail.com>
15 This binding represents the on-chip eFuse OTP controller found on
20 - $ref: nvmem.yaml#
[all …]
H A Drockchip,otp.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/nvmem/rockchip,otp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Heiko Stuebner <heiko@sntech.de>
15 - rockchip,px30-otp
16 - rockchip,rk3308-otp
17 - rockchip,rk3576-otp
18 - rockchip,rk3588-otp
27 clock-names:
[all …]
/linux/Documentation/devicetree/bindings/firmware/xilinx/
H A Dxlnx,zynqmp-firmware.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/firmware/xilinx/xlnx,zynqmp-firmware.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Nava kishore Manne <nava.kishore.manne@amd.com>
12 description: The zynqmp-firmware node describes the interface to platform
23 - description: For implementations complying for Zynq Ultrascale+ MPSoC.
24 const: xlnx,zynqmp-firmware
26 - description: For implementations complying for Versal.
27 const: xlnx,versal-firmware
[all …]
/linux/Documentation/driver-api/
H A Dnvmem.rst1 .. SPDX-License-Identifier: GPL-2.0
4 NVMEM Subsystem
9 This document explains the NVMEM Framework along with the APIs provided,
14 *NVMEM* is the abbreviation for Non Volatile Memory layer. It is used to
15 retrieve configuration of SOC or Device specific data from non volatile
18 Before this framework existed, NVMEM drivers like eeprom were stored in
20 register a sysfs file, allow in-kernel users to access the content of the
23 This was also a problem as far as other in-kernel users were involved, since
29 Addresses, SoC/Revision ID, part numbers, and so on) from the NVMEMs.
31 NVMEM Providers
[all …]
/linux/Documentation/devicetree/bindings/thermal/
H A Dmediatek,lvts-thermal.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/thermal/mediatek,lvts-thermal.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek SoC Low Voltage Thermal Sensor (LVTS)
10 - Balsam CHIHI <bchihi@baylibre.com>
14 a Sensing device - Thermal Sensing Micro Circuit Unit (TSMCU),
15 a Converter - Low Voltage Thermal Sensor converter (LVTS), and
21 - mediatek,mt7988-lvts-ap
22 - mediatek,mt8186-lvts
[all …]
H A Dmediatek,thermal.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Mediatek thermal controller for on-SoC temperatures
10 - Sascha Hauer <s.hauer@pengutronix.de>
19 - $ref: thermal-sensor.yaml#
24 - enum:
25 - mediatek,mt2701-thermal
26 - mediatek,mt2712-thermal
27 - mediatek,mt7622-thermal
[all …]
/linux/Documentation/devicetree/bindings/soc/mediatek/
H A Dmtk-svs.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/mediatek/mtk-svs.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Roger Lu <roger.lu@mediatek.com>
11 - Matthias Brugger <matthias.bgg@gmail.com>
12 - Kevin Hilman <khilman@kernel.org>
24 - mediatek,mt8183-svs
25 - mediatek,mt8186-svs
26 - mediatek,mt8188-svs
[all …]
/linux/drivers/cpufreq/
H A DKconfig.arm1 # SPDX-License-Identifier: GPL-2.0-only
7 tristate "Allwinner nvmem based SUN50I CPUFreq driver"
12 This adds the nvmem based CPUFreq driver for Allwinner
13 h6 SoC.
16 module will be called sun50i-cpufreq-nvmem.
19 tristate "Airoha EN7581 SoC CPUFreq support"
28 tristate "Apple Silicon SoC CPUFreq support"
80 Some Broadcom STB SoCs use a co-processor running proprietary firmware
84 Say Y, if you have a Broadcom SoC with AVS support for DFS or DVFS.
87 tristate "Calxeda Highbank-based"
[all …]
H A Dsun50i-cpufreq-nvmem.c1 // SPDX-License-Identifier: GPL-2.0
3 * Allwinner CPUFreq nvmem based driver
5 * The sun50i-cpufreq-nvmem driver reads the efuse value from the SoC to
13 #include <linux/arm-smccc.h>
16 #include <linux/nvmem-consumer.h>
41 * We treat unexpected efuse values as if the SoC was from in sun50i_h6_efuse_xlate()
42 * the slowest bin. Expected efuse values are 1-3, slowest in sun50i_h6_efuse_xlate()
46 return efuse_value - 1; in sun50i_h6_efuse_xlate()
79 * returned speedbin index is 4 -> 0/2 -> 3 -> 1, from worst to best.
118 pr_warn("sun50i-cpufreq-nvmem: unknown speed bin 0x%x, using default bin 0\n", in sun50i_h616_efuse_xlate()
[all …]
/linux/Documentation/devicetree/bindings/opp/
H A Dopp-v2-kryo-cpu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/opp/opp-v2-kryo-cpu.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Technologies, Inc. NVMEM OPP
10 - Ilia Lin <ilia.lin@kernel.org>
13 - $ref: opp-v2-base.yaml#
22 The qcom-cpufreq-nvmem driver reads the efuse value from the SoC to provide
25 operating-points-v2 table when it is parsed by the OPP framework.
30 - operating-points-v2-krait-cpu
[all …]
/linux/Documentation/devicetree/bindings/phy/
H A Drealtek,usb2phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Stanley Chang <stanley_chang@realtek.com>
23 XHCI controller#0 -- usb2phy -- phy#0
24 |- usb3phy -- phy#0
25 XHCI controller#1 -- usb2phy -- phy#0
26 XHCI controller#2 -- usb2phy -- phy#0
27 |- usb3phy -- phy#0
33 XHCI controller#0 -- usb2phy -- phy#0
[all …]
/linux/drivers/soc/atmel/
H A Dsfr.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * sfr.c - driver for special function registers
10 #include <linux/nvmem-provider.h>
28 return regmap_bulk_read(priv->regmap, SFR_SN0 + offset, in atmel_sfr_read()
33 .name = "atmel-sfr",
43 struct device *dev = &pdev->dev; in atmel_sfr_probe()
44 struct device_node *np = dev->of_node; in atmel_sfr_probe()
45 struct nvmem_device *nvmem; in atmel_sfr_probe() local
52 return -ENOMEM; in atmel_sfr_probe()
54 priv->regmap = syscon_node_to_regmap(np); in atmel_sfr_probe()
[all …]
/linux/drivers/nvmem/
H A Dqfprom.c1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <linux/nvmem-provider.h>
23 /* Amount of time required to hold charge to blow fuse in micro-seconds */
44 * struct qfprom_soc_data - config that varies from SoC to SoC.
60 * struct qfprom_priv - structure holding qfprom attributes
62 * @qfpraw: iomapped memory space for qfprom-efuse raw address space.
63 * @qfpconf: iomapped memory space for qfprom-efuse configuration address
70 * @soc_data: Data that for things that varies from SoC to SoC.
84 * struct qfprom_touched_values - saved values to restore after blowing
97 * struct qfprom_soc_compatible_data - Data matched against the SoC
[all …]
H A Dmtk-efuse.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Andrew-CT Chen <andrew-ct.chen@mediatek.com>
11 #include <linux/nvmem-provider.h>
27 void __iomem *addr = priv->base + reg; in mtk_reg_read()
48 static void mtk_efuse_fixup_dt_cell_info(struct nvmem_device *nvmem, in mtk_efuse_fixup_dt_cell_info() argument
51 size_t sz = strlen(cell->name); in mtk_efuse_fixup_dt_cell_info()
55 * a number with range [0-7] (max 3 bits): post process to use in mtk_efuse_fixup_dt_cell_info()
56 * it in OPP tables to describe supported-hw. in mtk_efuse_fixup_dt_cell_info()
58 if (cell->nbits <= 3 && in mtk_efuse_fixup_dt_cell_info()
59 strncmp(cell->name, "gpu-speedbin", min(sz, strlen("gpu-speedbin"))) == 0) in mtk_efuse_fixup_dt_cell_info()
[all …]
H A Dzynqmp_nvmem.c1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright (C) 2022 - 2023, Advanced Micro Devices, Inc.
7 #include <linux/dma-mapping.h>
9 #include <linux/nvmem-provider.h>
12 #include <linux/firmware/xlnx-zynqmp.h>
40 * struct xilinx_efuse - the basic structure
44 * @flag: 0 - represents efuse read and 1- represents efuse write
45 * @pufuserfuse:0 - represents non-puf efuses, offset is used for read/write
46 * 1 - represents puf user fuse row number.
74 return -EOPNOTSUPP; in zynqmp_efuse_access()
[all …]
/linux/arch/arm64/boot/dts/renesas/
H A Dr8a779f4.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Device Tree Source for the R-Car S4-8 (R8A779F4) SoC
15 nvmem-layout {
16 compatible = "fixed-layout";
17 #address-cells = <1>;
18 #size-cells = <1>;
27 nvmem-cells = <&ufs_tune>;
28 nvmem-cell-names = "calibration";
/linux/Documentation/devicetree/bindings/iio/adc/
H A Damlogic,meson-saradc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/amlogic,meson-saradc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Martin Blumenstingl <martin.blumenstingl@googlemail.com>
18 - const: amlogic,meson-saradc
19 - items:
20 - enum:
21 - amlogic,meson8-saradc
22 - amlogic,meson8b-saradc
[all …]
/linux/Documentation/devicetree/bindings/cache/
H A Dqcom,llcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bjorn Andersson <andersson@kernel.org>
13 LLCC (Last Level Cache Controller) provides last level of cache memory in SoC,
15 SoC, the idea is to minimize the local caches at the clients and migrate to
23 - qcom,ipq5424-llcc
24 - qcom,qcs615-llcc
25 - qcom,qcs8300-llcc
26 - qcom,qdu1000-llcc
[all …]
/linux/Documentation/devicetree/bindings/soc/socionext/
H A Dsocionext,uniphier-soc-glue-debug.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-soc-glue-debug.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Socionext UniPhier SoC-glue logic debug part
10 - Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
13 SoC-glue logic debug part implemented on Socionext UniPhier SoCs is
20 - enum:
21 - socionext,uniphier-ld4-soc-glue-debug
22 - socionext,uniphier-pro4-soc-glue-debug
[all …]

1234