| /freebsd/sys/contrib/device-tree/Bindings/iommu/ |
| H A D | arm,smmu.yaml | 4 $id: http://devicetree.org/schemas/iommu/arm,smmu.yaml#
18 The SMMU may also raise interrupts in response to various fault
26 - description: Qcom SoCs implementing "arm,smmu-v2"
29 - qcom,msm8996-smmu-v2
30 - qcom,msm8998-smmu-v2
31 - qcom,sdm630-smmu-v2
32 - qcom,sm6375-smmu-v2
33 - const: qcom,smmu-v2
35 - description: Qcom SoCs implementing "qcom,smmu-500" and "arm,mmu-500"
38 - qcom,qcm2290-smmu-500
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| H A D | arm,smmu-v3.yaml | 4 $id: http://devicetree.org/schemas/iommu/arm,smmu-v3.yaml#
23 const: arm,smmu-v3
53 Present if page table walks made by the SMMU are cache coherent with the
56 NOTE: this only applies to the SMMU itself, not masters connected
57 upstream of the SMMU.
63 description: Avoid sending CMD_PREFETCH_* commands to the SMMU.
70 doesn't support SMMU page1 register space.
85 compatible = "arm,smmu-v3";
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| H A D | nvidia,tegra30-smmu.txt | 1 NVIDIA Tegra 30 IOMMU H/W, SMMU (System Memory Management Unit)
4 - compatible : "nvidia,tegra30-smmu"
6 of the SMMU register blocks.
10 - nvidia,ahb : phandle to the ahb bus connected to SMMU.
13 smmu {
14 compatible = "nvidia,tegra30-smmu";
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| H A D | qcom,tbu.yaml | 38 Phandle of a SMMU device and Stream ID range (address and size) that
43 - description: phandle of a smmu node
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| /freebsd/sys/arm64/iommu/ |
| H A D | smmu_acpi.c | 67 ACPI_IORT_SMMU_V3 *smmu[MAX_SMMU]; member
88 if (iort_data->smmu[i] != NULL) { in iort_handler()
91 "smmu: Already have an SMMU table"); in iort_handler()
95 iort_data->smmu[i] = (ACPI_IORT_SMMU_V3 *)node->NodeData; in iort_handler()
119 device_printf(parent, "smmu: Unable to map the IORT\n"); in smmu_acpi_identify()
125 iort_data.smmu[i] = NULL; in smmu_acpi_identify()
131 device_printf(parent, "No SMMU found.\n"); in smmu_acpi_identify()
137 BUS_PASS_INTERRUPT + BUS_PASS_ORDER_MIDDLE, "smmu", -1); in smmu_acpi_identify()
139 device_printf(parent, "add smmu child failed\n"); in smmu_acpi_identify()
145 iort_data.smmu[i]->EventGsiv, 1); in smmu_acpi_identify()
[all …]
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| H A D | smmu_fdt.c | 58 { "arm,smmu-v3", 1 },
71 device_set_desc(dev, "ARM System MMU (SMMU) v3"); in smmu_fdt_probe()
121 * by the SMMU driver. This IRQ line may or may not be provided by in smmu_fdt_attach()
172 device_printf(dev, "Failed to register SMMU.\n"); in smmu_fdt_attach()
199 DEFINE_CLASS_1(smmu, smmu_fdt_driver, smmu_fdt_methods,
202 EARLY_DRIVER_MODULE(smmu, simplebus, smmu_fdt_driver, 0, 0,
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| H A D | smmu.c | 58 * Note that SMMU does not share TLB with a main CPU.
59 * Command queue is used by this driver to Invalidate SMMU TLB, STE cache.
61 * An arm64 SoC could have more than one SMMU instance.
62 * ACPI IORT table describes which SMMU unit is assigned for a particular
68 * to interface SMMU.
70 * These are a Command queue for commands to send to the SMMU and an Event
71 * queue for event/fault reports from the SMMU. Optionally PRI queue is
78 * All SMMU queues are arranged as circular buffers in memory. They are used
80 * produced by the SMMU and consumed by software.
81 * An input queue contains data produced by software, consumed by the SMMU.
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| /freebsd/sys/contrib/device-tree/src/arm64/marvell/ |
| H A D | armada-8040.dtsi | 20 <0x0 &smmu 0x480 0x20>,
21 <0x100 &smmu 0x4a0 0x20>,
22 <0x200 &smmu 0x4c0 0x20>;
36 iommus = <&smmu 0x444>;
40 iommus = <&smmu 0x445>;
44 iommus = <&smmu 0x440>;
48 iommus = <&smmu 0x441>;
52 iommus = <&smmu 0x454>;
56 iommus = <&smmu 0x450>;
60 iommus = <&smmu 0x451>;
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| H A D | armada-7040.dtsi | 20 <0x0 &smmu 0x480 0x20>,
21 <0x100 &smmu 0x4a0 0x20>,
22 <0x200 &smmu 0x4c0 0x20>;
27 iommus = <&smmu 0x444>;
31 iommus = <&smmu 0x445>;
35 iommus = <&smmu 0x440>;
39 iommus = <&smmu 0x441>;
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| H A D | cn9130-crb-A.dts | 22 <0x0 &smmu 0x480 0x20>,
23 <0x100 &smmu 0x4a0 0x20>,
24 <0x200 &smmu 0x4c0 0x20>;
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| H A D | cn9130-crb-B.dts | 19 <0x0 &smmu 0x480 0x20>,
20 <0x100 &smmu 0x4a0 0x20>,
21 <0x200 &smmu 0x4c0 0x20>;
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| /freebsd/sys/contrib/device-tree/Bindings/display/ |
| H A D | arm,komeda.txt | 15 devicetree/bindings/iommu/arm,smmu-v3.txt,
49 iommus = <&smmu 0>, <&smmu 1>, <&smmu 2>, <&smmu 3>,
50 <&smmu 4>, <&smmu 5>, <&smmu 6>, <&smmu 7>,
51 <&smmu 8>, <&smmu 9>;
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| H A D | arm,komeda.yaml | 102 iommus = <&smmu 0>, <&smmu 1>, <&smmu 2>, <&smmu 3>,
103 <&smmu 8>,
104 <&smmu 4>, <&smmu 5>, <&smmu 6>, <&smmu 7>,
105 <&smmu 9>;
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| /freebsd/sys/arm64/acpica/ |
| H A D | acpi_iort.c | 104 ACPI_IORT_SMMU smmu; member
177 * Perform an additional lookup in case of SMMU node and ITS outtype.
186 /* Node can be SMMU or ITS. If SMMU, we need another lookup. */ in iort_smmu_trymap()
200 * Map a PCI RID to a SMMU node or an ITS node, based on outtype.
225 * Map a named component node to a SMMU node or an ITS node, based on outtype.
251 * Not implemented, map a PCIe device to the SMMU it is associated with.
254 acpi_iort_map_smmu(u_int seg, u_int devid, void **smmu, u_int *sid) in acpi_iort_map_smmu() argument
256 /* XXX: convert oref to SMMU device */ in acpi_iort_map_smmu()
324 ACPI_IORT_SMMU *smmu; in iort_add_nodes() local
343 smmu = (ACPI_IORT_SMMU *)node_entry->NodeData; in iort_add_nodes()
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| /freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
| H A D | imx8qm-ss-conn.dtsi | 9 iommus = <&smmu 0x12 0x7f80>;
14 iommus = <&smmu 0x12 0x7f80>;
19 iommus = <&smmu 0x11 0x7f80>;
24 iommus = <&smmu 0x11 0x7f80>;
29 iommus = <&smmu 0x11 0x7f80>;
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| /freebsd/sys/contrib/device-tree/src/arm64/xilinx/ |
| H A D | zynqmp.dtsi | 486 /* iommus = <&smmu 0x14e8>; */
499 /* iommus = <&smmu 0x14e9>; */
512 /* iommus = <&smmu 0x14ea>; */
525 /* iommus = <&smmu 0x14eb>; */
538 /* iommus = <&smmu 0x14ec>; */
551 /* iommus = <&smmu 0x14ed>; */
564 /* iommus = <&smmu 0x14ee>; */
577 /* iommus = <&smmu 0x14ef>; */
622 /* iommus = <&smmu 0x868>; */
635 /* iommus = <&smmu 0x869>; */
[all …]
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| /freebsd/sys/contrib/device-tree/Bindings/perf/ |
| H A D | arm,smmu-v3-pmcg.yaml | 4 $id: http://devicetree.org/schemas/perf/arm,smmu-v3-pmcg.yaml#
25 - const: arm,smmu-v3-pmcg
26 - const: arm,smmu-v3-pmcg
57 compatible = "arm,smmu-v3-pmcg";
65 compatible = "arm,smmu-v3-pmcg";
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| /freebsd/sys/contrib/device-tree/src/arm64/nvidia/ |
| H A D | tegra186.dtsi | 66 iommus = <&smmu TEGRA186_SID_EQOS>;
114 iommus = <&smmu TEGRA186_SID_GPCDMA_0>;
860 iommus = <&smmu TEGRA186_SID_SDMMC1>;
890 iommus = <&smmu TEGRA186_SID_SDMMC2>;
915 iommus = <&smmu TEGRA186_SID_SDMMC3>;
945 iommus = <&smmu TEGRA186_SID_SDMMC4>;
971 iommus = <&smmu TEGRA186_SID_SATA>;
1004 iommus = <&smmu TEGRA186_SID_HDA>;
1135 iommus = <&smmu TEGRA186_SID_XUSB_HOST>;
1157 iommus = <&smmu TEGRA186_SID_XUSB_DE
1425 smmu: iommu@12000000 { global() label
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| H A D | tegra194.dtsi | 159 iommus = <&smmu TEGRA194_SID_EQOS>;
208 iommus = <&smmu TEGRA194_SID_GPCDMA_0>;
592 iommus = <&smmu TEGRA194_SID_APE>;
1037 iommus = <&smmu TEGRA194_SID_SDMMC1>;
1076 iommus = <&smmu TEGRA194_SID_SDMMC3>;
1115 iommus = <&smmu TEGRA194_SID_SDMMC4>;
1151 iommus = <&smmu TEGRA194_SID_HDA>;
1277 iommus = <&smmu TEGRA194_SID_XUSB_DEV>;
1311 iommus = <&smmu TEGRA194_SID_XUSB_HOST>;
1734 compatible = "nvidia,tegra194-smmu", "nvidi
1808 smmu: iommu@12000000 { global() label
[all...] |
| /freebsd/sys/contrib/device-tree/Bindings/misc/ |
| H A D | fsl,qoriq-mc.txt | 28 For arm-smmu binding, see:
29 Documentation/devicetree/bindings/iommu/arm,smmu.yaml.
151 smmu: iommu@5000000 {
173 iommu-map = <23 &smmu 23 41>;
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| H A D | fsl,qoriq-mc.yaml | 38 For arm-smmu binding, see:
39 Documentation/devicetree/bindings/iommu/arm,smmu.yaml.
171 iommu-map = <23 &smmu 23 41>;
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| /freebsd/sys/contrib/device-tree/src/arm64/altera/ |
| H A D | socfpga_stratix10.dtsi | 184 iommus = <&smmu 1>;
202 iommus = <&smmu 2>;
220 iommus = <&smmu 3>;
332 iommus = <&smmu 5>;
402 smmu: iommu@fa000000 { label
403 compatible = "arm,mmu-500", "arm,smmu-v2";
522 iommus = <&smmu 6>;
536 iommus = <&smmu 7>;
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| /freebsd/sys/contrib/device-tree/src/arm64/intel/ |
| H A D | socfpga_agilex.dtsi | 177 iommus = <&smmu 1>;
195 iommus = <&smmu 2>;
213 iommus = <&smmu 3>;
327 iommus = <&smmu 5>;
396 smmu: iommu@fa000000 { label
397 compatible = "arm,mmu-500", "arm,smmu-v2";
543 iommus = <&smmu 6>;
555 iommus = <&smmu 7>;
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| /freebsd/sys/arm/nvidia/ |
| H A D | tegra_mc.c | 133 "Invalid SMMU page", /* 6 */
162 printf(" - SMMU address translation error\n"); in tegra_mc_intr()
166 printf(" - SMMU address translation security error\n"); in tegra_mc_intr()
168 printf(" - SMMU address decode error\n"); in tegra_mc_intr()
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| /freebsd/sys/contrib/device-tree/Bindings/bus/ |
| H A D | xlnx,versal-net-cdx.yaml | 20 are used to configure SMMU and GIC-ITS respectively.
77 iommu-map = <250 &smmu 250 10>;
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