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/linux/drivers/soc/qcom/
H A Dsmem.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
16 #include <linux/soc/qcom/smem.h>
38 * (@smem_ptable), that is found 4kB from the end of the main smem region. The
44 * two regions are cached and non-cached memory respectively. Each region
48 * Items in the non-cached region are allocated from the start of the partition
50 * is hence the region between the cached and non-cached offsets. The header of
55 * region with partition type (SMEM_GLOBAL_HOST) and the max smem item count is
59 * be held - currently lock number 3 of the sfpb or tcsr is used for this on all
65 * The version member of the smem header contains an array of versions for the
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/linux/Documentation/devicetree/bindings/mtd/partitions/
H A Dqcom,smem-part.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/partitions/qcom,smem-part.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SMEM NAND flash partition parser
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
14 Memory (SMEM) based partition table scheme. The maximum partitions supported
22 const: qcom,smem-part
25 "^partition-[0-9a-z]+$":
26 $ref: nvmem-cells.yaml
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H A Dpartitions.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
14 - Miquel Raynal <miquel.raynal@bootlin.com>
17 - $ref: arm,arm-firmware-suite.yaml
18 - $ref: brcm,bcm4908-partitions.yaml
19 - $ref: brcm,bcm947xx-cfe-partitions.yaml
20 - $ref: fixed-partitions.yaml
21 - $ref: linksys,ns-partitions.yaml
22 - $ref: qcom,smem-part.yaml
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/linux/drivers/mtd/parsers/
H A Dqcomsmempart.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Qualcomm SMEM NAND flash partition parser
13 #include <linux/soc/qcom/smem.h>
28 * struct smem_flash_pentry - SMEM Flash partition entry
42 * struct smem_flash_ptable - SMEM Flash partition table
69 && mtd->type == MTD_NORFLASH) { in parse_qcomsmem_part()
70 pr_err("%s: SMEM partition parser is incompatible with 4K sectors\n", in parse_qcomsmem_part()
71 mtd->name); in parse_qcomsmem_part()
72 return -EINVAL; in parse_qcomsmem_part()
75 pr_debug("Parsing partition table info from SMEM\n"); in parse_qcomsmem_part()
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/linux/tools/testing/selftests/mm/
H A Dcow.c1 // SPDX-License-Identifier: GPL-2.0-only
72 for (; size; addr += pagesize, size -= pagesize) in range_is_swapped()
85 if (pipe(comm_pipes->child_ready) < 0) { in setup_comm_pipes()
87 return -errno; in setup_comm_pipes()
89 if (pipe(comm_pipes->parent_ready) < 0) { in setup_comm_pipes()
91 close(comm_pipes->child_ready[0]); in setup_comm_pipes()
92 close(comm_pipes->child_ready[1]); in setup_comm_pipes()
93 return -errno; in setup_comm_pipes()
101 close(comm_pipes->child_ready[0]); in close_comm_pipes()
102 close(comm_pipes->child_ready[1]); in close_comm_pipes()
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/linux/drivers/net/ethernet/brocade/bna/
H A Dbfa_ioc.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Linux network driver for QLogic BR-series Converged Network Adapter.
6 * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
7 * Copyright (c) 2014-2015 QLogic Corporation
21 ((__ioc)->ioc_hwif->ioc_firmware_lock(__ioc))
23 ((__ioc)->ioc_hwif->ioc_firmware_unlock(__ioc))
24 #define bfa_ioc_reg_init(__ioc) ((__ioc)->ioc_hwif->ioc_reg_init(__ioc))
25 #define bfa_ioc_map_port(__ioc) ((__ioc)->ioc_hwif->ioc_map_port(__ioc))
27 ((__ioc)->ioc_hwif->ioc_notify_fail(__ioc))
29 ((__ioc)->ioc_hwif->ioc_sync_start(__ioc))
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/linux/drivers/net/wireless/intel/iwlwifi/fw/
H A Druntime.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
4 * Copyright (C) 2018-2025 Intel Corporation
9 #include "iwl-config.h"
10 #include "iwl-trans.h"
15 #include "iwl-nvm-util
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H A Dfile.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
3 * Copyright (C) 2008-2014, 2018-2024 Intel Corporation
4 * Copyright (C) 2013-2015 Intel Mobile Communications GmbH
5 * Copyright (C) 2016-2017 Intel Deutschland GmbH
55 IWL_UCODE_TLV_PAN = 7, /* deprecated -
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/linux/arch/mips/include/asm/octeon/
H A Dcvmx-address.h5 * This file is part of the OCTEON SDK
7 * Copyright (c) 2003-2009 Cavium Networks
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
76 /* send out a single-tick command on the NCB bus */
84 * Octeon-I HW never interprets this X (<39:36> reserved
87 * - 0x0 XXX0 0000 0000 to DRAM Cached
88 * - 0x0 XXX0 0FFF FFFF
90 * - 0x0 XXX0 1000 0000 to Boot Bus Uncached (Converted to 0x1 00X0 1000 0000
91 * - 0x0 XXX0 1FFF FFFF + EJTAG to 0x1 00X0 1FFF FFFF)
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/linux/drivers/remoteproc/
H A Dqcom_common.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Copyright (c) 2012-2013, The Linux Foundation. All rights reserved.
21 #include <linux/soc/qcom/smem.h>
39 * struct minidump_region - Minidump region
55 * struct minidump_subsystem - Subsystem's SMEM Table of content
73 * struct minidump_global_toc - Global Table of Content
99 list_for_each_entry_safe(entry, tmp, &rproc->dump_segments, node) { in qcom_minidump_cleanup()
100 list_del(&entry->node); in qcom_minidump_cleanup()
101 kfree(entry->priv); in qcom_minidump_cleanup()
117 if (WARN_ON(!list_empty(&rproc->dump_segments))) { in qcom_add_minidump_segments()
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/linux/arch/arm64/boot/dts/qcom/
H A Dsm8750.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,rpmh.h>
7 #include <dt-bindings/clock/qcom,sm8750-gcc.h>
8 #include <dt-bindings/clock/qcom,sm8750-tcsr.h>
9 #include <dt-bindings/dma/qcom-gpi.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interconnect/qcom,icc.h>
12 #include <dt-bindings/interconnect/qcom,sm8750-rpmh.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/mailbox/qcom-ipcc.h>
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H A Dsm8450.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
8 #include <dt-bindings/clock/qcom,gcc-sm8450.h>
9 #include <dt-bindings/clock/qcom,rpmh.h>
10 #include <dt-bindings/clock/qcom,sm8450-camcc.h>
11 #include <dt-bindings/clock/qcom,sm8450-dispcc.h>
12 #include <dt-bindings/clock/qcom,sm8450-gpucc.h>
13 #include <dt-bindings/clock/qcom,sm8450-videocc.h>
14 #include <dt-bindings/dma/qcom-gpi.h>
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H A Dsm8550.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
7 #include <dt-bindings/clock/qcom,rpmh.h>
8 #include <dt-bindings/clock/qcom,sm8450-videocc.h>
9 #include <dt-bindings/clock/qcom,sm8550-camcc.h>
10 #include <dt-bindings/clock/qcom,sm8550-gcc.h>
11 #include <dt-bindings/clock/qcom,sm8550-gpucc.h>
12 #include <dt-bindings/clock/qcom,sm8550-tcsr.h>
13 #include <dt-bindings/clock/qcom,sm8550-dispcc.h>
14 #include <dt-bindings/dma/qcom-gpi.h>
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H A Dsm8650.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,dsi-phy-28nm.h>
7 #include <dt-bindings/clock/qcom,rpmh.h>
8 #include <dt-bindings/clock/qcom,sm8650-camcc.h>
9 #include <dt-bindings/clock/qcom,sm8650-dispcc.h>
10 #include <dt-bindings/clock/qcom,sm8650-gcc.h>
11 #include <dt-bindings/clock/qcom,sm8650-gpucc.h>
12 #include <dt-bindings/clock/qcom,sm8650-tcsr.h>
13 #include <dt-bindings/clock/qcom,sm8650-videocc.h>
14 #include <dt-bindings/dma/qcom-gpi.h>
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/linux/drivers/gpu/drm/xe/
H A Dxe_vm_types.h1 /* SPDX-License-Identifier: MIT */
12 #include <linux/dma-resv.h>
52 * struct xe_vma_mem_attr - memory attributes associated with vma
114 * protected by BO's resv and for userptrs, vm->svm.gpusvm.notifier_lock in
115 * write mode for writing or vm->svm.gpusvm.notifier_lock in read mode and
116 * the vm->resv. For stable reading, BO's resv or userptr
117 * vm->svm.gpusvm.notifier_lock in read mode is required. Can be
127 * protected by vm->lock, vm->resv and for userptrs,
128 * vm->svm.gpusvm.notifier_lock for writing. Needs either for reading,
129 * but if reading is done under the vm->lock only, it needs to be held
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H A Dxe_pt.c1 // SPDX-License-Identifier: MIT
29 /** @children: Array of page-table child nodes */
31 /** @staging: Array of page-table staging nodes */
36 #define xe_pt_set_addr(__xe_pt, __addr) ((__xe_pt)->addr = (__addr))
37 #define xe_pt_addr(__xe_pt) ((__xe_pt)->addr)
46 #define XE_PT_HIGHEST_LEVEL (ARRAY_SIZE(xe_normal_pt_shifts) - 1)
56 return container_of(pt_dir->staging[index], struct xe_pt, base); in xe_pt_entry_staging()
63 u16 pat_index = xe->pat.idx[XE_CACHE_WB]; in __xe_pt_empty_pte()
64 u8 id = tile->id; in __xe_pt_empty_pte()
70 return vm->pt_ops->pde_encode_bo(vm->scratch_pt[id][level - 1]->bo, in __xe_pt_empty_pte()
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/linux/drivers/video/fbdev/
H A Dpm2fb.c8 * Copyright (c) 1998-2000 Ilario Nardinocchi (nardinoc@CS.UniBO.IT)
14 * I have a Creative Graphics Blaster Exxtreme card - pm2fb on x86. I
16 * hopefully other big-endian) devices now work, thanks to a lot of
71 * support on TVP4010 and similar where there is no RAMDAC - see
74 * fixed-frequency monitor which absolutely has to have -ve sync. So
76 * should be silently turned in -ve sync.
84 * The hardware state of the graphics card that isn't part of the
128 .height = -1,
129 .width = -1,
147 return fb_readl(p->v_regs + off); in pm2_RD()
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H A Dtdfxfb.c1 // SPDX-License-Identifier: GPL-2.0-only
14 * I2C part copied from the i2c-voodoo3.c driver by:
17 * Ralph Metzler <rjkm@thp.uni-koeln.de>, and
45 * - multihead support (basically need to support an array of fb_infos)
46 * - support other architectures (PPC, Alpha); does the fact that the VGA
52 * 0.1.4 (released 2002-05-28) ported over to new fbdev api by James Simmons
54 * 0.1.3 (released 1999-11-02) added Attila's panning support, code
60 * 0.1.2 (released 1999-10-19) added Attila Kesmarki's bug fixes and
62 * 0.1.1 (released 1999-10-07) added Voodoo3 support by Harold Oga.
63 * 0.1.0 (released 1999-10-06) initial version
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/linux/drivers/gpu/drm/i915/gt/
H A Dgen8_ppgtt.c1 // SPDX-License-Identifier: MIT
42 * For pre-gen12 platforms pat_index is the same as enum in gen8_pte_encode()
43 * i915_cache_level, so the switch-case here is still valid. in gen8_pte_encode()
90 struct drm_i915_private *i915 = ppgtt->vm.i915; in gen8_ppgtt_notify_vgt()
91 struct intel_uncore *uncore = ppgtt->vm.gt->uncore; in gen8_ppgtt_notify_vgt()
96 atomic_inc(px_used(ppgtt->pd)); /* never remove */ in gen8_ppgtt_notify_vgt()
98 atomic_dec(px_used(ppgtt->pd)); in gen8_ppgtt_notify_vgt()
100 mutex_lock(&i915->vgpu.lock); in gen8_ppgtt_notify_vgt()
102 if (i915_vm_is_4lvl(&ppgtt->vm)) { in gen8_ppgtt_notify_vgt()
103 const u64 daddr = px_dma(ppgtt->pd); in gen8_ppgtt_notify_vgt()
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/linux/include/uapi/drm/
H A Dxe_drm.h1 /* SPDX-License-Identifier: MIT */
17 * subject to backwards-compatibility constraints.
28 * The diagram below represents a high-level simplification of a discrete
72 * - &DRM_IOCTL_XE_DEVICE_QUERY
73 * - &DRM_IOCTL_XE_GEM_CREATE
74 * - &DRM_IOCTL_XE_GEM_MMAP_OFFSET
75 * - &DRM_IOCTL_XE_VM_CREATE
76 * - &DRM_IOCTL_XE_VM_DESTROY
77 * - &DRM_IOCTL_XE_VM_BIND
78 * - &DRM_IOCTL_XE_EXEC_QUEUE_CREATE
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