| /linux/Documentation/devicetree/bindings/watchdog/ |
| H A D | arm-smc-wdt.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/watchdog/arm-smc-wdt.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Julius Werner <jwerner@chromium.org> 13 - $ref: watchdog.yaml# 18 - arm,smc-wdt 20 arm,smc-id: 23 The ATF smc function id used by the firmware. 27 - compatible [all …]
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| /linux/drivers/watchdog/ |
| H A D | keembay_wdt.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Watchdog driver for Intel Keem Bay non-secure watchdog. 8 #include <linux/arm-smccc.h> 20 /* Non-secure watchdog register offsets */ 59 static inline u32 keembay_wdt_readl(struct keembay_wdt *wdt, u32 offset) in keembay_wdt_readl() argument 61 return readl(wdt->base + offset); in keembay_wdt_readl() 64 static inline void keembay_wdt_writel(struct keembay_wdt *wdt, u32 offset, u32 val) in keembay_wdt_writel() argument 66 writel(WDT_UNLOCK, wdt->base + TIM_SAFE); in keembay_wdt_writel() 67 writel(val, wdt->base + offset); in keembay_wdt_writel() 72 struct keembay_wdt *wdt = watchdog_get_drvdata(wdog); in keembay_wdt_set_timeout_reg() local [all …]
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| H A D | arm_smc_wdt.c | 1 // SPDX-License-Identifier: GPL-2.0-only 10 #include <linux/arm-smccc.h> 45 if (res->a0 == PSCI_RET_NOT_SUPPORTED) in smcwd_call() 46 return -ENODEV; in smcwd_call() 47 if (res->a0 == PSCI_RET_INVALID_PARAMS) in smcwd_call() 48 return -EINVAL; in smcwd_call() 49 if (res->a0 == PSCI_RET_DISABLED) in smcwd_call() 50 return -ENODATA; in smcwd_call() 51 if (res->a0 != PSCI_RET_SUCCESS) in smcwd_call() 52 return -EIO; in smcwd_call() [all …]
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| /linux/arch/arm64/boot/dts/st/ |
| H A D | stm32mp211.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2025 - All Rights Reserved 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #address-cells = <2>; 10 #size-cells = <2>; 13 #address-cells = <1>; 14 #size-cells = <0>; 17 compatible = "arm,cortex-a35"; 20 enable-method = "psci"; 24 arm-pmu { [all …]
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| /linux/arch/arm64/boot/dts/amlogic/ |
| H A D | amlogic-a4-common.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/interrupt-controller/irq.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/gpio/gpio.h> 11 compatible = "arm,armv8-timer"; 19 compatible = "arm,psci-1.0"; 20 method = "smc"; 23 xtal: xtal-clk { 24 compatible = "fixed-clock"; 25 clock-frequency = <24000000>; [all …]
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| /linux/arch/arm/boot/dts/st/ |
| H A D | stm32mp157f-dk2-scmi.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2025 - All Rights Reserved 7 #include "stm32mp15-scmi.dtsi" 10 reserved-memory { 13 no-map; 18 compatible = "arm,smc-wdt"; 19 arm,smc-id = <0xbc000000>; 26 vdd-supply = <&scmi_vdd>; 27 vdda-supply = <&scmi_vdd>; 44 VL-supply = <&scmi_v3v3>; [all …]
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| /linux/arch/arm/boot/dts/broadcom/ |
| H A D | bcm11351.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 2 // Copyright (C) 2012-2013 Broadcom Corporation 4 #include <dt-bindings/clock/bcm281xx.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/interrupt-controller/irq.h> 9 #address-cells = <1>; 10 #size-cells = <1>; 13 interrupt-parent = <&gic>; 20 #address-cells = <1>; 21 #size-cells = <0>; [all …]
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| H A D | bcm6878.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/interrupt-controller/irq.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 14 interrupt-parent = <&gic>; 17 #address-cells = <1>; 18 #size-cells = <0>; 22 compatible = "arm,cortex-a7"; 24 next-level-cache = <&L2_0>; [all …]
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| H A D | bcm6855.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/interrupt-controller/irq.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 14 interrupt-parent = <&gic>; 17 #address-cells = <1>; 18 #size-cells = <0>; 22 compatible = "arm,cortex-a7"; 24 next-level-cache = <&L2_0>; [all …]
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| H A D | bcm63178.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/interrupt-controller/irq.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 14 interrupt-parent = <&gic>; 17 #address-cells = <1>; 18 #size-cells = <0>; 22 compatible = "arm,cortex-a7"; 24 next-level-cache = <&L2_0>; [all …]
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| H A D | bcm6846.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/interrupt-controller/irq.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 14 interrupt-parent = <&gic>; 17 #address-cells = <1>; 18 #size-cells = <0>; 22 compatible = "arm,cortex-a7"; 24 next-level-cache = <&L2_0>; [all …]
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| /linux/arch/arm/boot/dts/ti/keystone/ |
| H A D | keystone.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2013-2017 Texas Instruments Incorporated - https://www.ti.com/ 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/gpio/gpio.h> 12 #address-cells = <2>; 13 #size-cells = <2>; 14 interrupt-parent = <&gic>; 30 gic: interrupt-controller@2561000 { 31 compatible = "arm,gic-400", "arm,cortex-a15-gic"; 32 #interrupt-cells = <3>; [all …]
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| /linux/arch/arm64/boot/dts/synaptics/ |
| H A D | berlin4ct.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR MIT) 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 interrupt-parent = <&gic>; 13 #address-cells = <2>; 14 #size-cells = <2>; 21 compatible = "arm,psci-1.0", "arm,psci-0.2"; 22 method = "smc"; 26 #address-cells = <1>; 27 #size-cells = <0>; 30 compatible = "arm,cortex-a53"; [all …]
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| /linux/arch/arm64/boot/dts/intel/ |
| H A D | socfpga_agilex.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 /dts-v1/; 7 #include <dt-bindings/reset/altr,rst-mgr-s10.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/agilex-clock.h> 13 compatible = "intel,socfpga-agilex"; 14 #address-cells = <2>; 15 #size-cells = <2>; 17 reserved-memory { [all …]
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| /linux/arch/arm64/boot/dts/altera/ |
| H A D | socfpga_stratix10.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 6 /dts-v1/; 7 #include <dt-bindings/reset/altr,rst-mgr-s10.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/clock/stratix10-clock.h> 12 compatible = "altr,socfpga-stratix10"; 13 #address-cells = <2>; 14 #size-cells = <2>; 16 reserved-memory { 17 #address-cells = <2>; [all …]
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| /linux/arch/arm64/boot/dts/broadcom/bcmbca/ |
| H A D | bcm6856.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/interrupt-controller/irq.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #address-cells = <2>; 12 #size-cells = <2>; 14 interrupt-parent = <&gic>; 17 #address-cells = <2>; 18 #size-cells = <0>; 21 compatible = "brcm,brahma-b53"; 24 next-level-cache = <&L2_0>; [all …]
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| H A D | bcm6858.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/interrupt-controller/irq.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #address-cells = <2>; 12 #size-cells = <2>; 14 interrupt-parent = <&gic>; 17 #address-cells = <2>; 18 #size-cells = <0>; 21 compatible = "brcm,brahma-b53"; 24 next-level-cache = <&L2_0>; [all …]
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| /linux/arch/arm64/boot/dts/amd/ |
| H A D | elba.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 * Copyright 2020-2022 Advanced Micro Devices, Inc. 6 #include <dt-bindings/gpio/gpio.h> 7 #include "dt-bindings/interrupt-controller/arm-gic.h" 11 compatible = "amd,pensando-elba"; 12 interrupt-parent = <&gic>; 13 #address-cells = <2>; 14 #size-cells = <2>; 16 dma-coherent; 19 compatible = "fixed-clock"; [all …]
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| /linux/arch/arm/boot/dts/microchip/ |
| H A D | at91sam9261.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * at91sam9261.dtsi - Device Tree Include file for AT91SAM9261 SoC 5 * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com> 8 #include <dt-bindings/pinctrl/at91.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/clock/at91.h> 12 #include <dt-bindings/mfd/at91-usart.h> 15 #address-cells = <1>; 16 #size-cells = <1>; [all …]
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| H A D | at91sam9rl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC 6 * Alexandre Belloni <alexandre.belloni@free-electrons.com> 9 #include <dt-bindings/pinctrl/at91.h> 10 #include <dt-bindings/clock/at91.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/pwm/pwm.h> 14 #include <dt-bindings/mfd/at91-usart.h> 17 #address-cells = <1>; [all …]
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| H A D | at91sam9260.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC 7 * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> 10 #include <dt-bindings/pinctrl/at91.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/clock/at91.h> 14 #include <dt-bindings/mfd/at91-usart.h> 17 #address-cells = <1>; 18 #size-cells = <1>; [all …]
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| H A D | at91sam9n12.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC 9 #include <dt-bindings/dma/at91.h> 10 #include <dt-bindings/pinctrl/at91.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/clock/at91.h> 14 #include <dt-bindings/mfd/at91-usart.h> 17 #address-cells = <1>; 18 #size-cells = <1>; [all …]
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| H A D | at91sam9263.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC 5 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> 8 #include <dt-bindings/pinctrl/at91.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/clock/at91.h> 12 #include <dt-bindings/mfd/at91-usart.h> 15 #address-cells = <1>; 16 #size-cells = <1>; [all …]
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| H A D | at91sam9x5.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC 11 #include <dt-bindings/dma/at91.h> 12 #include <dt-bindings/pinctrl/at91.h> 13 #include <dt-bindings/interrupt-controller/irq.h> 14 #include <dt-bindings/gpio/gpio.h> 15 #include <dt-bindings/clock/at91.h> 16 #include <dt-bindings/mfd/at91-usart.h> 19 #address-cells = <1>; 20 #size-cells = <1>; [all …]
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| /linux/arch/arm64/boot/dts/freescale/ |
| H A D | imx8ulp.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8ulp-clock.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/power/imx8ulp-power.h> 10 #include <dt-bindings/thermal/thermal.h> 12 #include "imx8ulp-pinfunc.h" 15 interrupt-parent = <&gic>; 16 #address-cells = <2>; 17 #size-cells = <2>; [all …]
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