| /linux/drivers/gpio/ |
| H A D | gpio-macsmc.c | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 3 * Apple SMC GPIO driver 6 * This driver implements basic SMC PMU GPIO support that can read inputs 12 #include <linux/gpio/driver.h> 19 * Commands 0-6 are, presumably, the intended API. 73 struct apple_smc *smc; member 85 return -1; in macsmc_gpio_nr() 97 struct apple_smc *smc = smcgp->smc; in macsmc_gpio_find_first_gpio_index() local 103 ret = apple_smc_get_key_by_index(smc, 0, &first_key); in macsmc_gpio_find_first_gpio_index() 107 return -ENODEV; in macsmc_gpio_find_first_gpio_index() [all …]
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| /linux/drivers/mtd/nand/raw/atmel/ |
| H A D | nand-controller.c | 1 // SPDX-License-Identifier: GPL-2.0 6 * Author: Boris Brezillon <boris.brezillon@free-electrons.com> 23 * Derived from Das U-Boot source code 24 * (u-boot-1.1.5/board/atmel/at91sam9263ek/nand.c) 38 * - atmel_nand_: all generic structures/functions 39 * - atmel_smc_nand_: all structures/functions specific to the SMC interface 41 * - atmel_hsmc_nand_: all structures/functions specific to the HSMC interface 43 * - atmel_nfc_: all structures/functions used to manipulate the NFC sub-block 45 * - <soc>_nand_: all SoC specific structures/functions 49 #include <linux/dma-mapping.h> [all …]
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| /linux/Documentation/devicetree/bindings/gpio/ |
| H A D | apple,smc-gpio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/gpio/apple,smc-gpio.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Apple Mac System Management Controller GPIO 10 - Sven Peter <sven@kernel.org> 13 Apple Mac System Management Controller GPIO block. 17 const: apple,smc-gpio 19 gpio-controller: true 21 '#gpio-cells': [all …]
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| /linux/Documentation/devicetree/bindings/firmware/xilinx/ |
| H A D | xlnx,zynqmp-firmware.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/firmware/xilinx/xlnx,zynqmp-firmware.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Nava kishore Manne <nava.kishore.manne@amd.com> 12 description: The zynqmp-firmware node describes the interface to platform 23 - description: For implementations complying for Zynq Ultrascale+ MPSoC. 24 const: xlnx,zynqmp-firmware 26 - description: For implementations complying for Versal. 27 const: xlnx,versal-firmware [all …]
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| /linux/arch/arm/boot/dts/broadcom/ |
| H A D | bcm21664.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 4 #include "bcm2166x-common.dtsi" 7 interrupt-parent = <&gic>; 10 #address-cells = <1>; 11 #size-cells = <0>; 15 compatible = "arm,cortex-a9"; 21 compatible = "arm,cortex-a9"; 22 enable-method = "brcm,bcm11351-cpu-method"; 23 secondary-boot-reg = <0x35004178>; 30 gic: interrupt-controller@1c01000 { [all …]
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| H A D | bcm23550.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 8 #include "bcm2166x-common.dtsi" 11 interrupt-parent = <&gic>; 14 #address-cells = <1>; 15 #size-cells = <0>; 19 compatible = "arm,cortex-a7"; 21 clock-frequency = <1000000000>; 26 compatible = "arm,cortex-a7"; 27 enable-method = "brcm,bcm23550"; 28 secondary-boot-reg = <0x35004178>; [all …]
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| H A D | bcm11351.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 2 // Copyright (C) 2012-2013 Broadcom Corporation 4 #include <dt-bindings/clock/bcm281xx.h> 5 #include <dt-bindings/interrupt-controller/arm-gic.h> 6 #include <dt-bindings/interrupt-controller/irq.h> 9 #address-cells = <1>; 10 #size-cells = <1>; 13 interrupt-parent = <&gic>; 20 #address-cells = <1>; 21 #size-cells = <0>; [all …]
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| H A D | bcm2166x-common.dtsi | 1 // SPDX-License-Identifier: BSD-3-Clause 9 /dts-v1/; 11 #include <dt-bindings/clock/bcm21664.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/interrupt-controller/irq.h> 16 #address-cells = <1>; 17 #size-cells = <1>; 20 hub: hub-bus@34000000 { 21 compatible = "simple-bus"; 23 #address-cells = <1>; [all …]
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| /linux/arch/arm/boot/dts/microchip/ |
| H A D | sama5d3xcm.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * sama5d3xcm.dtsi - Device Tree Include file for SAMA5D3x CPU Module 14 stdout-path = "serial0:115200n8"; 23 clock-frequency = <32768>; 27 clock-frequency = <12000000>; 34 cs-gpios = <&pioD 13 0>, <0>, <0>, <0>; 39 compatible = "atmel,tcb-timer"; 44 compatible = "atmel,tcb-timer"; 51 pinctrl-0 = <&pinctrl_ebi_addr &pinctrl_ebi_cs0>; 52 pinctr-name = "default"; [all …]
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| H A D | at91sam9261.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * at91sam9261.dtsi - Device Tree Include file for AT91SAM9261 SoC 5 * Copyright (C) 2013 Jean-Jacques Hiblot <jjhiblot@traphandler.com> 8 #include <dt-bindings/pinctrl/at91.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/clock/at91.h> 12 #include <dt-bindings/mfd/at91-usart.h> 15 #address-cells = <1>; 16 #size-cells = <1>; [all …]
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| H A D | at91sam9263.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * at91sam9263.dtsi - Device Tree Include file for AT91SAM9263 family SoC 5 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> 8 #include <dt-bindings/pinctrl/at91.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/clock/at91.h> 12 #include <dt-bindings/mfd/at91-usart.h> 15 #address-cells = <1>; 16 #size-cells = <1>; [all …]
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| H A D | at91sam9rl.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * at91sam9rl.dtsi - Device Tree Include file for AT91SAM9RL family SoC 6 * Alexandre Belloni <alexandre.belloni@free-electrons.com> 9 #include <dt-bindings/pinctrl/at91.h> 10 #include <dt-bindings/clock/at91.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/pwm/pwm.h> 14 #include <dt-bindings/mfd/at91-usart.h> 17 #address-cells = <1>; [all …]
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| H A D | at91sam9n12.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC 9 #include <dt-bindings/dma/at91.h> 10 #include <dt-bindings/pinctrl/at91.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/clock/at91.h> 14 #include <dt-bindings/mfd/at91-usart.h> 17 #address-cells = <1>; 18 #size-cells = <1>; [all …]
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| H A D | at91sam9260.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * at91sam9260.dtsi - Device Tree Include file for AT91SAM9260 family SoC 7 * 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> 10 #include <dt-bindings/pinctrl/at91.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/gpio/gpio.h> 13 #include <dt-bindings/clock/at91.h> 14 #include <dt-bindings/mfd/at91-usart.h> 17 #address-cells = <1>; 18 #size-cells = <1>; [all …]
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| H A D | at91sam9x5.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC 11 #include <dt-bindings/dma/at91.h> 12 #include <dt-bindings/pinctrl/at91.h> 13 #include <dt-bindings/interrupt-controller/irq.h> 14 #include <dt-bindings/gpio/gpio.h> 15 #include <dt-bindings/clock/at91.h> 16 #include <dt-bindings/mfd/at91-usart.h> 19 #address-cells = <1>; 20 #size-cells = <1>; [all …]
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| H A D | at91sam9g45.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later 3 * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC 11 #include <dt-bindings/dma/at91.h> 12 #include <dt-bindings/pinctrl/at91.h> 13 #include <dt-bindings/interrupt-controller/irq.h> 14 #include <dt-bindings/gpio/gpio.h> 15 #include <dt-bindings/clock/at91.h> 16 #include <dt-bindings/mfd/at91-usart.h> 19 #address-cells = <1>; 20 #size-cells = <1>; [all …]
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| /linux/arch/arm64/boot/dts/blaize/ |
| H A D | blaize-blzp1600.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 interrupt-parent = <&gic>; 13 #address-cells = <2>; 14 #size-cells = <2>; 17 #address-cells = <2>; 18 #size-cells = <0>; 21 compatible = "arm,cortex-a53"; [all …]
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| /linux/Documentation/devicetree/bindings/soc/fsl/cpm_qe/ |
| H A D | serial.txt | 4 - fsl,cpm1-smc-uart 5 - fsl,cpm2-smc-uart 6 - fsl,cpm1-scc-uart 7 - fsl,cpm2-scc-uart 8 - fsl,qe-uart 10 Modem control lines connected to GPIO controllers are listed in the gpios 11 property as described in booting-without-of.txt, section IX.1 in the following 23 compatible = "fsl,mpc8272-scc-uart", 24 "fsl,cpm2-scc-uart"; 27 interrupt-parent = <&PIC>; [all …]
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| /linux/Documentation/devicetree/bindings/reset/ |
| H A D | zynq-reset.txt | 3 The Zynq AP-SoC has several different resets. 8 - compatible: "xlnx,zynq-reset" 9 - reg: SLCR offset and size taken via syscon <0x200 0x48> 10 - syscon: <&slcr> 12 - #reset-cells: Must be 1 18 compatible = "xlnx,zynq-reset"; 20 #reset-cells = <1>; 55 352: gpio reset 58 416: smc reset 59 417: smc ref reset
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| /linux/arch/arm64/boot/dts/ti/ |
| H A D | k3-am65.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2016-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/soc/ti,sci_pm_domain.h> 13 #include "k3-pinctrl.h" 18 interrupt-parent = <&gic500>; 19 #address-cells = <2>; 20 #size-cells = <2>; [all …]
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| H A D | k3-am64.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/soc/ti,sci_pm_domain.h> 13 #include "k3-pinctrl.h" 18 interrupt-parent = <&gic500>; 19 #address-cells = <2>; 20 #size-cells = <2>; [all …]
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| H A D | k3-am62p.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2023-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/soc/ti,sci_pm_domain.h> 13 #include "k3-pinctrl.h" 18 interrupt-parent = <&gic500>; 19 #address-cells = <2>; 20 #size-cells = <2>; [all …]
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| H A D | k3-am62.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2020-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/soc/ti,sci_pm_domain.h> 13 #include "k3-pinctrl.h" 18 interrupt-parent = <&gic500>; 19 #address-cells = <2>; 20 #size-cells = <2>; [all …]
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| H A D | k3-am62a.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR MIT 5 * Copyright (C) 2022-2024 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/irq.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/soc/ti,sci_pm_domain.h> 13 #include "k3-pinctrl.h" 18 interrupt-parent = <&gic500>; 19 #address-cells = <2>; 20 #size-cells = <2>; [all …]
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| /linux/arch/powerpc/boot/dts/ |
| H A D | mgcoge.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later 9 /dts-v1/; 13 #address-cells = <1>; 14 #size-cells = <1>; 22 #address-cells = <1>; 23 #size-cells = <0>; 28 d-cache-line-size = <32>; 29 i-cache-line-size = <32>; 30 d-cache-size = <16384>; 31 i-cache-size = <16384>; [all …]
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