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/linux/Documentation/devicetree/bindings/interconnect/
H A Dqcom,sm8650-rpmh.yaml4 $id: http://devicetree.org/schemas/interconnect/qcom,sm8650-rpmh.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect on SM8650
21 See also: include/dt-bindings/interconnect/qcom,sm8650-rpmh.h
26 - qcom,sm8650-aggre1-noc
27 - qcom,sm8650-aggre2-noc
28 - qcom,sm8650-clk-virt
29 - qcom,sm8650-cnoc-main
30 - qcom,sm8650-config-noc
31 - qcom,sm8650-gem-noc
32 - qcom,sm8650-lpass-ag-noc
[all …]
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dqcom,sm8650-tlmm.yaml4 $id: http://devicetree.org/schemas/pinctrl/qcom,sm8650-tlmm.yaml#
7 title: Qualcomm Technologies, Inc. SM8650 TLMM block
13 Top Level Mode Multiplexer pin controller in Qualcomm SM8650 SoC.
20 const: qcom,sm8650-tlmm
38 - $ref: "#/$defs/qcom-sm8650-tlmm-state"
41 $ref: "#/$defs/qcom-sm8650-tlmm-state"
45 qcom-sm8650-tlmm-state:
113 compatible = "qcom,sm8650-tlmm";
/linux/Documentation/devicetree/bindings/ufs/
H A Dqcom,sm8650-ufshc.yaml4 $id: http://devicetree.org/schemas/ufs/qcom,sm8650-ufshc.yaml#
7 title: Qualcomm SM8650 and Other SoCs UFS Controllers
19 - qcom,sm8650-ufshc
29 - qcom,sm8650-ufshc
74 #include <dt-bindings/clock/qcom,sm8650-gcc.h>
75 #include <dt-bindings/clock/qcom,sm8650-tcsr.h>
79 #include <dt-bindings/interconnect/qcom,sm8650-rpmh.h>
87 compatible = "qcom,sm8650-ufshc", "qcom,ufshc", "jedec,ufs-2.0";
/linux/Documentation/devicetree/bindings/phy/
H A Dqcom,sc8280xp-qmp-pcie-phy.yaml46 - qcom,sm8650-qmp-gen3x2-pcie-phy
47 - qcom,sm8650-qmp-gen4x2-pcie-phy
169 - qcom,sm8650-qmp-gen3x2-pcie-phy
170 - qcom,sm8650-qmp-gen4x2-pcie-phy
213 - qcom,sm8650-qmp-gen4x2-pcie-phy
239 - qcom,sm8650-qmp-gen4x2-pcie-phy
H A Dqcom,snps-eusb2-phy.yaml23 - qcom,sm8650-snps-eusb2-phy
/linux/arch/arm64/boot/dts/qcom/
H A Dsm8650.dtsi8 #include <dt-bindings/clock/qcom,sm8650-camcc.h>
9 #include <dt-bindings/clock/qcom,sm8650-dispcc.h>
10 #include <dt-bindings/clock/qcom,sm8650-gcc.h>
11 #include <dt-bindings/clock/qcom,sm8650-gpucc.h>
12 #include <dt-bindings/clock/qcom,sm8650-tcsr.h>
13 #include <dt-bindings/clock/qcom,sm8650-videocc.h>
18 #include <dt-bindings/interconnect/qcom,sm8650-rpmh.h>
25 #include <dt-bindings/reset/qcom,sm8650-gpucc.h>
644 compatible = "qcom,scm-sm8650", "qcom,scm";
652 compatible = "qcom,sm8650
[all...]
/linux/drivers/interconnect/qcom/
H A Dsm8650.c13 #include <dt-bindings/interconnect/qcom,sm8650-rpmh.h>
1916 { .compatible = "qcom,sm8650-aggre1-noc", .data = &sm8650_aggre1_noc },
1917 { .compatible = "qcom,sm8650-aggre2-noc", .data = &sm8650_aggre2_noc },
1918 { .compatible = "qcom,sm8650-clk-virt", .data = &sm8650_clk_virt },
1919 { .compatible = "qcom,sm8650-config-noc", .data = &sm8650_config_noc },
1920 { .compatible = "qcom,sm8650-cnoc-main", .data = &sm8650_cnoc_main },
1921 { .compatible = "qcom,sm8650-gem-noc", .data = &sm8650_gem_noc },
1922 { .compatible = "qcom,sm8650-lpass-ag-noc", .data = &sm8650_lpass_ag_noc },
1923 { .compatible = "qcom,sm8650-lpass-lpiaon-noc", .data = &sm8650_lpass_lpiaon_noc },
1924 { .compatible = "qcom,sm8650-lpass-lpicx-noc", .data = &sm8650_lpass_lpicx_noc },
[all …]
H A DMakefile45 qnoc-sm8650-objs := sm8650.o
89 obj-$(CONFIG_INTERCONNECT_QCOM_SM8650) += qnoc-sm8650.o
H A DKconfig359 tristate "Qualcomm SM8650 interconnect driver"
364 This is a driver for the Qualcomm Network-on-Chip on SM8650-based
/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,sm8550-tcsr.yaml21 - include/dt-bindings/clock/qcom,sm8650-tcsr.h
34 - qcom,sm8650-tcsr
H A Dqcom,rpmhcc.yaml44 - qcom,sm8650-rpmh-clk
/linux/drivers/clk/qcom/
H A Dgpucc-sm8650.c13 #include <dt-bindings/clock/qcom,sm8650-gpucc.h>
14 #include <dt-bindings/reset/qcom,sm8650-gpucc.h>
634 { .compatible = "qcom,sm8650-gpucc" },
656 .name = "sm8650-gpucc",
662 MODULE_DESCRIPTION("QTI GPU_CC SM8650 Driver");
/linux/drivers/pinctrl/qcom/
H A Dpinctrl-sm8650-lpass-lpi.c213 .compatible = "qcom,sm8650-lpass-lpi-pinctrl",
222 .name = "qcom-sm8650-lpass-lpi-pinctrl",
230 MODULE_DESCRIPTION("Qualcomm SM8650 LPI GPIO pin control driver");
H A DKconfig159 tristate "Qualcomm Technologies Inc SM8650 LPASS LPI pin controller driver"
165 (Low Power Island) found on the Qualcomm Technologies Inc SM8650
H A DMakefile76 obj-$(CONFIG_PINCTRL_SM8650) += pinctrl-sm8650.o
77 obj-$(CONFIG_PINCTRL_SM8650_LPASS_LPI) += pinctrl-sm8650-lpass-lpi.o
H A DKconfig.msm469 tristate "Qualcomm Technologies Inc SM8650 pin controller driver"
474 Technologies Inc SM8650 platform.
/linux/Documentation/devicetree/bindings/display/msm/
H A Ddp-controller.yaml32 - qcom,sm8650-dp
72 - const: qcom,sm8650-dp
280 - qcom,sm8650-dp
/linux/Documentation/devicetree/bindings/firmware/
H A Dqcom,scm.yaml78 - qcom,scm-sm8650
215 - qcom,scm-sm8650
/linux/sound/soc/qcom/
H A Dsc8280xp.c177 {.compatible = "qcom,sm8650-sndcard", "sm8650"},
/linux/Documentation/devicetree/bindings/usb/
H A Dqcom,dwc3.yaml68 - qcom,sm8650-dwc3
368 - qcom,sm8650-dwc3
512 - qcom,sm8650-dwc3
H A Dqcom,snps-dwc3.yaml73 - qcom,sm8650-dwc3
369 - qcom,sm8650-dwc3
566 - qcom,sm8650-dwc3
/linux/include/dt-bindings/clock/
H A Dqcom,sm8650-videocc.h11 /* SM8650 introduces below new clocks and resets compared to SM8450 */
/linux/Documentation/devicetree/bindings/i2c/
H A Dqcom,i2c-cci.yaml43 - qcom,sm8650-cci
258 - qcom,sm8650-cci
/linux/Documentation/devicetree/bindings/iommu/
H A Darm,smmu.yaml67 - qcom,sm8650-smmu-500
115 - qcom,sm8650-smmu-500
544 - qcom,sm8650-smmu-500
/linux/Documentation/devicetree/bindings/soc/qcom/
H A Dqcom,aoss-qmp.yaml50 - qcom,sm8650-aoss-qmp

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