Home
last modified time | relevance | path

Searched full:slot2 (Results 1 – 25 of 28) sorted by relevance

12

/linux/arch/arm/boot/dts/aspeed/
H A Daspeed-bmc-facebook-greatlakes.dts248 "power-bmc-slot1","power-bmc-slot2",
254 /*F0-F7*/ "slot1-bmc-reset-button","slot2-bmc-reset-button",
259 "presence-mb-slot1","presence-mb-slot2",
269 "reset-cause-pcie-slot1","reset-cause-pcie-slot2",
276 /*V0-V7*/ "bmc-slot1-ac-button","bmc-slot2-ac-button",
/linux/arch/sh/drivers/pci/
H A Dfixups-landisk.c26 * slot2: pin1-4 = irq7,8,5,6 in pcibios_map_platform_irq()
/linux/arch/arm64/boot/dts/freescale/
H A Dfsl-ls1046a-qds.dts21 emi1-slot2 = &ls1046mdio_s2;
220 "SLOT1", "SLOT2", "SLOT3", "SLOT4", "SLOT5", "SLOT6",
H A Dfsl-ls1043a-qds.dts40 emi1-slot2 = &ls1043mdio_s2;
/linux/arch/sh/boards/mach-se/7780/
H A Dirq.c52 * CPU || SLOT1 | SLOT2 | S-ATA | USB in init_se7780_IRQ()
/linux/drivers/pcmcia/
H A Dti113x.h654 struct yenta_socket *slot2; in ti12xx_2nd_slot_empty() local
721 slot2 = pci_get_drvdata(func); in ti12xx_2nd_slot_empty()
722 if (!slot2) in ti12xx_2nd_slot_empty()
726 yenta_get_status(&slot2->socket, &state); in ti12xx_2nd_slot_empty()
/linux/arch/powerpc/boot/dts/fsl/
H A Db4860qds.dts96 phy_xaui_slot2: xaui-phy@slot2 {
H A Dt104xd4rdb.dtsi142 * slot2, the HDMI connector, and the PEX
H A Dp5040ds.dts426 hydra_xg_slot2: hydra-xg-slot2@2 {
/linux/sound/soc/codecs/
H A Drt5677.c2451 "Slot0", "Slot1", "Slot2", "Slot3", "Slot4", "Slot5", "Slot6", "Slot7"
3878 { "IF1 DAC0 Mux", "Slot2", "IF1 DAC2" },
3887 { "IF1 DAC1 Mux", "Slot2", "IF1 DAC2" },
3896 { "IF1 DAC2 Mux", "Slot2", "IF1 DAC2" },
3905 { "IF1 DAC3 Mux", "Slot2", "IF1 DAC2" },
3914 { "IF1 DAC4 Mux", "Slot2", "IF1 DAC2" },
3923 { "IF1 DAC5 Mux", "Slot2", "IF1 DAC2" },
3932 { "IF1 DAC6 Mux", "Slot2", "IF1 DAC2" },
3941 { "IF1 DAC7 Mux", "Slot2", "IF1 DAC2" },
3976 { "IF2 DAC0 Mux", "Slot2", "IF
[all...]
H A Drt5645.c1520 "Slot0", "Slot1", "Slot2", "Slot3"
2664 { "RT5650 IF1 DAC1 L Mux", "Slot2", "IF1 DAC2" },
2669 { "RT5650 IF1 DAC1 R Mux", "Slot2", "IF1 DAC2" },
2674 { "RT5650 IF1 DAC2 L Mux", "Slot2", "IF1 DAC2" },
2679 { "RT5650 IF1 DAC2 R Mux", "Slot2", "IF1 DAC2" },
2722 { "RT5645 IF1 DAC1 L Mux", "Slot2", "IF1 DAC2" },
2727 { "RT5645 IF1 DAC1 R Mux", "Slot2", "IF1 DAC2" },
2732 { "RT5645 IF1 DAC2 L Mux", "Slot2", "IF1 DAC2" },
2737 { "RT5645 IF1 DAC2 R Mux", "Slot2", "IF1 DAC2" },
H A Dsma1303.c296 "Slot0", "Slot1", "Slot2", "Slot3",
H A Dsma1307.c272 "Slot0", "Slot1", "Slot2", "Slot3",
H A Dab8500-codec.c1413 "SLOT2",
/linux/Documentation/arch/x86/i386/
H A DIO-APIC.rst87 Slot2, then you'll have to specify this pirq= line::
/linux/tools/perf/pmu-events/arch/x86/sierraforest/
H A Duncore-interconnect.json1201 "EventName": "UNC_UPI_RxL_FLITS.SLOT2",
1231 "EventName": "UNC_UPI_RxL_INSERTS.SLOT2",
1261 "EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT2",
1566 "EventName": "UNC_UPI_TxL_FLITS.SLOT2",
/linux/tools/perf/pmu-events/arch/x86/graniterapids/
H A Duncore-interconnect.json1555 "EventName": "UNC_UPI_RxL_FLITS.SLOT2",
1585 "EventName": "UNC_UPI_RxL_INSERTS.SLOT2",
1615 "EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT2",
1920 "EventName": "UNC_UPI_TxL_FLITS.SLOT2",
/linux/tools/perf/pmu-events/arch/x86/sapphirerapids/
H A Duncore-interconnect.json6497 "BriefDescription": "UNC_UPI_RxL_ANY_FLITS.SLOT2",
6500 "EventName": "UNC_UPI_RxL_ANY_FLITS.SLOT2",
6576 "EventName": "UNC_UPI_RxL_BYPASSED.SLOT2",
6756 "EventName": "UNC_UPI_RxL_FLITS.SLOT2",
6789 "EventName": "UNC_UPI_RxL_INSERTS.SLOT2",
6822 "EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT2",
7078 "BriefDescription": "UNC_UPI_TxL_ANY_FLITS.SLOT2",
7081 "EventName": "UNC_UPI_TxL_ANY_FLITS.SLOT2",
7295 "EventName": "UNC_UPI_TxL_FLITS.SLOT2",
/linux/tools/perf/pmu-events/arch/x86/emeraldrapids/
H A Duncore-interconnect.json6497 "BriefDescription": "UNC_UPI_RxL_ANY_FLITS.SLOT2",
6500 "EventName": "UNC_UPI_RxL_ANY_FLITS.SLOT2",
6576 "EventName": "UNC_UPI_RxL_BYPASSED.SLOT2",
6756 "EventName": "UNC_UPI_RxL_FLITS.SLOT2",
6789 "EventName": "UNC_UPI_RxL_INSERTS.SLOT2",
6822 "EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT2",
7078 "BriefDescription": "UNC_UPI_TxL_ANY_FLITS.SLOT2",
7081 "EventName": "UNC_UPI_TxL_ANY_FLITS.SLOT2",
7295 "EventName": "UNC_UPI_TxL_FLITS.SLOT2",
/linux/drivers/net/can/
H A Dgrcan.c44 #define GRCAN_RESERVE_SIZE(slot1, slot2) (((slot2) - (slot1)) / 4 - 1) argument
/linux/net/ipv4/
H A Dudp.c292 unsigned int slot2 = udp_sk(sk)->udp_portaddr_hash ^ snum; in udp_lib_get_port() local
294 slot2 &= udptable->mask; in udp_lib_get_port()
297 hslot2 = udp_hashslot2(udptable, slot2); in udp_lib_get_port()
302 if (!exist && (hash2_nulladdr != slot2)) { in udp_lib_get_port()
/linux/drivers/scsi/mvsas/
H A Dmv_sas.c1651 struct mvs_slot_info *slot, *slot2; in mvs_do_release_task() local
1662 list_for_each_entry_safe(slot, slot2, &port->list, entry) { in mvs_do_release_task()
/linux/tools/testing/selftests/hid/tests/
H A Dtest_multitouch.py711 slot2 = self.get_slot(uhdev, t2, 2)
719 assert evdev.slots[slot2][libevdev.EV_ABS.ABS_MT_TRACKING_ID] == 2
720 assert evdev.slots[slot2][libevdev.EV_ABS.ABS_MT_POSITION_X] == 250
721 assert evdev.slots[slot2][libevdev.EV_ABS.ABS_MT_POSITION_Y] == 300
736 assert evdev.slots[slot2][libevdev.EV_ABS.ABS_MT_TRACKING_ID] == -1
/linux/tools/perf/pmu-events/arch/x86/cascadelakex/
H A Duncore-interconnect.json12754 "EventName": "UNC_UPI_RxL_BYPASSED.SLOT2",
12756 "PublicDescription": "Counts incoming FLITs (FLow control unITs) which bypassed the slot2 RxQ buffer (Receive Queue) and passed directly to the Egress. This is a latency optimization, and should generally be the common case. If this value is less than the number of FLITs transferred, it implies that there was queueing getting onto the ring, and thus the transactions saw higher latency.",
12922 "EventName": "UNC_UPI_RxL_FLITS.SLOT2",
13021 "EventName": "UNC_UPI_RxL_INSERTS.SLOT2",
13054 "EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT2",
13551 "EventName": "UNC_UPI_TxL_FLITS.SLOT2",
/linux/tools/perf/pmu-events/arch/x86/skylakex/
H A Duncore-interconnect.json12633 "EventName": "UNC_UPI_RxL_BYPASSED.SLOT2",
12635 "PublicDescription": "Counts incoming FLITs (FLow control unITs) which bypassed the slot2 RxQ buffer (Receive Queue) and passed directly to the Egress. This is a latency optimization, and should generally be the common case. If this value is less than the number of FLITs transferred, it implies that there was queueing getting onto the ring, and thus the transactions saw higher latency.",
12821 "EventName": "UNC_UPI_RxL_FLITS.SLOT2",
12920 "EventName": "UNC_UPI_RxL_INSERTS.SLOT2",
12953 "EventName": "UNC_UPI_RxL_OCCUPANCY.SLOT2",
13450 "EventName": "UNC_UPI_TxL_FLITS.SLOT2",

12