1dc37374bSHongtao Jia/* 2dc37374bSHongtao Jia * T1040D4RDB/T1042D4RDB Device Tree Source 3dc37374bSHongtao Jia * 4dc37374bSHongtao Jia * Copyright 2015 Freescale Semiconductor Inc. 5dc37374bSHongtao Jia * 6dc37374bSHongtao Jia * Redistribution and use in source and binary forms, with or without 7dc37374bSHongtao Jia * modification, are permitted provided that the following conditions are met: 8dc37374bSHongtao Jia * * Redistributions of source code must retain the above copyright 9dc37374bSHongtao Jia * notice, this list of conditions and the following disclaimer. 10dc37374bSHongtao Jia * * Redistributions in binary form must reproduce the above copyright 11dc37374bSHongtao Jia * notice, this list of conditions and the following disclaimer in the 12dc37374bSHongtao Jia * documentation and/or other materials provided with the distribution. 13dc37374bSHongtao Jia * * Neither the name of Freescale Semiconductor nor the 14dc37374bSHongtao Jia * names of its contributors may be used to endorse or promote products 15dc37374bSHongtao Jia * derived from this software without specific prior written permission. 16dc37374bSHongtao Jia * 17dc37374bSHongtao Jia * 18dc37374bSHongtao Jia * ALTERNATIVELY, this software may be distributed under the terms of the 19dc37374bSHongtao Jia * GNU General Public License ("GPL") as published by the Free Software 20dc37374bSHongtao Jia * Foundation, either version 2 of that License or (at your option) any 21dc37374bSHongtao Jia * later version. 22dc37374bSHongtao Jia * 23dc37374bSHongtao Jia * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY 24dc37374bSHongtao Jia * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 25dc37374bSHongtao Jia * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 26dc37374bSHongtao Jia * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY 27dc37374bSHongtao Jia * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 28dc37374bSHongtao Jia * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 29dc37374bSHongtao Jia * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 30dc37374bSHongtao Jia * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 31dc37374bSHongtao Jia * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 32dc37374bSHongtao Jia * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33dc37374bSHongtao Jia */ 34dc37374bSHongtao Jia 35dc37374bSHongtao Jia/ { 36dc37374bSHongtao Jia reserved-memory { 37dc37374bSHongtao Jia #address-cells = <2>; 38dc37374bSHongtao Jia #size-cells = <2>; 39dc37374bSHongtao Jia ranges; 40dc37374bSHongtao Jia 41dc37374bSHongtao Jia bman_fbpr: bman-fbpr { 42dc37374bSHongtao Jia size = <0 0x1000000>; 43dc37374bSHongtao Jia alignment = <0 0x1000000>; 44dc37374bSHongtao Jia }; 45dc37374bSHongtao Jia qman_fqd: qman-fqd { 46dc37374bSHongtao Jia size = <0 0x400000>; 47dc37374bSHongtao Jia alignment = <0 0x400000>; 48dc37374bSHongtao Jia }; 49dc37374bSHongtao Jia qman_pfdr: qman-pfdr { 50dc37374bSHongtao Jia size = <0 0x2000000>; 51dc37374bSHongtao Jia alignment = <0 0x2000000>; 52dc37374bSHongtao Jia }; 53dc37374bSHongtao Jia }; 54dc37374bSHongtao Jia 55dc37374bSHongtao Jia ifc: localbus@ffe124000 { 56dc37374bSHongtao Jia reg = <0xf 0xfe124000 0 0x2000>; 57dc37374bSHongtao Jia ranges = <0 0 0xf 0xe8000000 0x08000000 58dc37374bSHongtao Jia 2 0 0xf 0xff800000 0x00010000 59dc37374bSHongtao Jia 3 0 0xf 0xffdf0000 0x00008000>; 60dc37374bSHongtao Jia 61dc37374bSHongtao Jia nor@0,0 { 62dc37374bSHongtao Jia #address-cells = <1>; 63dc37374bSHongtao Jia #size-cells = <1>; 64dc37374bSHongtao Jia compatible = "cfi-flash"; 65dc37374bSHongtao Jia reg = <0x0 0x0 0x8000000>; 66dc37374bSHongtao Jia bank-width = <2>; 67dc37374bSHongtao Jia device-width = <1>; 68dc37374bSHongtao Jia }; 69dc37374bSHongtao Jia 70dc37374bSHongtao Jia nand@2,0 { 71dc37374bSHongtao Jia #address-cells = <1>; 72dc37374bSHongtao Jia #size-cells = <1>; 73dc37374bSHongtao Jia compatible = "fsl,ifc-nand"; 74dc37374bSHongtao Jia reg = <0x2 0x0 0x10000>; 75dc37374bSHongtao Jia }; 76dc37374bSHongtao Jia 77dc37374bSHongtao Jia cpld@3,0 { 78dc37374bSHongtao Jia compatible = "fsl,t1040d4rdb-cpld"; 79dc37374bSHongtao Jia reg = <3 0 0x300>; 80dc37374bSHongtao Jia }; 81dc37374bSHongtao Jia }; 82dc37374bSHongtao Jia 83dc37374bSHongtao Jia memory { 84dc37374bSHongtao Jia device_type = "memory"; 85dc37374bSHongtao Jia }; 86dc37374bSHongtao Jia 87dc37374bSHongtao Jia dcsr: dcsr@f00000000 { 88dc37374bSHongtao Jia ranges = <0x00000000 0xf 0x00000000 0x01072000>; 89dc37374bSHongtao Jia }; 90dc37374bSHongtao Jia 91dc37374bSHongtao Jia bportals: bman-portals@ff4000000 { 92dc37374bSHongtao Jia ranges = <0x0 0xf 0xf4000000 0x2000000>; 93dc37374bSHongtao Jia }; 94dc37374bSHongtao Jia 95dc37374bSHongtao Jia qportals: qman-portals@ff6000000 { 96dc37374bSHongtao Jia ranges = <0x0 0xf 0xf6000000 0x2000000>; 97dc37374bSHongtao Jia }; 98dc37374bSHongtao Jia 99dc37374bSHongtao Jia soc: soc@ffe000000 { 100dc37374bSHongtao Jia ranges = <0x00000000 0xf 0xfe000000 0x1000000>; 101dc37374bSHongtao Jia reg = <0xf 0xfe000000 0 0x00001000>; 102dc37374bSHongtao Jia 103dc37374bSHongtao Jia spi@110000 { 104dc37374bSHongtao Jia flash@0 { 105dc37374bSHongtao Jia #address-cells = <1>; 106dc37374bSHongtao Jia #size-cells = <1>; 107fba4e9f9SHou Zhiqiang compatible = "micron,n25q512ax3", "jedec,spi-nor"; 108dc37374bSHongtao Jia reg = <0>; 109dc37374bSHongtao Jia /* input clock */ 110dc37374bSHongtao Jia spi-max-frequency = <10000000>; 111dc37374bSHongtao Jia }; 112dc37374bSHongtao Jia slic@1 { 113dc37374bSHongtao Jia compatible = "maxim,ds26522"; 114dc37374bSHongtao Jia reg = <1>; 115dc37374bSHongtao Jia spi-max-frequency = <2000000>; /* input clock */ 116dc37374bSHongtao Jia }; 117dc37374bSHongtao Jia slic@2 { 118dc37374bSHongtao Jia compatible = "maxim,ds26522"; 119dc37374bSHongtao Jia reg = <2>; 120dc37374bSHongtao Jia spi-max-frequency = <2000000>; /* input clock */ 121dc37374bSHongtao Jia }; 122dc37374bSHongtao Jia }; 123dc37374bSHongtao Jia i2c@118000 { 124dc37374bSHongtao Jia hwmon@4c { 125dc37374bSHongtao Jia compatible = "adi,adt7461"; 126dc37374bSHongtao Jia reg = <0x4c>; 127dc37374bSHongtao Jia }; 128dc37374bSHongtao Jia 129dc37374bSHongtao Jia rtc@68 { 130dc37374bSHongtao Jia compatible = "dallas,ds1337"; 131dc37374bSHongtao Jia reg = <0x68>; 132dc37374bSHongtao Jia interrupts = <0x2 0x1 0 0>; 133dc37374bSHongtao Jia }; 134dc37374bSHongtao Jia }; 135dc37374bSHongtao Jia 136dc37374bSHongtao Jia i2c@118100 { 137dc37374bSHongtao Jia mux@77 { 138dc37374bSHongtao Jia /* 139dc37374bSHongtao Jia * Child nodes of mux depend on which i2c 140dc37374bSHongtao Jia * devices are connected via the mini PCI 141dc37374bSHongtao Jia * connector slot1, the mini PCI connector 142dc37374bSHongtao Jia * slot2, the HDMI connector, and the PEX 143dc37374bSHongtao Jia * slot. Systems with such devices attached 144dc37374bSHongtao Jia * should provide a wrapper .dts file that 145dc37374bSHongtao Jia * includes this one, and adds those nodes 146dc37374bSHongtao Jia */ 147dc37374bSHongtao Jia compatible = "nxp,pca9546"; 148dc37374bSHongtao Jia reg = <0x77>; 149dc37374bSHongtao Jia #address-cells = <1>; 150dc37374bSHongtao Jia #size-cells = <0>; 151dc37374bSHongtao Jia }; 152dc37374bSHongtao Jia }; 153dc37374bSHongtao Jia 154dc37374bSHongtao Jia }; 155dc37374bSHongtao Jia 156dc37374bSHongtao Jia pci0: pcie@ffe240000 { 157dc37374bSHongtao Jia reg = <0xf 0xfe240000 0 0x10000>; 158dc37374bSHongtao Jia ranges = <0x02000000 0 0xe0000000 0xc 0x0 0x0 0x10000000 159dc37374bSHongtao Jia 0x01000000 0 0x0 0xf 0xf8000000 0x0 0x00010000>; 160dc37374bSHongtao Jia pcie@0 { 161dc37374bSHongtao Jia ranges = <0x02000000 0 0xe0000000 162dc37374bSHongtao Jia 0x02000000 0 0xe0000000 163dc37374bSHongtao Jia 0 0x10000000 164dc37374bSHongtao Jia 165dc37374bSHongtao Jia 0x01000000 0 0x00000000 166dc37374bSHongtao Jia 0x01000000 0 0x00000000 167dc37374bSHongtao Jia 0 0x00010000>; 168dc37374bSHongtao Jia }; 169dc37374bSHongtao Jia }; 170dc37374bSHongtao Jia 171dc37374bSHongtao Jia pci1: pcie@ffe250000 { 172dc37374bSHongtao Jia reg = <0xf 0xfe250000 0 0x10000>; 173dc37374bSHongtao Jia ranges = <0x02000000 0 0xe0000000 0xc 0x10000000 0 0x10000000 174dc37374bSHongtao Jia 0x01000000 0 0 0xf 0xf8010000 0 0x00010000>; 175dc37374bSHongtao Jia pcie@0 { 176dc37374bSHongtao Jia ranges = <0x02000000 0 0xe0000000 177dc37374bSHongtao Jia 0x02000000 0 0xe0000000 178dc37374bSHongtao Jia 0 0x10000000 179dc37374bSHongtao Jia 180dc37374bSHongtao Jia 0x01000000 0 0x00000000 181dc37374bSHongtao Jia 0x01000000 0 0x00000000 182dc37374bSHongtao Jia 0 0x00010000>; 183dc37374bSHongtao Jia }; 184dc37374bSHongtao Jia }; 185dc37374bSHongtao Jia 186dc37374bSHongtao Jia pci2: pcie@ffe260000 { 187dc37374bSHongtao Jia reg = <0xf 0xfe260000 0 0x10000>; 188dc37374bSHongtao Jia ranges = <0x02000000 0 0xe0000000 0xc 0x20000000 0 0x10000000 189dc37374bSHongtao Jia 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>; 190dc37374bSHongtao Jia pcie@0 { 191dc37374bSHongtao Jia ranges = <0x02000000 0 0xe0000000 192dc37374bSHongtao Jia 0x02000000 0 0xe0000000 193dc37374bSHongtao Jia 0 0x10000000 194dc37374bSHongtao Jia 195dc37374bSHongtao Jia 0x01000000 0 0x00000000 196dc37374bSHongtao Jia 0x01000000 0 0x00000000 197dc37374bSHongtao Jia 0 0x00010000>; 198dc37374bSHongtao Jia }; 199dc37374bSHongtao Jia }; 200dc37374bSHongtao Jia 201dc37374bSHongtao Jia pci3: pcie@ffe270000 { 202dc37374bSHongtao Jia reg = <0xf 0xfe270000 0 0x10000>; 203dc37374bSHongtao Jia ranges = <0x02000000 0 0xe0000000 0xc 0x30000000 0 0x10000000 204dc37374bSHongtao Jia 0x01000000 0 0x00000000 0xf 0xf8030000 0 0x00010000>; 205dc37374bSHongtao Jia pcie@0 { 206dc37374bSHongtao Jia ranges = <0x02000000 0 0xe0000000 207dc37374bSHongtao Jia 0x02000000 0 0xe0000000 208dc37374bSHongtao Jia 0 0x10000000 209dc37374bSHongtao Jia 210dc37374bSHongtao Jia 0x01000000 0 0x00000000 211dc37374bSHongtao Jia 0x01000000 0 0x00000000 212dc37374bSHongtao Jia 0 0x00010000>; 213dc37374bSHongtao Jia }; 214dc37374bSHongtao Jia }; 215*b7a70852SZhao Qiang 216*b7a70852SZhao Qiang qe: qe@ffe140000 { 217*b7a70852SZhao Qiang ranges = <0x0 0xf 0xfe140000 0x40000>; 218*b7a70852SZhao Qiang reg = <0xf 0xfe140000 0 0x480>; 219*b7a70852SZhao Qiang brg-frequency = <0>; 220*b7a70852SZhao Qiang bus-frequency = <0>; 221*b7a70852SZhao Qiang 222*b7a70852SZhao Qiang si1: si@700 { 223*b7a70852SZhao Qiang compatible = "fsl,t1040-qe-si"; 224*b7a70852SZhao Qiang reg = <0x700 0x80>; 225*b7a70852SZhao Qiang }; 226*b7a70852SZhao Qiang 227*b7a70852SZhao Qiang siram1: siram@1000 { 228*b7a70852SZhao Qiang compatible = "fsl,t1040-qe-siram"; 229*b7a70852SZhao Qiang reg = <0x1000 0x800>; 230*b7a70852SZhao Qiang }; 231*b7a70852SZhao Qiang 232*b7a70852SZhao Qiang ucc_hdlc: ucc@2000 { 233*b7a70852SZhao Qiang compatible = "fsl,ucc-hdlc"; 234*b7a70852SZhao Qiang rx-clock-name = "clk8"; 235*b7a70852SZhao Qiang tx-clock-name = "clk9"; 236*b7a70852SZhao Qiang fsl,rx-sync-clock = "rsync_pin"; 237*b7a70852SZhao Qiang fsl,tx-sync-clock = "tsync_pin"; 238*b7a70852SZhao Qiang fsl,tx-timeslot-mask = <0xfffffffe>; 239*b7a70852SZhao Qiang fsl,rx-timeslot-mask = <0xfffffffe>; 240*b7a70852SZhao Qiang fsl,tdm-framer-type = "e1"; 241*b7a70852SZhao Qiang fsl,tdm-id = <0>; 242*b7a70852SZhao Qiang fsl,siram-entry-id = <0>; 243*b7a70852SZhao Qiang fsl,tdm-interface; 244*b7a70852SZhao Qiang }; 245*b7a70852SZhao Qiang 246*b7a70852SZhao Qiang ucc_serial: ucc@2200 { 247*b7a70852SZhao Qiang compatible = "fsl,t1040-ucc-uart"; 248*b7a70852SZhao Qiang port-number = <0>; 249*b7a70852SZhao Qiang rx-clock-name = "brg2"; 250*b7a70852SZhao Qiang tx-clock-name = "brg2"; 251*b7a70852SZhao Qiang }; 252*b7a70852SZhao Qiang }; 253dc37374bSHongtao Jia}; 254