1*ff61f079SJonathan Corbet.. SPDX-License-Identifier: GPL-2.0 2*ff61f079SJonathan Corbet 3*ff61f079SJonathan Corbet======= 4*ff61f079SJonathan CorbetIO-APIC 5*ff61f079SJonathan Corbet======= 6*ff61f079SJonathan Corbet 7*ff61f079SJonathan Corbet:Author: Ingo Molnar <mingo@kernel.org> 8*ff61f079SJonathan Corbet 9*ff61f079SJonathan CorbetMost (all) Intel-MP compliant SMP boards have the so-called 'IO-APIC', 10*ff61f079SJonathan Corbetwhich is an enhanced interrupt controller. It enables us to route 11*ff61f079SJonathan Corbethardware interrupts to multiple CPUs, or to CPU groups. Without an 12*ff61f079SJonathan CorbetIO-APIC, interrupts from hardware will be delivered only to the 13*ff61f079SJonathan CorbetCPU which boots the operating system (usually CPU#0). 14*ff61f079SJonathan Corbet 15*ff61f079SJonathan CorbetLinux supports all variants of compliant SMP boards, including ones with 16*ff61f079SJonathan Corbetmultiple IO-APICs. Multiple IO-APICs are used in high-end servers to 17*ff61f079SJonathan Corbetdistribute IRQ load further. 18*ff61f079SJonathan Corbet 19*ff61f079SJonathan CorbetThere are (a few) known breakages in certain older boards, such bugs are 20*ff61f079SJonathan Corbetusually worked around by the kernel. If your MP-compliant SMP board does 21*ff61f079SJonathan Corbetnot boot Linux, then consult the linux-smp mailing list archives first. 22*ff61f079SJonathan Corbet 23*ff61f079SJonathan CorbetIf your box boots fine with enabled IO-APIC IRQs, then your 24*ff61f079SJonathan Corbet/proc/interrupts will look like this one:: 25*ff61f079SJonathan Corbet 26*ff61f079SJonathan Corbet hell:~> cat /proc/interrupts 27*ff61f079SJonathan Corbet CPU0 28*ff61f079SJonathan Corbet 0: 1360293 IO-APIC-edge timer 29*ff61f079SJonathan Corbet 1: 4 IO-APIC-edge keyboard 30*ff61f079SJonathan Corbet 2: 0 XT-PIC cascade 31*ff61f079SJonathan Corbet 13: 1 XT-PIC fpu 32*ff61f079SJonathan Corbet 14: 1448 IO-APIC-edge ide0 33*ff61f079SJonathan Corbet 16: 28232 IO-APIC-level Intel EtherExpress Pro 10/100 Ethernet 34*ff61f079SJonathan Corbet 17: 51304 IO-APIC-level eth0 35*ff61f079SJonathan Corbet NMI: 0 36*ff61f079SJonathan Corbet ERR: 0 37*ff61f079SJonathan Corbet hell:~> 38*ff61f079SJonathan Corbet 39*ff61f079SJonathan CorbetSome interrupts are still listed as 'XT PIC', but this is not a problem; 40*ff61f079SJonathan Corbetnone of those IRQ sources is performance-critical. 41*ff61f079SJonathan Corbet 42*ff61f079SJonathan Corbet 43*ff61f079SJonathan CorbetIn the unlikely case that your board does not create a working mp-table, 44*ff61f079SJonathan Corbetyou can use the pirq= boot parameter to 'hand-construct' IRQ entries. This 45*ff61f079SJonathan Corbetis non-trivial though and cannot be automated. One sample /etc/lilo.conf 46*ff61f079SJonathan Corbetentry:: 47*ff61f079SJonathan Corbet 48*ff61f079SJonathan Corbet append="pirq=15,11,10" 49*ff61f079SJonathan Corbet 50*ff61f079SJonathan CorbetThe actual numbers depend on your system, on your PCI cards and on their 51*ff61f079SJonathan CorbetPCI slot position. Usually PCI slots are 'daisy chained' before they are 52*ff61f079SJonathan Corbetconnected to the PCI chipset IRQ routing facility (the incoming PIRQ1-4 53*ff61f079SJonathan Corbetlines):: 54*ff61f079SJonathan Corbet 55*ff61f079SJonathan Corbet ,-. ,-. ,-. ,-. ,-. 56*ff61f079SJonathan Corbet PIRQ4 ----| |-. ,-| |-. ,-| |-. ,-| |--------| | 57*ff61f079SJonathan Corbet |S| \ / |S| \ / |S| \ / |S| |S| 58*ff61f079SJonathan Corbet PIRQ3 ----|l|-. `/---|l|-. `/---|l|-. `/---|l|--------|l| 59*ff61f079SJonathan Corbet |o| \/ |o| \/ |o| \/ |o| |o| 60*ff61f079SJonathan Corbet PIRQ2 ----|t|-./`----|t|-./`----|t|-./`----|t|--------|t| 61*ff61f079SJonathan Corbet |1| /\ |2| /\ |3| /\ |4| |5| 62*ff61f079SJonathan Corbet PIRQ1 ----| |- `----| |- `----| |- `----| |--------| | 63*ff61f079SJonathan Corbet `-' `-' `-' `-' `-' 64*ff61f079SJonathan Corbet 65*ff61f079SJonathan CorbetEvery PCI card emits a PCI IRQ, which can be INTA, INTB, INTC or INTD:: 66*ff61f079SJonathan Corbet 67*ff61f079SJonathan Corbet ,-. 68*ff61f079SJonathan Corbet INTD--| | 69*ff61f079SJonathan Corbet |S| 70*ff61f079SJonathan Corbet INTC--|l| 71*ff61f079SJonathan Corbet |o| 72*ff61f079SJonathan Corbet INTB--|t| 73*ff61f079SJonathan Corbet |x| 74*ff61f079SJonathan Corbet INTA--| | 75*ff61f079SJonathan Corbet `-' 76*ff61f079SJonathan Corbet 77*ff61f079SJonathan CorbetThese INTA-D PCI IRQs are always 'local to the card', their real meaning 78*ff61f079SJonathan Corbetdepends on which slot they are in. If you look at the daisy chaining diagram, 79*ff61f079SJonathan Corbeta card in slot4, issuing INTA IRQ, it will end up as a signal on PIRQ4 of 80*ff61f079SJonathan Corbetthe PCI chipset. Most cards issue INTA, this creates optimal distribution 81*ff61f079SJonathan Corbetbetween the PIRQ lines. (distributing IRQ sources properly is not a 82*ff61f079SJonathan Corbetnecessity, PCI IRQs can be shared at will, but it's a good for performance 83*ff61f079SJonathan Corbetto have non shared interrupts). Slot5 should be used for videocards, they 84*ff61f079SJonathan Corbetdo not use interrupts normally, thus they are not daisy chained either. 85*ff61f079SJonathan Corbet 86*ff61f079SJonathan Corbetso if you have your SCSI card (IRQ11) in Slot1, Tulip card (IRQ9) in 87*ff61f079SJonathan CorbetSlot2, then you'll have to specify this pirq= line:: 88*ff61f079SJonathan Corbet 89*ff61f079SJonathan Corbet append="pirq=11,9" 90*ff61f079SJonathan Corbet 91*ff61f079SJonathan Corbetthe following script tries to figure out such a default pirq= line from 92*ff61f079SJonathan Corbetyour PCI configuration:: 93*ff61f079SJonathan Corbet 94*ff61f079SJonathan Corbet echo -n pirq=; echo `scanpci | grep T_L | cut -c56-` | sed 's/ /,/g' 95*ff61f079SJonathan Corbet 96*ff61f079SJonathan Corbetnote that this script won't work if you have skipped a few slots or if your 97*ff61f079SJonathan Corbetboard does not do default daisy-chaining. (or the IO-APIC has the PIRQ pins 98*ff61f079SJonathan Corbetconnected in some strange way). E.g. if in the above case you have your SCSI 99*ff61f079SJonathan Corbetcard (IRQ11) in Slot3, and have Slot1 empty:: 100*ff61f079SJonathan Corbet 101*ff61f079SJonathan Corbet append="pirq=0,9,11" 102*ff61f079SJonathan Corbet 103*ff61f079SJonathan Corbet[value '0' is a generic 'placeholder', reserved for empty (or non-IRQ emitting) 104*ff61f079SJonathan Corbetslots.] 105*ff61f079SJonathan Corbet 106*ff61f079SJonathan CorbetGenerally, it's always possible to find out the correct pirq= settings, just 107*ff61f079SJonathan Corbetpermute all IRQ numbers properly ... it will take some time though. An 108*ff61f079SJonathan Corbet'incorrect' pirq line will cause the booting process to hang, or a device 109*ff61f079SJonathan Corbetwon't function properly (e.g. if it's inserted as a module). 110*ff61f079SJonathan Corbet 111*ff61f079SJonathan CorbetIf you have 2 PCI buses, then you can use up to 8 pirq values, although such 112*ff61f079SJonathan Corbetboards tend to have a good configuration. 113*ff61f079SJonathan Corbet 114*ff61f079SJonathan CorbetBe prepared that it might happen that you need some strange pirq line:: 115*ff61f079SJonathan Corbet 116*ff61f079SJonathan Corbet append="pirq=0,0,0,0,0,0,9,11" 117*ff61f079SJonathan Corbet 118*ff61f079SJonathan CorbetUse smart trial-and-error techniques to find out the correct pirq line ... 119*ff61f079SJonathan Corbet 120*ff61f079SJonathan CorbetGood luck and mail to linux-smp@vger.kernel.org or 121*ff61f079SJonathan Corbetlinux-kernel@vger.kernel.org if you have any problems that are not covered 122*ff61f079SJonathan Corbetby this document. 123*ff61f079SJonathan Corbet 124