| /linux/tools/perf/pmu-events/arch/x86/ivytown/ |
| H A D | uncore-interconnect.json | 18 … had an address match with another request in the write cache.; When it is not possible to merge t…
28 …not yet returned their data to the uncore. These writes are generally queued up in the switch try…
38 …": "Accumulates the number of writes that have acquired ownership but have not yet returned their …
58 …Q register. This register allows one to select one specific queue. It is not possible to monitor…
78 …Q register. This register allows one to select one specific queue. It is not possible to monitor…
98 …Q register. This register allows one to select one specific queue. It is not possible to monitor…
118 …Q register. This register allows one to select one specific queue. It is not possible to monitor…
164 "BriefDescription": "BL Ingress Occupancy - DRS",
189 "BriefDescription": "BL Ingress Occupancy - NCB",
214 "BriefDescription": "BL Ingress Occupancy - NCS",
[all …]
|
| H A D | uncore-cache.json | 15 …ed in Counter 0. The filtering available is found in the control register - threshold, invert an…
24 …- this includes code, data, prefetches and hints coming from L2. This has numerous filters availa…
34 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer…
44 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer…
54 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer…
64 …- this includes code, data, prefetches and hints coming from L2. This has numerous filters availa…
209 "BriefDescription": "LRU Queue; Non-0 Aged Victim",
214 "PublicDescription": "How often we picked a victim that had a non-zero age",
224 …not include when packets are being sent from the ring stop. We really have two rings in JKT -- a …
234 …not include when packets are being sent from the ring stop. We really have two rings in JKT -- a …
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/haswellx/ |
| H A D | uncore-interconnect.json | 18 "PublicDescription": "Accumulates the number of reads and writes that are outstanding in the uncore in each cycle. This is effectively the sum of the READ_OCCUPANCY and WRITE_OCCUPANCY events.; Tracks only those requests that come from the port specified in the IRP_PmonFilter.OrderingQ register. This register allows one to select one specific queue. It is not possible to monitor multiple queues at a time.",
111 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Atomic Transactions as Secondary",
116 "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Atomic Transactions as Secondary",
121 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Read Transactions as Secondary",
126 "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Read Transactions as Secondary",
131 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Write Transactions as Secondary",
136 "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Write Transactions as Secondary",
141 "BriefDescription": "Misc Events - Set 0; Fastpath Rejects",
146 "PublicDescription": "Counts Timeouts - Set 0 : Fastpath Rejects",
151 "BriefDescription": "Misc Events - Se
[all...] |
| H A D | uncore-cache.json | 27 "BriefDescription": "LLC misses - demand and prefetch data reads - excludes LLC prefetches. Derived from unc_c_tor_inserts.miss_opcode",
111 "BriefDescription": "LLC misses - Uncacheable reads (from cpu) . Derived from unc_c_tor_inserts.miss_opcode",
214 "PublicDescription": "Since occupancy counts can only be captured in the Cbo's 0 counter, this event allows a user to capture occupancy related information by filtering the Cb0 occupancy count captured in Counter 0. The filtering available is found in the control register - threshold, invert and edge detect. E.g. setting threshold to 1 can effectively monitor how many cycles the monitored queue has an entry.",
227 "BriefDescription": "All LLC Misses (code+ data rd + data wr - including demand and prefetch)",
233 "PublicDescription": "Counts the number of times the LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numerous filters available. Note the non-standard filtering equation. This event will count requests that lookup the cache multiple times with multiple increments. One must ALWAYS set umask bit 0 and select a state or states to match. Otherwise, the event will count nothing. CBoGlCtrl[22:18] bits correspond to [FMESI] state.; Filters for any transaction originating from the IPQ or IRQ. This does not include lookups originating from the ISMQ.",
244 "PublicDescription": "Counts the number of times the LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numerous filters available. Note the non-standar
[all...] |
| /linux/rust/kernel/sync/ |
| H A D | aref.rs | 1 // SPDX-License-Identifier: GPL-2.0
7 //! from Rust; instead of making users have to use an additional Rust-reference count in the form of
29 /// Rust code, the recommendation is to use [`Arc`](crate::sync::Arc) to create reference-counted
37 /// Implementers must also ensure that all instances are reference-counted. (Otherwise they
58 /// An owned reference to an always-reference-counted object.
66 /// The pointer stored in `ptr` is non-null and valid for the lifetime of the [`ARef`] instance. In
73 // SAFETY: It is safe to send `ARe
[all...] |
| /linux/tools/perf/pmu-events/arch/x86/broadwellx/ |
| H A D | uncore-interconnect.json | 18 "PublicDescription": "Accumulates the number of reads and writes that are outstanding in the uncore in each cycle. This is effectively the sum of the READ_OCCUPANCY and WRITE_OCCUPANCY events.; Tracks only those requests that come from the port specified in the IRP_PmonFilter.OrderingQ register. This register allows one to select one specific queue. It is not possible to monitor multiple queues at a time.",
111 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Atomic Transactions as Secondary",
116 "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Atomic Transactions as Secondary",
121 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Read Transactions as Secondary",
126 "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Read Transactions as Secondary",
131 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Write Transactions as Secondary",
136 "PublicDescription": "Counts Timeouts - Set 0 : Cache Inserts of Write Transactions as Secondary",
141 "BriefDescription": "Misc Events - Set 0; Fastpath Rejects",
146 "PublicDescription": "Counts Timeouts - Set 0 : Fastpath Rejects",
151 "BriefDescription": "Misc Events - Se
[all...] |
| H A D | uncore-cache.json | 27 "BriefDescription": "LLC misses - demand and prefetch data reads - excludes LLC prefetches. Derived from unc_c_tor_inserts.miss_opcode",
111 "BriefDescription": "LLC misses - Uncacheable reads (from cpu) . Derived from unc_c_tor_inserts.miss_opcode",
214 "PublicDescription": "Since occupancy counts can only be captured in the Cbo's 0 counter, this event allows a user to capture occupancy related information by filtering the Cb0 occupancy count captured in Counter 0. The filtering available is found in the control register - threshold, invert and edge detect. E.g. setting threshold to 1 can effectively monitor how many cycles the monitored queue has an entry.",
227 "BriefDescription": "All LLC Misses (code+ data rd + data wr - including demand and prefetch)",
233 "PublicDescription": "Counts the number of times the LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numerous filters available. Note the non-standard filtering equation. This event will count requests that lookup the cache multiple times with multiple increments. One must ALWAYS set umask bit 0 and select a state or states to match. Otherwise, the event will count nothing. CBoGlCtrl[22:18] bits correspond to [FMESI] state.; Filters for any transaction originating from the IPQ or IRQ. This does not include lookups originating from the ISMQ.",
244 "PublicDescription": "Counts the number of times the LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numerous filters available. Note the non-standar
[all...] |
| /linux/arch/arm64/boot/dts/apple/ |
| H A D | t600x-nvme.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
9 compatible = "apple,t6000-asc-mailbox", "apple,asc-mailbox-v4";
11 interrupt-parent = <&aic>;
16 interrupt-names = "send-empty", "send-not-empty",
17 "recv-empty", "recv-not-empty";
18 power-domains = <&DIE_NODE(ps_ans2)>;
19 #mbox-cells = <0>;
23 compatible = "apple,t6000-sart";
25 power-domains = <&DIE_NODE(ps_ans2)>;
29 compatible = "apple,t6000-nvme-ans2", "apple,nvme-ans2";
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/sapphirerapids/ |
| H A D | uncore-interconnect.json | 31 "BriefDescription": "FAF - request insert from TC.",
47 "BriefDescription": "FAF allocation -- sent to ADQ",
84 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Atomic Transactions as Secondary",
94 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Read Transactions as Secondary",
104 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Write Transactions as Secondary",
114 "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Rejects",
124 "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Requests",
134 … "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Transfers From Primary to Secondary",
144 … "BriefDescription": "Counts Timeouts - Set 0 : Prefetch Ack Hints From Primary to Secondary",
154 "BriefDescription": "Counts Timeouts - Set 0 : Slow path fwpf didn't find prefetch",
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/emeraldrapids/ |
| H A D | uncore-interconnect.json | 31 "BriefDescription": "FAF - request insert from TC.",
47 "BriefDescription": "FAF allocation -- sent to ADQ",
84 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Atomic Transactions as Secondary",
94 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Read Transactions as Secondary",
104 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Write Transactions as Secondary",
114 "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Rejects",
124 "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Requests",
134 … "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Transfers From Primary to Secondary",
144 … "BriefDescription": "Counts Timeouts - Set 0 : Prefetch Ack Hints From Primary to Secondary",
154 "BriefDescription": "Counts Timeouts - Set 0 : Slow path fwpf didn't find prefetch",
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/skylakex/ |
| H A D | uncore-interconnect.json | 104 "PublicDescription": "PCIITOM request issued by the IRP unit to the mesh with the intention of writing a full cacheline to coherent memory, without a RFO. PCIITOM is a speculative Invalidate to Modified command that requests ownership of the cacheline and does not move data from the mesh to IRP cache.",
157 "BriefDescription": "FAF allocation -- sent to ADQ",
186 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Atomic Transactions as Secondary",
196 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Read Transactions as Secondary",
206 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Write Transactions as Secondary",
216 "BriefDescription": "Misc Events - Set 0; Fastpath Rejects",
226 "BriefDescription": "Misc Events - Set 0; Fastpath Requests",
236 "BriefDescription": "Misc Events - Set 0; Fastpath Transfers From Primary to Secondary",
246 "BriefDescription": "Misc Events - Se
[all...] |
| /linux/tools/perf/pmu-events/arch/x86/cascadelakex/ |
| H A D | uncore-interconnect.json | 104 "PublicDescription": "PCIITOM request issued by the IRP unit to the mesh with the intention of writing a full cacheline to coherent memory, without a RFO. PCIITOM is a speculative Invalidate to Modified command that requests ownership of the cacheline and does not move data from the mesh to IRP cache.",
157 "BriefDescription": "FAF allocation -- sent to ADQ",
186 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Atomic Transactions as Secondary",
196 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Read Transactions as Secondary",
206 "BriefDescription": "Misc Events - Set 0; Cache Inserts of Write Transactions as Secondary",
216 "BriefDescription": "Misc Events - Set 0; Fastpath Rejects",
226 "BriefDescription": "Misc Events - Set 0; Fastpath Requests",
236 "BriefDescription": "Misc Events - Set 0; Fastpath Transfers From Primary to Secondary",
246 "BriefDescription": "Misc Events - Se
[all...] |
| /linux/Documentation/networking/caif/ |
| H A D | caif.rst | 1 .. SPDX-License-Identifier: GPL-2.0
10 :Copyright: |copy| ST-Ericsson AB 2010
40 The use of Start-of-frame-extension (STX) must also be set as
59 /sys/kernel/debug/caif_serial/<tty-name>/
61 * ser_state: Prints the bit-mask status where
63 - 0x02 means SENDING, this is a transient state.
64 - 0x10 means FLOW_OFF_SENT, i.e. the previous frame has not been sent
65 and is blocking further send operation. Flow OFF has been propagated
68 * tty_status: Prints the bit-mask tty status information
70 - 0x01 - tty->warned is on.
[all …]
|
| /linux/tools/perf/pmu-events/arch/arm64/arm/neoverse-n1/ |
| H A D | stall.json | 4 …not send any micro-operations to the rename stage because of frontend resource stalls caused by fe…
8 …send any micro-operations to the backend of the pipeline because of backend resource constraints. …
|
| /linux/tools/perf/pmu-events/arch/x86/icelakex/ |
| H A D | uncore-interconnect.json | 59 …date to Modified command that requests ownership of the cacheline and does not move data from the …
111 "BriefDescription": "FAF allocation -- sent to ADQ",
148 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Atomic Transactions as Secondary",
158 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Read Transactions as Secondary",
168 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Write Transactions as Secondary",
178 "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Rejects",
188 "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Requests",
198 … "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Transfers From Primary to Secondary",
208 … "BriefDescription": "Counts Timeouts - Set 0 : Prefetch Ack Hints From Primary to Secondary",
218 "BriefDescription": "Counts Timeouts - Set 0 : Slow path fwpf didn't find prefetch",
[all …]
|
| /linux/tools/perf/pmu-events/arch/arm64/arm/neoverse-v1/ |
| H A D | stall.json | 4 …not send any micro-operations to the rename stage because of frontend resource stalls caused by fe…
8 …send any micro-operations to the backend of the pipeline because of backend resource constraints. …
|
| /linux/tools/perf/pmu-events/arch/x86/jaketown/ |
| H A D | uncore-cache.json | 15 …ed in Counter 0. The filtering available is found in the control register - threshold, invert an…
31 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer…
41 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer…
51 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer…
61 … LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numer…
161 …not include when packets are being sent from the ring stop. We really have two rings in JKT -- a …
171 …not include when packets are being sent from the ring stop. We really have two rings in JKT -- a …
181 …not include when packets are being sent from the ring stop. We really have two rings in JKT -- a …
191 …not include when packets are being sent from the ring stop. We really have two rings in JKT -- a …
201 …not include when packets are being sent from the ring stop.We really have two rings in JKT -- a cl…
[all …]
|
| /linux/tools/perf/pmu-events/arch/x86/broadwellde/ |
| H A D | uncore-cache.json | 23 "PublicDescription": "Since occupancy counts can only be captured in the Cbo's 0 counter, this event allows a user to capture occupancy related information by filtering the Cb0 occupancy count captured in Counter 0. The filtering available is found in the control register - threshold, invert and edge detect. E.g. setting threshold to 1 can effectively monitor how many cycles the monitored queue has an entry.",
41 "PublicDescription": "Counts the number of times the LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numerous filters available. Note the non-standard filtering equation. This event will count requests that lookup the cache multiple times with multiple increments. One must ALWAYS set umask bit 0 and select a state or states to match. Otherwise, the event will count nothing. CBoGlCtrl[22:18] bits correspond to [FMESI] state.; Filters for any transaction originating from the IPQ or IRQ. This does not include lookups originating from the ISMQ.",
51 "PublicDescription": "Counts the number of times the LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numerous filters available. Note the non-standard filtering equation. This event will count requests that lookup the cache multiple times with multiple increments. One must ALWAYS set umask bit 0 and select a state or states to match. Otherwise, the event will count nothing. CBoGlCtrl[22:18] bits correspond to [FMESI] state.; Read transactions",
61 "PublicDescription": "Counts the number of times the LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numerous filters available. Note the non-standard filtering equation. This event will count requests that lookup the cache multiple times with multiple increments. One must ALWAYS set umask bit 0 and select a state or states to match. Otherwise, the event will count nothing. CBoGlCtrl[22:18] bits correspond to [FMESI] state.; Qualify one of the other subevents by the Target NID. The NID is programmed in Cn_MSR_PMON_BOX_FILTER.nid. In conjunction with STATE = I, it is possible to monitor misses to specific NIDs in the system.",
71 "PublicDescription": "Counts the number of times the LLC was accessed - this includes code, data, prefetches and hints coming from L2. This has numerous filters available. Note the non-standar
[all...] |
| /linux/tools/perf/pmu-events/arch/x86/snowridgex/ |
| H A D | uncore-cache.json | 977 …system. This can be filtered by when the bypass was taken and when it was not. : Filter for trans…
982 "BriefDescription": "CHA to iMC Bypass : Not Taken",
988 …Not Taken : Counts the number of times when the CHA was able to bypass HA pipe on the way to iMC. …
999 …system. This can be filtered by when the bypass was taken and when it was not. : Filter for trans…
1025 …s are set on a data read, the cores must have the data in S state so it is not necessary to snoop …
1036 …s are set on a data read, the cores must have the data in S state so it is not necessary to snoop …
1047 …s are set on a data read, the cores must have the data in S state so it is not necessary to snoop …
1058 …s are set on a data read, the cores must have the data in S state so it is not necessary to snoop …
1069 …s are set on a data read, the cores must have the data in S state so it is not necessary to snoop …
1080 …s are set on a data read, the cores must have the data in S state so it is not necessary to snoop …
[all …]
|
| H A D | uncore-interconnect.json | 59 …date to Modified command that requests ownership of the cacheline and does not move data from the …
111 "BriefDescription": "FAF allocation -- sent to ADQ",
148 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Atomic Transactions as Secondary",
158 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Read Transactions as Secondary",
168 … "BriefDescription": "Counts Timeouts - Set 0 : Cache Inserts of Write Transactions as Secondary",
178 "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Rejects",
188 "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Requests",
198 … "BriefDescription": "Counts Timeouts - Set 0 : Fastpath Transfers From Primary to Secondary",
208 … "BriefDescription": "Counts Timeouts - Set 0 : Prefetch Ack Hints From Primary to Secondary",
218 "BriefDescription": "Counts Timeouts - Set 0 : Slow path fwpf didn't find prefetch",
[all …]
|
| /linux/rust/kernel/ |
| H A D | list.rs | 1 // SPDX-License-Identifier: GPL-2.0
29 /// prev/next pointers are not used for several linked lists.
33 /// * If the list is empty, then `first` is null. Otherwise, `first` points at the `ListLinks`
54 /// fn new(value: i32) -> Result<ListArc<Self>> {
57 /// links <- ListLinks::new(),
69 /// // Create a new empty list.
153 /// fn foo(&self) -> (&'static str, i32);
164 /// fn new(value: T) -> Resul
[all...] |
| /linux/drivers/block/drbd/ |
| H A D | drbd_req.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
7 Copyright (C) 2006-2008, LINBIT Information Technologies GmbH.
8 Copyright (C) 2006-2008, Lars Ellenberg <lars.ellenberg@linbit.com>.
9 Copyright (C) 2006-2008, Philipp Reisner <philipp.reisner@linbit.com>.
24 and by the receiver and worker in kernel-thread context.
37 * send via the network.
47 * either successfully or with io-error.
60 * corresponding dirty bits in the resync-bitmap may be cleared or set,
72 * these are not "events" but "actions"
78 /* An empty flush is queued as P_BARRIER,
[all …]
|
| /linux/sound/drivers/ |
| H A D | serial-u16550.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
12 * Added support for the Midiator MS-124T and for the MS-124W in
17 * More documentation can be found in serial-u16550.txt.
39 #define SNDRV_SERIAL_MS124T 1 /* Midiator MS-124T */
40 #define SNDRV_SERIAL_MS124W_SA 2 /* Midiator MS-12
[all...] |
| /linux/drivers/media/platform/st/sti/delta/ |
| H A D | delta-ipc.c | 1 // SPDX-License-Identifier: GPL-2.0
10 #include "delta-ipc.h"
11 #include "delta-mem.h"
38 #define msg_to_ctx(msg) ((struct delta_ipc_ctx *)(msg)->header.host_hdl)
39 #define msg_to_copro_hdl(msg) ((msg)->header.copro_hdl)
43 return (ctx->ipc_buf->paddr + (vaddr - ctx->ipc_buf->vaddr)); in to_paddr()
49 return ((data >= ctx->ipc_buf->vaddr) && in is_valid_data()
50 ((data + size) <= (ctx->ipc_buf->vaddr + ctx->ipc_buf->size))); in is_valid_data()
58 * this IPC shared memory, avoiding de-facto recopies inside delta-ipc.
62 * - struct delta_ipc_open_msg
[all …]
|
| /linux/drivers/net/usb/ |
| H A D | cx82310_eth.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Driver for USB ethernet port of Conexant CX82310-based ADSL routers
22 CMD_GET_LINK_STATUS = 0x92, /* not useful, link is always up */
50 * - optionally send some data (command parameters)
51 * - optionally wait for the reply
52 * - optionally read some data from the reply
58 struct usb_device *udev = dev->udev; in cx82310_cmd()
62 return -ENOMEM; in cx82310_cmd()
67 memcpy(buf + 4, wdata, min_t(int, wlen, CMD_PACKET_SIZE - 4)); in cx82310_cmd()
69 /* send command packet */ in cx82310_cmd()
[all …]
|