| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | qcom,gcc-sdx65.yaml | 4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sdx65.yaml#
7 title: Qualcomm Global Clock & Reset Controller on SDX65
14 domains on SDX65
16 See also:: include/dt-bindings/clock/qcom,gcc-sdx65.h
20 const: qcom,gcc-sdx65
53 compatible = "qcom,gcc-sdx65";
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| H A D | qcom,a7pll.yaml | 13 The A7 PLL on the Qualcomm platforms like SDX55, SDX65 is used to provide high
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| /linux/arch/arm/boot/dts/qcom/ |
| H A D | qcom-sdx65.dtsi | 3 * SDX65 SoC device tree source
9 #include <dt-bindings/clock/qcom,gcc-sdx65.h>
15 #include <dt-bindings/interconnect/qcom,sdx65.h>
68 compatible = "qcom,scm-sdx65", "qcom,scm";
73 compatible = "qcom,sdx65-mc-virt";
205 compatible = "qcom,gcc-sdx65";
232 compatible = "qcom,sdx65-usb-hs-phy",
243 compatible = "qcom,sdx65-qmp-usb3-uni-phy";
268 compatible = "qcom,sdx65-system-noc";
303 compatible = "qcom,sdx65-pcie-ep", "qcom,sdx55-pcie-ep";
[all …]
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| H A D | qcom-sdx65-mtp.dts | 11 #include "qcom-sdx65.dtsi"
18 model = "Qualcomm Technologies, Inc. SDX65 MTP";
19 compatible = "qcom,sdx65-mtp", "qcom,sdx65";
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| H A D | Makefile | 62 qcom-sdx65-mtp.dtb
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| /linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | qcom,sdx65-tlmm.yaml | 4 $id: http://devicetree.org/schemas/pinctrl/qcom,sdx65-tlmm.yaml#
7 title: Qualcomm Technologies, Inc. SDX65 TLMM block
13 Top Level Mode Multiplexer pin controller in Qualcomm SDX65 SoC.
17 const: qcom,sdx65-tlmm
31 - $ref: "#/$defs/qcom-sdx65-tlmm-state"
34 $ref: "#/$defs/qcom-sdx65-tlmm-state"
38 qcom-sdx65-tlmm-state:
125 compatible = "qcom,sdx65-tlmm";
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| /linux/Documentation/devicetree/bindings/interconnect/ |
| H A D | qcom,rpmh.yaml | 69 - qcom,sdx65-mc-virt
70 - qcom,sdx65-mem-noc
71 - qcom,sdx65-system-noc
119 - qcom,sdx65-mc-virt
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| /linux/Documentation/devicetree/bindings/usb/ |
| H A D | qcom,dwc3.yaml | 56 - qcom,sdx65-dwc3
227 - qcom,sdx65-dwc3
503 - qcom,sdx65-dwc3
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| H A D | qcom,snps-dwc3.yaml | 56 - qcom,sdx65-dwc3
211 - qcom,sdx65-dwc3
488 - qcom,sdx65-dwc3
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| /linux/Documentation/devicetree/bindings/mfd/ |
| H A D | qcom,tcsr.yaml | 34 - qcom,sdx65-tcsr
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| /linux/Documentation/devicetree/bindings/arm/ |
| H A D | qcom.yaml | 83 sdx65
916 - qcom,sdx65-mtp
917 - const: qcom,sdx65
1250 - qcom,sdx65
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| /linux/Documentation/devicetree/bindings/watchdog/ |
| H A D | qcom-wdt.yaml | 40 - qcom,apss-wdt-sdx65
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| /linux/Documentation/devicetree/bindings/power/ |
| H A D | qcom,rpmpd.yaml | 51 - qcom,sdx65-rpmhpd
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| /linux/drivers/clk/qcom/ |
| H A D | gcc-sdx65.c | 14 #include <dt-bindings/clock/qcom,gcc-sdx65.h>
1565 { .compatible = "qcom,gcc-sdx65" },
1589 .name = "gcc-sdx65",
1606 MODULE_DESCRIPTION("QTI GCC SDX65 Driver");
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| H A D | clk-rpmh.c | 957 { .compatible = "qcom,sdx65-rpmh-clk", .data = &clk_rpmh_sdx65},
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| /linux/Documentation/devicetree/bindings/mmc/ |
| H A D | sdhci-msm.yaml | 57 - qcom,sdx65-sdhci
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| /linux/Documentation/devicetree/bindings/iommu/ |
| H A D | arm,smmu.yaml | 52 - qcom,sdx65-smmu-500
592 - qcom,sdx65-smmu-500
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| /linux/Documentation/devicetree/bindings/net/ |
| H A D | qcom,ipa.yaml | 53 - qcom,sdx65-ipa
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| /linux/drivers/pinctrl/qcom/ |
| H A D | pinctrl-sdx65.c | 932 { .compatible = "qcom,sdx65-tlmm", },
938 .name = "sdx65-tlmm",
956 MODULE_DESCRIPTION("QTI sdx65 pinctrl driver");
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| /linux/drivers/pmdomain/qcom/ |
| H A D | rpmhpd.c | 333 /* SDX65 RPMH powerdomains */
740 { .compatible = "qcom,sdx65-rpmhpd", .data = &sdx65_desc},
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| /linux/drivers/phy/qualcomm/ |
| H A D | phy-qcom-qmp-usb.c | 2140 if (of_device_is_compatible(dev->of_node, "qcom,sdx65-qmp-usb3-uni-phy")) in qmp_usb_parse_dt_legacy()
2341 .compatible = "qcom,sdx65-qmp-usb3-uni-phy",
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| H A D | phy-qcom-qmp-pcie.c | 5054 .compatible = "qcom,sdx65-qmp-gen4x2-pcie-phy",
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| /linux/drivers/bus/mhi/host/ |
| H A D | pci_generic.c | 902 /* T99W368 (sdx65) */
|