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/linux/include/uapi/misc/
H A Dxilinx_sdfec.h1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
3 * Xilinx SD-FEC
26 (XSDFEC_LDPC_SC_TABLE_ADDR_HIGH - XSDFEC_LDPC_SC_TABLE_ADDR_BASE)
28 (XSDFEC_LDPC_LA_TABLE_ADDR_HIGH - XSDFEC_LDPC_LA_TABLE_ADDR_BASE)
30 (XSDFEC_LDPC_QC_TABLE_ADDR_HIGH - XSDFEC_LDPC_QC_TABLE_ADDR_BASE)
33 * enum xsdfec_code - Code Type.
47 * enum xsdfec_order - Order
49 * @XSDFEC_OUT_OF_ORDER: Out-of-order execution of blocks.
60 * enum xsdfec_turbo_alg - Turbo Algorithm Type.
61 * @XSDFEC_MAX_SCALE: Max Log-Map algorithm with extrinsic scaling. When
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/linux/Documentation/devicetree/bindings/misc/
H A Dxlnx,sd-fec.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/misc/xlnx,sd-fec.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Cvetic, Dragan <dragan.cvetic@amd.com>
11 - Erim, Salih <salih.erim@amd.com>
15 which provides high-throughput LDPC and Turbo Code implementations.
17 customer specified Quasi-cyclic (QC) codes. The Turbo decode functionality
18 principally covers codes used by LTE. The FEC Engine offers significant
23 const: xlnx,sd-fec-1.1
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/linux/drivers/media/platform/st/stm32/stm32-dcmipp/
H A Ddcmipp-parallel.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/v4l2-mediabus.h>
12 #include <media/v4l2-event.h>
13 #include <media/v4l2-subdev.h>
15 #include "dcmipp-common.h"
53 PIXMAP_SINK_SRC_PRCR_SWAP(RGB565_2X8_LE, RGB565_2X8_LE, RGB565, 1),
56 PIXMAP_SINK_SRC_PRCR_SWAP(YUYV8_2X8, YUYV8_2X8, YUV422, 1),
58 PIXMAP_SINK_SRC_PRCR_SWAP(UYVY8_2X8, UYVY8_2X8, YUV422, 1),
60 PIXMAP_SINK_SRC_PRCR_SWAP(YVYU8_2X8, YVYU8_2X8, YUV422, 1),
61 PIXMAP_SINK_SRC_PRCR_SWAP(VYUY8_2X8, VYUY8_2X8, YUV422, 1),
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/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6qdl-skov-cpu.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/leds/common.h>
10 stdout-path = &uart2;
16 ethernet0 = &fec;
19 mdio-gpio0 = &mdio;
28 iio-hwmon {
29 compatible = "iio-hwmon";
30 io-channels = <&adc 0>, /* 24V */
31 <&adc 1>; /* temperature */
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H A Dimx6qp-prtwd3.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
16 stdout-path = &uart4;
29 clock_ksz8081: clock-ksz8081 {
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <50000000>;
35 clock_ksz9031: clock-ksz9031 {
36 compatible = "fixed-clock";
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H A Dimx6qdl-mba6.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2013-2021 TQ-Systems GmbH
6 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
9 #include <dt-bindings/clock/imx6qdl-clock.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/sound/fsl-imx-audmux.h>
18 /delete-property/ mmc2;
19 /delete-property/ mmc3;
24 stdout-path = &uart2;
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H A Dimx51-zii-scu2-mezz.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
13 compatible = "zii,imx51-scu2-mezz", "fsl,imx51";
16 stdout-path = &uart1;
26 mdio-gpio0 = &mdio_gpio;
29 usb_vbus: regulator-usb-vbus {
30 compatible = "regulator-fixed";
31 pinctrl-names = "default";
32 pinctrl-0 = <&pinctrl_usb_mmc_reset>;
34 startup-delay-us = <150000>;
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H A Dimx51-zii-scu3-esb.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
7 /dts-v1/;
13 compatible = "zii,imx51-scu3-esb", "fsl,imx51";
16 stdout-path = &uart1;
25 usb_vbus: regulator-usb-vbus {
26 compatible = "regulator-fixed";
27 regulator-name = "usb_vbus";
28 regulator-min-microvolt = <5000000>;
29 regulator-max-microvolt = <5000000>;
31 pinctrl-names = "default";
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H A Dimx6qdl-ts4900.dtsi4 * This file is dual-licensed: you can use it either under the terms
42 #include <dt-bindings/gpio/gpio.h>
43 #include <dt-bindings/interrupt-controller/irq.h>
47 ethernet0 = &fec;
51 pinctrl-names = "default";
52 pinctrl-0 = <&pinctrl_leds1>;
53 compatible = "gpio-leds";
55 green-led {
56 label = "green-led";
58 default-state = "on";
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H A Dimx6qdl-savageboard.dtsi4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/gpio/gpio.h>
44 #include <dt-bindings/input/input.h>
48 stdout-path = &uart1;
56 gpio-keys {
57 compatible = "gpio-keys";
58 pinctrl-names = "default";
59 pinctrl-0 = <&pinctrl_gpio_keys>;
65 wakeup-source;
72 power-supply = <&reg_3p3v>;
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H A Dimx6dl-lanmcu.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/leds/common.h>
17 stdout-path = &uart4;
20 clock_ksz8081: clock-ksz8081 {
21 compatible = "fixed-clock";
22 #clock-cells = <0>;
23 clock-frequency = <50000000>;
24 clock-output-names = "enet_ref_pad";
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H A Dimx6dl-alti6p.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/sound/fsl-imx-audmux.h>
18 stdout-path = &uart4;
21 clock_ksz8081: clock-ksz8081 {
22 compatible = "fixed-clock";
23 #clock-cells = <0>;
24 clock-frequency = <50000000>;
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H A Dimx6qdl-dhcom-pdk2.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2015-2021 DH electronics GmbH
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/pwm/pwm.h>
14 stdout-path = "serial0:115200n8";
17 clk_ext_audio_codec: clock-codec {
18 #clock-cells = <0>;
19 clock-frequency = <24000000>;
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H A Dimx6dl-plym2m.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/leds/common.h>
17 stdout-path = &uart4;
21 compatible = "pwm-backlight";
23 brightness-levels = <0 1000>;
24 num-interpolated-steps = <20>;
25 default-brightness-level = <19>;
26 power-supply = <&reg_12v0>;
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H A Dimx6qdl-dhcom-som.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2015-2021 DH electronics GmbH
7 #include <dt-bindings/pwm/pwm.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/clock/imx6qdl-clock.h>
10 #include <dt-bindings/input/input.h>
30 memory@10000000 { /* Appropriate memory size will be filled by U-Boot */
35 reg_3p3v: regulator-3P3V {
36 compatible = "regulator-fixed";
37 regulator-always-on;
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H A Dimx6qdl-zii-rdu2.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 * Copyright (C) 2016-2017 Zodiac Inflight Innovations
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/sound/fsl-imx-audmux.h>
11 stdout-path = &uart1;
15 mdio-gpio0 = &mdio1;
20 compatible = "virtual,mdio-gpio";
21 #address-cells = <1>;
22 #size-cells = <0>;
23 pinctrl-names = "default";
[all …]
H A Dimx51-zii-rdu1.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/sound/fsl-imx-audmux.h>
12 compatible = "zii,imx51-rdu1", "fsl,imx51";
15 stdout-path = &uart1;
25 mdio-gpio0 = &mdio_gpio;
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <26000000>;
36 compatible = "gpio-gate-clock";
[all …]
H A Dimx6dl-prtmvt.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 /dts-v1/;
8 #include <dt-bindings/display/sdtv-standards.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/leds/common.h>
12 #include <dt-bindings/media/tvp5150.h>
13 #include <dt-bindings/sound/fsl-imx-audmux.h>
21 stdout-path = &uart4;
25 compatible = "pwm-backlight";
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dimx93-var-som-symphony.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
9 #include <dt-bindings/leds/common.h>
10 #include "imx93-var-som.dtsi"
13 model = "Variscite VAR-SOM-MX93 on Symphony evaluation board";
14 compatible = "variscite,var-som-mx93-symphony",
15 "variscite,var-som-mx93", "fsl,imx93";
19 ethernet1 = &fec;
23 stdout-path = &lpuart1;
29 reg_fec_phy: regulator-fec-phy {
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H A Dimx8mp-dhcom-pdk2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * DHCM-iMX8ML8-C160-R409-F1638-SPI16-GE-CAN2-SD-RTC-WBTA-ADC-T-RGB-CSI2-HS-I-01D2
7 * DHCOM PCB number: 660-100 or newer
8 * PDK2 PCB number: 516-400 or newer
11 /dts-v1/;
13 #include <dt-bindings/leds/common.h>
14 #include <dt-bindings/phy/phy-imx8-pcie.h>
15 #include "imx8mp-dhcom-som.dtsi"
19 compatible = "dh,imx8mp-dhcom-pdk2", "dh,imx8mp-dhcom-som",
23 stdout-path = &uart1;
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H A Dimx8mp-dhcom-som.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2021-2022 Marek Vasut <marex@denx.de>
10 compatible = "dh,imx8mp-dhcom-som", "fsl,imx8mp";
14 ethernet1 = &fec;
22 /* Memory size 512 MiB..8 GiB will be filled by U-Boot */
26 reg_eth_vio: regulator-eth-vio {
27 compatible = "regulator-fixed";
29 regulator-always-on;
30 regulator-boot-on;
31 regulator-min-microvolt = <3300000>;
[all …]
H A Dimx8mp-dhcom-pdk3.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * DHCM-iMX8ML8-C160-R409-F1638-SPI16-GE-CAN2-SD-RTC-WBTA-ADC-T-RGB-CSI2-HS-I-01D2
7 * DHCOM PCB number: 660-100 or newer
8 * PDK3 PCB number: 669-100 or newer
11 /dts-v1/;
13 #include <dt-bindings/leds/common.h>
14 #include <dt-bindings/phy/phy-imx8-pcie.h>
15 #include "imx8mp-dhcom-som.dtsi"
19 compatible = "dh,imx8mp-dhcom-pdk3", "dh,imx8mp-dhcom-som",
23 stdout-path = &uart1;
[all …]
H A Dimx8mp-data-modul-edm-sbc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/net/qca-ar803x.h>
9 #include <dt-bindings/phy/phy-imx8-pcie.h>
14 compatible = "dmo,imx8mp-data-modul-edm-sbc", "fsl,imx8mp";
22 stdout-path = &uart3;
27 /* There are 1/2/4 GiB options, adjusted by bootloader. */
32 compatible = "pwm-backlight";
33 pinctrl-names = "default";
34 pinctrl-0 = <&pinctrl_panel_backlight>;
[all …]
/linux/drivers/misc/
H A Dxilinx_sdfec.c1 // SPDX-License-Identifier: GPL-2.0
8 * This driver is developed for SDFEC16 (Soft Decision FEC 16nm)
65 /* Write Only - Interrupt Enable Register */
67 /* Write Only - Interrupt Disable Register */
69 /* Read Only - Interrupt Mask Register */
101 /* Write Only - ECC Interrupt Enable Register */
103 /* Write Only - ECC Interrupt Disable Register */
105 /* Read Only - ECC Interrupt Mask Register */
143 #define XSDFEC_REG2_NLAYERS_MIN (1)
166 #define MAX_NUM_PAGES ((XSDFEC_QC_TABLE_DEPTH / PAGE_SIZE) + 1)
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/linux/drivers/media/platform/st/stm32/
H A Dstm32-dcmi.c1 // SPDX-License-Identifier: GPL-2.0
30 #include <media/v4l2-ctrls.h>
31 #include <media/v4l2-dev.h>
32 #include <media/v4l2-device.h>
33 #include <media/v4l2-event.h>
34 #include <media/v4l2-fwnode.h>
35 #include <media/v4l2-image-sizes.h>
36 #include <media/v4l2-ioctl.h>
37 #include <media/v4l2-rect.h>
38 #include <media/videobuf2-dma-contig.h>
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