xref: /linux/arch/arm/boot/dts/nxp/imx/imx6dl-lanmcu.dts (revision cdd5b5a9761fd66d17586e4f4ba6588c70e640ea)
1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-or-later
2*724ba675SRob Herring/*
3*724ba675SRob Herring * Copyright (c) 2019 Protonic Holland
4*724ba675SRob Herring * Copyright (c) 2020 Oleksij Rempel <kernel@pengutronix.de>, Pengutronix
5*724ba675SRob Herring */
6*724ba675SRob Herring
7*724ba675SRob Herring/dts-v1/;
8*724ba675SRob Herring#include <dt-bindings/gpio/gpio.h>
9*724ba675SRob Herring#include <dt-bindings/leds/common.h>
10*724ba675SRob Herring#include "imx6dl.dtsi"
11*724ba675SRob Herring
12*724ba675SRob Herring/ {
13*724ba675SRob Herring	model = "Van der Laan LANMCU";
14*724ba675SRob Herring	compatible = "vdl,lanmcu", "fsl,imx6dl";
15*724ba675SRob Herring
16*724ba675SRob Herring	chosen {
17*724ba675SRob Herring		stdout-path = &uart4;
18*724ba675SRob Herring	};
19*724ba675SRob Herring
20*724ba675SRob Herring	clock_ksz8081: clock-ksz8081 {
21*724ba675SRob Herring		compatible = "fixed-clock";
22*724ba675SRob Herring		#clock-cells = <0>;
23*724ba675SRob Herring		clock-frequency = <50000000>;
24*724ba675SRob Herring		clock-output-names = "enet_ref_pad";
25*724ba675SRob Herring	};
26*724ba675SRob Herring
27*724ba675SRob Herring	backlight: backlight {
28*724ba675SRob Herring		compatible = "pwm-backlight";
29*724ba675SRob Herring		pwms = <&pwm1 0 5000000 0>;
30*724ba675SRob Herring		brightness-levels = <0 1000>;
31*724ba675SRob Herring		num-interpolated-steps = <20>;
32*724ba675SRob Herring		default-brightness-level = <19>;
33*724ba675SRob Herring	};
34*724ba675SRob Herring
35*724ba675SRob Herring	display {
36*724ba675SRob Herring		compatible = "fsl,imx-parallel-display";
37*724ba675SRob Herring		pinctrl-0 = <&pinctrl_ipu1_disp>;
38*724ba675SRob Herring		pinctrl-names = "default";
39*724ba675SRob Herring		#address-cells = <1>;
40*724ba675SRob Herring		#size-cells = <0>;
41*724ba675SRob Herring
42*724ba675SRob Herring		port@0 {
43*724ba675SRob Herring			reg = <0>;
44*724ba675SRob Herring
45*724ba675SRob Herring			display_in: endpoint {
46*724ba675SRob Herring				remote-endpoint = <&ipu1_di0_disp0>;
47*724ba675SRob Herring			};
48*724ba675SRob Herring		};
49*724ba675SRob Herring
50*724ba675SRob Herring		port@1 {
51*724ba675SRob Herring			reg = <1>;
52*724ba675SRob Herring
53*724ba675SRob Herring			display_out: endpoint {
54*724ba675SRob Herring				remote-endpoint = <&panel_in>;
55*724ba675SRob Herring			};
56*724ba675SRob Herring		};
57*724ba675SRob Herring	};
58*724ba675SRob Herring
59*724ba675SRob Herring	leds {
60*724ba675SRob Herring		compatible = "gpio-leds";
61*724ba675SRob Herring		pinctrl-names = "default";
62*724ba675SRob Herring		pinctrl-0 = <&pinctrl_leds>;
63*724ba675SRob Herring
64*724ba675SRob Herring		led-0 {
65*724ba675SRob Herring			label = "debug0";
66*724ba675SRob Herring			function = LED_FUNCTION_STATUS;
67*724ba675SRob Herring			gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
68*724ba675SRob Herring			linux,default-trigger = "heartbeat";
69*724ba675SRob Herring		};
70*724ba675SRob Herring	};
71*724ba675SRob Herring
72*724ba675SRob Herring	panel {
73*724ba675SRob Herring		compatible = "edt,etm0700g0bdh6";
74*724ba675SRob Herring		backlight = <&backlight>;
75*724ba675SRob Herring
76*724ba675SRob Herring		port {
77*724ba675SRob Herring			panel_in: endpoint {
78*724ba675SRob Herring				remote-endpoint = <&display_out>;
79*724ba675SRob Herring			};
80*724ba675SRob Herring		};
81*724ba675SRob Herring	};
82*724ba675SRob Herring
83*724ba675SRob Herring	reg_otg_vbus: regulator-otg-vbus {
84*724ba675SRob Herring		compatible = "regulator-fixed";
85*724ba675SRob Herring		regulator-name = "otg-vbus";
86*724ba675SRob Herring		regulator-min-microvolt = <5000000>;
87*724ba675SRob Herring		regulator-max-microvolt = <5000000>;
88*724ba675SRob Herring		gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>;
89*724ba675SRob Herring		enable-active-high;
90*724ba675SRob Herring	};
91*724ba675SRob Herring
92*724ba675SRob Herring	usdhc2_wifi_pwrseq: usdhc2-wifi-pwrseq {
93*724ba675SRob Herring		compatible = "mmc-pwrseq-simple";
94*724ba675SRob Herring		pinctrl-names = "default";
95*724ba675SRob Herring		pinctrl-0 = <&pinctrl_wifi_npd>;
96*724ba675SRob Herring		reset-gpios = <&gpio6 10 GPIO_ACTIVE_LOW>;
97*724ba675SRob Herring	};
98*724ba675SRob Herring
99*724ba675SRob Herring};
100*724ba675SRob Herring
101*724ba675SRob Herring&can1 {
102*724ba675SRob Herring	pinctrl-names = "default";
103*724ba675SRob Herring	pinctrl-0 = <&pinctrl_can1>;
104*724ba675SRob Herring	status = "okay";
105*724ba675SRob Herring};
106*724ba675SRob Herring
107*724ba675SRob Herring&can2 {
108*724ba675SRob Herring	pinctrl-names = "default";
109*724ba675SRob Herring	pinctrl-0 = <&pinctrl_can2>;
110*724ba675SRob Herring	status = "okay";
111*724ba675SRob Herring};
112*724ba675SRob Herring
113*724ba675SRob Herring&clks {
114*724ba675SRob Herring	clocks = <&clock_ksz8081>;
115*724ba675SRob Herring	clock-names = "enet_ref_pad";
116*724ba675SRob Herring	assigned-clocks = <&clks IMX6QDL_CLK_ENET_REF_SEL>;
117*724ba675SRob Herring	assigned-clock-parents = <&clock_ksz8081>;
118*724ba675SRob Herring};
119*724ba675SRob Herring
120*724ba675SRob Herring&fec {
121*724ba675SRob Herring	pinctrl-names = "default";
122*724ba675SRob Herring	pinctrl-0 = <&pinctrl_enet>;
123*724ba675SRob Herring	phy-mode = "rmii";
124*724ba675SRob Herring	phy-handle = <&rgmii_phy>;
125*724ba675SRob Herring	status = "okay";
126*724ba675SRob Herring
127*724ba675SRob Herring	mdio {
128*724ba675SRob Herring		#address-cells = <1>;
129*724ba675SRob Herring		#size-cells = <0>;
130*724ba675SRob Herring
131*724ba675SRob Herring		/* Microchip KSZ8081RNA PHY */
132*724ba675SRob Herring		rgmii_phy: ethernet-phy@0 {
133*724ba675SRob Herring			reg = <0>;
134*724ba675SRob Herring			interrupts-extended = <&gpio5 23 IRQ_TYPE_LEVEL_LOW>;
135*724ba675SRob Herring			reset-gpios = <&gpio5 22 GPIO_ACTIVE_LOW>;
136*724ba675SRob Herring			reset-assert-us = <10000>;
137*724ba675SRob Herring			reset-deassert-us = <300>;
138*724ba675SRob Herring		};
139*724ba675SRob Herring	};
140*724ba675SRob Herring};
141*724ba675SRob Herring
142*724ba675SRob Herring&gpio1 {
143*724ba675SRob Herring	gpio-line-names =
144*724ba675SRob Herring		"", "SD1_CD", "", "", "", "", "", "",
145*724ba675SRob Herring		"DEBUG_0", "BL_PWM", "", "", "", "", "", "",
146*724ba675SRob Herring		"", "", "", "", "", "", "", "ENET_LED_GREEN",
147*724ba675SRob Herring		"", "", "", "", "", "", "", "";
148*724ba675SRob Herring};
149*724ba675SRob Herring
150*724ba675SRob Herring&gpio3 {
151*724ba675SRob Herring	gpio-line-names =
152*724ba675SRob Herring		"", "", "", "", "", "", "", "",
153*724ba675SRob Herring		"", "", "", "", "", "", "", "",
154*724ba675SRob Herring		"", "", "", "", "TS_INT", "USB_OTG1_OC", "USB_OTG1_PWR", "",
155*724ba675SRob Herring		"", "", "", "", "UART2_CTS", "", "UART3_CTS", "";
156*724ba675SRob Herring};
157*724ba675SRob Herring
158*724ba675SRob Herring&gpio5 {
159*724ba675SRob Herring	gpio-line-names =
160*724ba675SRob Herring		"", "", "", "", "", "", "", "",
161*724ba675SRob Herring		"", "", "", "", "", "", "", "",
162*724ba675SRob Herring		"", "", "", "", "", "", "ENET_RST", "ENET_INT",
163*724ba675SRob Herring		"", "", "I2C1_SDA", "I2C1_SCL", "", "", "", "";
164*724ba675SRob Herring};
165*724ba675SRob Herring
166*724ba675SRob Herring&gpio6 {
167*724ba675SRob Herring	gpio-line-names =
168*724ba675SRob Herring		"", "", "", "", "", "", "", "",
169*724ba675SRob Herring		"", "", "WLAN_REG_ON", "", "", "", "", "",
170*724ba675SRob Herring		"", "", "", "", "", "", "", "",
171*724ba675SRob Herring		"", "", "", "", "", "", "", "";
172*724ba675SRob Herring};
173*724ba675SRob Herring
174*724ba675SRob Herring&gpio7 {
175*724ba675SRob Herring	gpio-line-names =
176*724ba675SRob Herring		"", "", "", "", "", "", "", "",
177*724ba675SRob Herring		"EMMC_RST", "", "", "", "", "", "", "",
178*724ba675SRob Herring		"", "", "", "", "", "", "", "",
179*724ba675SRob Herring		"", "", "", "", "", "", "", "";
180*724ba675SRob Herring};
181*724ba675SRob Herring
182*724ba675SRob Herring&i2c1 {
183*724ba675SRob Herring	clock-frequency = <100000>;
184*724ba675SRob Herring	pinctrl-names = "default";
185*724ba675SRob Herring	pinctrl-0 = <&pinctrl_i2c1>;
186*724ba675SRob Herring	status = "okay";
187*724ba675SRob Herring
188*724ba675SRob Herring	/* additional i2c devices are added automatically by the boot loader */
189*724ba675SRob Herring};
190*724ba675SRob Herring
191*724ba675SRob Herring&i2c3 {
192*724ba675SRob Herring	clock-frequency = <100000>;
193*724ba675SRob Herring	pinctrl-names = "default";
194*724ba675SRob Herring	pinctrl-0 = <&pinctrl_i2c3>;
195*724ba675SRob Herring	status = "okay";
196*724ba675SRob Herring
197*724ba675SRob Herring	touchscreen@38 {
198*724ba675SRob Herring		compatible = "edt,edt-ft5406";
199*724ba675SRob Herring		reg = <0x38>;
200*724ba675SRob Herring		pinctrl-names = "default";
201*724ba675SRob Herring		pinctrl-0 = <&pinctrl_ts_edt>;
202*724ba675SRob Herring		interrupts-extended = <&gpio3 20 IRQ_TYPE_EDGE_FALLING>;
203*724ba675SRob Herring
204*724ba675SRob Herring		touchscreen-size-x = <1792>;
205*724ba675SRob Herring		touchscreen-size-y = <1024>;
206*724ba675SRob Herring
207*724ba675SRob Herring		touchscreen-fuzz-x = <0>;
208*724ba675SRob Herring		touchscreen-fuzz-y = <0>;
209*724ba675SRob Herring
210*724ba675SRob Herring		/* Touch screen calibration */
211*724ba675SRob Herring		threshold = <50>;
212*724ba675SRob Herring		gain = <5>;
213*724ba675SRob Herring		offset = <10>;
214*724ba675SRob Herring	};
215*724ba675SRob Herring
216*724ba675SRob Herring	rtc@51 {
217*724ba675SRob Herring		compatible = "nxp,pcf8563";
218*724ba675SRob Herring		reg = <0x51>;
219*724ba675SRob Herring	};
220*724ba675SRob Herring};
221*724ba675SRob Herring
222*724ba675SRob Herring&ipu1_di0_disp0 {
223*724ba675SRob Herring	remote-endpoint = <&display_in>;
224*724ba675SRob Herring};
225*724ba675SRob Herring
226*724ba675SRob Herring&pwm1 {
227*724ba675SRob Herring	pinctrl-names = "default";
228*724ba675SRob Herring	pinctrl-0 = <&pinctrl_pwm1>;
229*724ba675SRob Herring	status = "okay";
230*724ba675SRob Herring};
231*724ba675SRob Herring
232*724ba675SRob Herring&uart2 {
233*724ba675SRob Herring	pinctrl-names = "default";
234*724ba675SRob Herring	pinctrl-0 = <&pinctrl_uart2>;
235*724ba675SRob Herring	linux,rs485-enabled-at-boot-time;
236*724ba675SRob Herring	uart-has-rtscts;
237*724ba675SRob Herring	status = "okay";
238*724ba675SRob Herring};
239*724ba675SRob Herring
240*724ba675SRob Herring&uart3 {
241*724ba675SRob Herring	pinctrl-names = "default";
242*724ba675SRob Herring	pinctrl-0 = <&pinctrl_uart3>;
243*724ba675SRob Herring	linux,rs485-enabled-at-boot-time;
244*724ba675SRob Herring	uart-has-rtscts;
245*724ba675SRob Herring	status = "okay";
246*724ba675SRob Herring};
247*724ba675SRob Herring
248*724ba675SRob Herring&uart4 {
249*724ba675SRob Herring	pinctrl-names = "default";
250*724ba675SRob Herring	pinctrl-0 = <&pinctrl_uart4>;
251*724ba675SRob Herring	status = "okay";
252*724ba675SRob Herring};
253*724ba675SRob Herring
254*724ba675SRob Herring&usbotg {
255*724ba675SRob Herring	vbus-supply = <&reg_otg_vbus>;
256*724ba675SRob Herring	pinctrl-names = "default";
257*724ba675SRob Herring	pinctrl-0 = <&pinctrl_usbotg>;
258*724ba675SRob Herring	phy_type = "utmi";
259*724ba675SRob Herring	dr_mode = "host";
260*724ba675SRob Herring	over-current-active-low;
261*724ba675SRob Herring	status = "okay";
262*724ba675SRob Herring};
263*724ba675SRob Herring
264*724ba675SRob Herring&usbphynop1 {
265*724ba675SRob Herring	status = "disabled";
266*724ba675SRob Herring};
267*724ba675SRob Herring
268*724ba675SRob Herring&usbphynop2 {
269*724ba675SRob Herring	status = "disabled";
270*724ba675SRob Herring};
271*724ba675SRob Herring
272*724ba675SRob Herring&usdhc1 {
273*724ba675SRob Herring	pinctrl-names = "default";
274*724ba675SRob Herring	pinctrl-0 = <&pinctrl_usdhc1>;
275*724ba675SRob Herring	cd-gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
276*724ba675SRob Herring	no-1-8-v;
277*724ba675SRob Herring	disable-wp;
278*724ba675SRob Herring	cap-sd-highspeed;
279*724ba675SRob Herring	no-mmc;
280*724ba675SRob Herring	no-sdio;
281*724ba675SRob Herring	status = "okay";
282*724ba675SRob Herring};
283*724ba675SRob Herring
284*724ba675SRob Herring&usdhc2 {
285*724ba675SRob Herring	pinctrl-names = "default";
286*724ba675SRob Herring	pinctrl-0 = <&pinctrl_usdhc2>;
287*724ba675SRob Herring	no-1-8-v;
288*724ba675SRob Herring	non-removable;
289*724ba675SRob Herring	mmc-pwrseq = <&usdhc2_wifi_pwrseq>;
290*724ba675SRob Herring	#address-cells = <1>;
291*724ba675SRob Herring	#size-cells = <0>;
292*724ba675SRob Herring	status = "okay";
293*724ba675SRob Herring
294*724ba675SRob Herring	wifi@1 {
295*724ba675SRob Herring		reg = <1>;
296*724ba675SRob Herring		compatible = "brcm,bcm4329-fmac";
297*724ba675SRob Herring	};
298*724ba675SRob Herring};
299*724ba675SRob Herring
300*724ba675SRob Herring&usdhc3 {
301*724ba675SRob Herring	pinctrl-names = "default";
302*724ba675SRob Herring	pinctrl-0 = <&pinctrl_usdhc3>;
303*724ba675SRob Herring	bus-width = <8>;
304*724ba675SRob Herring	no-1-8-v;
305*724ba675SRob Herring	non-removable;
306*724ba675SRob Herring	no-sd;
307*724ba675SRob Herring	no-sdio;
308*724ba675SRob Herring	status = "okay";
309*724ba675SRob Herring};
310*724ba675SRob Herring
311*724ba675SRob Herring&iomuxc {
312*724ba675SRob Herring	pinctrl_can1: can1grp {
313*724ba675SRob Herring		fsl,pins = <
314*724ba675SRob Herring			MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX		0x1b000
315*724ba675SRob Herring			MX6QDL_PAD_KEY_COL2__FLEXCAN1_TX		0x3008
316*724ba675SRob Herring		>;
317*724ba675SRob Herring	};
318*724ba675SRob Herring
319*724ba675SRob Herring	pinctrl_can2: can2grp {
320*724ba675SRob Herring		fsl,pins = <
321*724ba675SRob Herring			MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX		0x1b000
322*724ba675SRob Herring			MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX		0x3008
323*724ba675SRob Herring		>;
324*724ba675SRob Herring	};
325*724ba675SRob Herring
326*724ba675SRob Herring	pinctrl_enet: enetgrp {
327*724ba675SRob Herring		fsl,pins = <
328*724ba675SRob Herring			/* MX6QDL_ENET_PINGRP4 */
329*724ba675SRob Herring			MX6QDL_PAD_ENET_MDC__ENET_MDC			0x1b0b0
330*724ba675SRob Herring			MX6QDL_PAD_ENET_MDIO__ENET_MDIO			0x1b0b0
331*724ba675SRob Herring			MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0		0x1b0b0
332*724ba675SRob Herring			MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1		0x1b0b0
333*724ba675SRob Herring			MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER		0x1b0b0
334*724ba675SRob Herring			MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN		0x1b0b0
335*724ba675SRob Herring			MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0		0x1b0b0
336*724ba675SRob Herring			MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1		0x1b0b0
337*724ba675SRob Herring			MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN		0x1b0b0
338*724ba675SRob Herring
339*724ba675SRob Herring			MX6QDL_PAD_GPIO_16__ENET_REF_CLK		0x1b0b0
340*724ba675SRob Herring			/* Phy reset */
341*724ba675SRob Herring			MX6QDL_PAD_CSI0_DAT4__GPIO5_IO22		0x1b0b0
342*724ba675SRob Herring			/* nINTRP */
343*724ba675SRob Herring			MX6QDL_PAD_CSI0_DAT5__GPIO5_IO23		0x1b0b0
344*724ba675SRob Herring		>;
345*724ba675SRob Herring	};
346*724ba675SRob Herring
347*724ba675SRob Herring	pinctrl_i2c1: i2c1grp {
348*724ba675SRob Herring		fsl,pins = <
349*724ba675SRob Herring			MX6QDL_PAD_CSI0_DAT8__I2C1_SDA			0x4001f8b1
350*724ba675SRob Herring			MX6QDL_PAD_CSI0_DAT9__I2C1_SCL			0x4001f8b1
351*724ba675SRob Herring		>;
352*724ba675SRob Herring	};
353*724ba675SRob Herring
354*724ba675SRob Herring	pinctrl_i2c3: i2c3grp {
355*724ba675SRob Herring		fsl,pins = <
356*724ba675SRob Herring			MX6QDL_PAD_GPIO_5__I2C3_SCL			0x4001b8b1
357*724ba675SRob Herring			MX6QDL_PAD_GPIO_6__I2C3_SDA			0x4001b8b1
358*724ba675SRob Herring		>;
359*724ba675SRob Herring	};
360*724ba675SRob Herring
361*724ba675SRob Herring	pinctrl_ipu1_disp: ipudisp1grp {
362*724ba675SRob Herring		fsl,pins = <
363*724ba675SRob Herring			/* DSE 0x30 => 25 Ohm, 0x20 => 37 Ohm, 0x10 => 75 Ohm */
364*724ba675SRob Herring			MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK	0x30
365*724ba675SRob Herring			MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02		0x30
366*724ba675SRob Herring			MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03		0x30
367*724ba675SRob Herring			MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15		0x30
368*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00	0x30
369*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01	0x30
370*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02	0x30
371*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03	0x30
372*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04	0x30
373*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05	0x30
374*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06	0x30
375*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07	0x30
376*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08	0x30
377*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09	0x30
378*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10	0x30
379*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11	0x30
380*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12	0x30
381*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13	0x30
382*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14	0x30
383*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15	0x30
384*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16	0x30
385*724ba675SRob Herring			MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17	0x30
386*724ba675SRob Herring		>;
387*724ba675SRob Herring	};
388*724ba675SRob Herring
389*724ba675SRob Herring	pinctrl_leds: ledsgrp {
390*724ba675SRob Herring		fsl,pins = <
391*724ba675SRob Herring			MX6QDL_PAD_GPIO_8__GPIO1_IO08			0x1b0b0
392*724ba675SRob Herring		>;
393*724ba675SRob Herring	};
394*724ba675SRob Herring
395*724ba675SRob Herring	pinctrl_pwm1: pwm1grp {
396*724ba675SRob Herring		fsl,pins = <
397*724ba675SRob Herring			MX6QDL_PAD_GPIO_9__PWM1_OUT			0x8
398*724ba675SRob Herring		>;
399*724ba675SRob Herring	};
400*724ba675SRob Herring
401*724ba675SRob Herring	pinctrl_ts_edt: ts1grp {
402*724ba675SRob Herring		fsl,pins = <
403*724ba675SRob Herring			MX6QDL_PAD_EIM_D20__GPIO3_IO20			0x1b0b0
404*724ba675SRob Herring		>;
405*724ba675SRob Herring	};
406*724ba675SRob Herring
407*724ba675SRob Herring	pinctrl_uart2: uart2grp {
408*724ba675SRob Herring		fsl,pins = <
409*724ba675SRob Herring			MX6QDL_PAD_EIM_D26__UART2_RX_DATA		0x1b0b1
410*724ba675SRob Herring			MX6QDL_PAD_EIM_D27__UART2_TX_DATA		0x1b0b1
411*724ba675SRob Herring			MX6QDL_PAD_EIM_D28__UART2_CTS_B			0x130b1
412*724ba675SRob Herring		>;
413*724ba675SRob Herring	};
414*724ba675SRob Herring
415*724ba675SRob Herring	pinctrl_uart3: uart3grp {
416*724ba675SRob Herring		fsl,pins = <
417*724ba675SRob Herring			MX6QDL_PAD_EIM_D24__UART3_TX_DATA		0x1b0b1
418*724ba675SRob Herring			MX6QDL_PAD_EIM_D25__UART3_RX_DATA		0x1b0b1
419*724ba675SRob Herring			MX6QDL_PAD_EIM_D30__UART3_CTS_B			0x130b1
420*724ba675SRob Herring		>;
421*724ba675SRob Herring	};
422*724ba675SRob Herring
423*724ba675SRob Herring	pinctrl_uart4: uart4grp {
424*724ba675SRob Herring		fsl,pins = <
425*724ba675SRob Herring			MX6QDL_PAD_KEY_COL0__UART4_TX_DATA		0x1b0b1
426*724ba675SRob Herring			MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA		0x1b0b1
427*724ba675SRob Herring		>;
428*724ba675SRob Herring	};
429*724ba675SRob Herring
430*724ba675SRob Herring	pinctrl_usbotg: usbotggrp {
431*724ba675SRob Herring		fsl,pins = <
432*724ba675SRob Herring			MX6QDL_PAD_EIM_D21__USB_OTG_OC			0x1b0b0
433*724ba675SRob Herring			/* power enable, high active */
434*724ba675SRob Herring			MX6QDL_PAD_EIM_D22__GPIO3_IO22			0x1b0b0
435*724ba675SRob Herring		>;
436*724ba675SRob Herring	};
437*724ba675SRob Herring
438*724ba675SRob Herring	pinctrl_usdhc1: usdhc1grp {
439*724ba675SRob Herring		fsl,pins = <
440*724ba675SRob Herring			MX6QDL_PAD_SD1_CMD__SD1_CMD			0x170f9
441*724ba675SRob Herring			MX6QDL_PAD_SD1_CLK__SD1_CLK			0x100f9
442*724ba675SRob Herring			MX6QDL_PAD_SD1_DAT0__SD1_DATA0			0x170f9
443*724ba675SRob Herring			MX6QDL_PAD_SD1_DAT1__SD1_DATA1			0x170f9
444*724ba675SRob Herring			MX6QDL_PAD_SD1_DAT2__SD1_DATA2			0x170f9
445*724ba675SRob Herring			MX6QDL_PAD_SD1_DAT3__SD1_DATA3			0x170f9
446*724ba675SRob Herring			MX6QDL_PAD_GPIO_1__SD1_CD_B			0x1b0b0
447*724ba675SRob Herring		>;
448*724ba675SRob Herring	};
449*724ba675SRob Herring
450*724ba675SRob Herring	pinctrl_usdhc2: usdhc2grp {
451*724ba675SRob Herring		fsl,pins = <
452*724ba675SRob Herring			MX6QDL_PAD_SD2_CMD__SD2_CMD			0x170b9
453*724ba675SRob Herring			MX6QDL_PAD_SD2_CLK__SD2_CLK			0x100b9
454*724ba675SRob Herring			MX6QDL_PAD_SD2_DAT0__SD2_DATA0			0x170b9
455*724ba675SRob Herring			MX6QDL_PAD_SD2_DAT1__SD2_DATA1			0x170b9
456*724ba675SRob Herring			MX6QDL_PAD_SD2_DAT2__SD2_DATA2			0x170b9
457*724ba675SRob Herring			MX6QDL_PAD_SD2_DAT3__SD2_DATA3			0x170b9
458*724ba675SRob Herring		>;
459*724ba675SRob Herring	};
460*724ba675SRob Herring
461*724ba675SRob Herring	pinctrl_usdhc3: usdhc3grp {
462*724ba675SRob Herring		fsl,pins = <
463*724ba675SRob Herring			MX6QDL_PAD_SD3_CMD__SD3_CMD			0x17099
464*724ba675SRob Herring			MX6QDL_PAD_SD3_CLK__SD3_CLK			0x10099
465*724ba675SRob Herring			MX6QDL_PAD_SD3_DAT0__SD3_DATA0			0x17099
466*724ba675SRob Herring			MX6QDL_PAD_SD3_DAT1__SD3_DATA1			0x17099
467*724ba675SRob Herring			MX6QDL_PAD_SD3_DAT2__SD3_DATA2			0x17099
468*724ba675SRob Herring			MX6QDL_PAD_SD3_DAT3__SD3_DATA3			0x17099
469*724ba675SRob Herring			MX6QDL_PAD_SD3_DAT4__SD3_DATA4			0x17099
470*724ba675SRob Herring			MX6QDL_PAD_SD3_DAT5__SD3_DATA5			0x17099
471*724ba675SRob Herring			MX6QDL_PAD_SD3_DAT6__SD3_DATA6			0x17099
472*724ba675SRob Herring			MX6QDL_PAD_SD3_DAT7__SD3_DATA7			0x17099
473*724ba675SRob Herring			MX6QDL_PAD_SD3_RST__SD3_RESET			0x1b0b1
474*724ba675SRob Herring		>;
475*724ba675SRob Herring	};
476*724ba675SRob Herring
477*724ba675SRob Herring	pinctrl_wifi_npd: wifigrp {
478*724ba675SRob Herring		fsl,pins = <
479*724ba675SRob Herring			/* WL_REG_ON */
480*724ba675SRob Herring			MX6QDL_PAD_NANDF_RB0__GPIO6_IO10		0x13069
481*724ba675SRob Herring		>;
482*724ba675SRob Herring	};
483*724ba675SRob Herring};
484