/linux/Documentation/devicetree/bindings/power/ |
H A D | fsl,scu-pd.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/power/fsl,scu-pd.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: i.MX SCU Client Device Node - Power Domain Based on SCU Message Protocol 10 - Dong Aisheng <aisheng.dong@nxp.com> 12 description: i.MX SCU Client Device Node 13 Client nodes are maintained as children of the relevant IMX-SCU device node. 14 Power domain bindings based on SCU Message Protocol 17 - $ref: power-domain.yaml# [all …]
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/linux/Documentation/devicetree/bindings/firmware/ |
H A D | fsl,scu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/firmware/fsl,scu.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Dong Aisheng <aisheng.dong@nxp.com> 13 The System Controller Firmware (SCFW) is a low-level system function 14 which runs on a dedicated Cortex-M core to provide power, clock, and 17 The AP communicates with the SC using a multi-ported MU module found 26 const: fsl,imx-scu 28 clock-controller: [all …]
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/linux/drivers/pmdomain/imx/ |
H A D | scu-pd.c | 1 // SPDX-License-Identifier: GPL-2.0+ 4 * Copyright 2017-2018 NXP 7 * Implementation of the SCU based Power Domains 10 * single global power domain and implement the ->attach|detach_dev() 12 * From within the ->attach_dev(), we could get the OF node for 13 * the device that is being attached and then parse the power-domain 18 * Additionally, we need to implement the ->stop() and ->start() 20 * rather than using the above ->power_on|off() callbacks. 23 * 1. The ->attach_dev() of power domain infrastructure still does 25 * in is a virtual PD device, it does not help for parsing the real [all …]
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H A D | Makefile | 1 # SPDX-License-Identifier: GPL-2.0-only 2 obj-$(CONFIG_HAVE_IMX_GPC) += gpc.o 3 obj-$(CONFIG_IMX_GPCV2_PM_DOMAINS) += gpcv2.o 4 obj-$(CONFIG_IMX_SCU_PD) += scu-pd.o 5 obj-$(CONFIG_IMX8M_BLK_CTRL) += imx8m-blk-ctrl.o 6 obj-$(CONFIG_IMX8M_BLK_CTRL) += imx8mp-blk-ctrl.o 7 obj-$(CONFIG_SOC_IMX9) += imx93-pd.o 8 obj-$(CONFIG_IMX9_BLK_CTRL) += imx93-blk-ctrl.o
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/linux/arch/arm/mach-rockchip/ |
H A D | platsmp.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later 38 static int pmu_power_domain_is_on(int pd) in pmu_power_domain_is_on() argument 47 return !(val & BIT(pd)); in pmu_power_domain_is_on() 57 np = dev->of_node; in rockchip_get_core_reset() 64 static int pmu_set_power_domain(int pd, bool on) in pmu_set_power_domain() argument 66 u32 val = (on) ? 0 : BIT(pd); in pmu_set_power_domain() 67 struct reset_control *rstc = rockchip_get_core_reset(pd); in pmu_set_power_domain() 72 __func__, pd); in pmu_set_power_domain() 85 ret = regmap_update_bits(pmu, PMU_PWRDN_CON, BIT(pd), val); in pmu_set_power_domain() 92 ret = -1; in pmu_set_power_domain() [all …]
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/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx8qm.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright 2018-2019 NXP 7 #include <dt-bindings/clock/imx8-lpcg.h> 8 #include <dt-bindings/firmware/imx/rsrc.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/pinctrl/pads-imx8qm.h> 12 #include <dt-bindings/thermal/thermal.h> 15 interrupt-parent = <&gic>; 16 #address-cells = <2>; [all …]
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H A D | imx8-ss-dma.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright 2018-2019 NXP 7 #include <dt-bindings/clock/imx8-lpcg.h> 8 #include <dt-bindings/dma/fsl-edma.h> 9 #include <dt-bindings/firmware/imx/rsrc.h> 11 dma_ipg_clk: clock-dma-ipg { 12 compatible = "fixed-clock"; 13 #clock-cells = <0>; 14 clock-frequency = <120000000>; 15 clock-output-names = "dma_ipg_clk"; [all …]
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/linux/drivers/pmdomain/renesas/ |
H A D | rcar-gen4-sysc.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * R-Car Gen4 SYSC Power management support 22 #include "rcar-gen4-sysc.h" 26 #define SYSCPONSR(x) (0x800 + ((x) * 0x4)) /* Power-ON Status Register 0 */ 27 #define SYSCPOFFSR(x) (0x808 + ((x) * 0x4)) /* Power-OFF Status Register */ 39 #define PWRON_PWROFF BIT(0) /* Power-ON/OFF request */ 45 #define PDRSR_OFF BIT(0) /* Power-OFF state */ 46 #define PDRSR_ON BIT(4) /* Power-ON state */ 47 #define PDRSR_OFF_STATE BIT(8) /* Processing Power-OFF sequence */ 48 #define PDRSR_ON_STATE BIT(12) /* Processing Power-ON sequence */ [all …]
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H A D | rcar-sysc.c | 1 // SPDX-License-Identifier: GPL-2.0 3 * R-Car SYSC Power management support 6 * Copyright (C) 2015-2017 Glider bvba 19 #include <linux/soc/renesas/rcar-sysc.h> 21 #include "rcar-sysc.h" 37 * Use WFI to power off, CPG/APMU to resume ARM cores on R-Car Gen2 38 * Use PSCI on R-Car Gen3 57 #define RCAR_PD_ALWAYS_ON 32 /* Always-on power area */ 72 static int rcar_sysc_pwr_on_off(const struct rcar_sysc_pd *pd, bool on) in rcar_sysc_pwr_on_off() argument 91 return -EAGAIN; in rcar_sysc_pwr_on_off() [all …]
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/linux/Documentation/devicetree/bindings/bus/ |
H A D | fsl,imx8qxp-pixel-link-msi-bus.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/bus/fsl,imx8qxp-pixel-link-msi-bus.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Liu Ying <victor.liu@nxp.com> 15 from i.MX8 System Controller Unit (SCU) which is used to control power, 18 i.MX8qxp pixel link MSI bus is a simple memory-mapped bus. Two input clocks, 35 - $ref: simple-pm-bus.yaml# 37 # We need a select here so we don't match all nodes with 'simple-pm-bus'. 43 - fsl,imx8qxp-display-pixel-link-msi-bus [all …]
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/linux/drivers/clk/imx/ |
H A D | clk-scu.c | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * Copyright 2018-2021 NXP 7 #include <dt-bindings/firmware/imx/rsrc.h> 8 #include <linux/arm-smccc.h> 10 #include <linux/clk-provider.h> 20 #include "clk-scu.h" 44 * struct clk_scu - Description of one SCU clock 46 * @rsrc_id: resource ID of this SCU clock 62 * struct clk_gpr_scu - Description of one SCU GPR clock 64 * @rsrc_id: resource ID of this SCU clock [all …]
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/linux/Documentation/devicetree/bindings/clock/ |
H A D | imx8qxp-lpcg.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/imx8qxp-lpcg.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: NXP i.MX8QXP LPCG (Low-Power Clock Gating) Clock 10 - Aisheng Dong <aisheng.dong@nxp.com> 13 The Low-Power Clock Gate (LPCG) modules contain a local programming 18 by the SCU resources and clock controls. Thus even if the clock is 24 include/dt-bindings/clock/imx8-lpcg.h 29 - const: fsl,imx8qxp-lpcg [all …]
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/linux/Documentation/devicetree/bindings/display/bridge/ |
H A D | fsl,imx8qxp-pxl2dpi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/display/bridge/fsl,imx8qxp-pxl2dpi.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Liu Ying <victor.liu@nxp.com> 14 interfaces the pixel link 36-bit data output and the DSI controller’s 15 MIPI-DPI 24-bit data input, and inputs of LVDS Display Bridge(LDB) module 25 const: fsl,imx8qxp-pxl2dpi 27 fsl,sc-resource: 29 description: The SCU resource ID associated with this PXL2DPI instance. [all …]
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/linux/arch/arm/boot/dts/samsung/ |
H A D | exynos4.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. 7 * Copyright (c) 2010-2011 Linaro Ltd. 19 #include <dt-bindings/clock/exynos4.h> 20 #include <dt-bindings/clock/exynos-audss-clk.h> 21 #include <dt-bindings/interrupt-controller/arm-gic.h> 22 #include <dt-bindings/interrupt-controller/irq.h> 25 interrupt-parent = <&gic>; 26 #address-cells = <1>; 27 #size-cells = <1>; [all …]
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/linux/drivers/platform/x86/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 12 x86 platforms, including vendor-specific laptop extension drivers. 23 This driver adds support for the ACPI-WMI (Windows Management 26 ACPI-WMI is a proprietary extension to ACPI to expose parts of the 27 ACPI firmware to userspace - this is done through various vendor 38 any ACPI-WMI devices. 45 Say Y here if you want to be able to read a firmware-embedded 50 be called wmi-bmof. 63 control, fn-lock, mic-mute LED, and other extra features. 66 will be called huawei-wmi. [all …]
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/linux/drivers/usb/serial/ |
H A D | ftdi_sio_ids.h | 1 /* SPDX-License-Identifier: GPL-2.0 */ 6 * Philipp Gühring - pg@futureware.at - added the Device ID of the USB relais 25 #define FTDI_4232H_PID 0x6011 /* Quad channel hi-speed device */ 26 #define FTDI_232H_PID 0x6014 /* Single channel hi-speed device */ 27 #define FTDI_FTX_PID 0x6015 /* FT-X series (FT201X, FT230X, FT231X, etc) */ 28 #define FTDI_FT2233HP_PID 0x6040 /* Dual channel hi-speed device with PD */ 29 #define FTDI_FT4233HP_PID 0x6041 /* Quad channel hi-speed device with PD */ 30 #define FTDI_FT2232HP_PID 0x6042 /* Dual channel hi-speed device with PD */ 31 #define FTDI_FT4232HP_PID 0x6043 /* Quad channel hi-speed device with PD */ 32 #define FTDI_FT233HP_PID 0x6044 /* Dual channel hi-speed device with PD */ [all …]
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/linux/ |
H A D | MAINTAINERS | 5 --------------------------------------------------- 21 W: *Web-page* with status/info 23 B: URI for where to file *bugs*. A web-page with detailed bug 28 patches to the given subsystem. This is either an in-tree file, 29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst 46 N: [^a-z]tegra all files whose path contains tegra 64 ---------------- 83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS) 85 L: linux-scsi@vger.kernel.org 88 F: drivers/scsi/3w-* [all …]
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