Searched +full:scmi +full:- +full:smc (Results 1 – 11 of 11) sorted by relevance
/linux/drivers/firmware/arm_scmi/transports/ |
H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only 2 menu "SCMI Transport Drivers" 7 This declares whether at least one SCMI transport has been configured. 8 Used to trigger a build bug when trying to build SCMI without any 14 This declares whether a shared memory based transport for SCMI is 20 This declares whether a message passing based transport for SCMI is 24 tristate "SCMI transport based on Mailbox" 30 Enable mailbox based transport for SCMI. 32 If you want the ARM SCMI PROTOCOL stack to include support for a 38 tristate "SCMI transport based on SMC" [all …]
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/linux/arch/arm64/boot/dts/st/ |
H A D | stm32mp211.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2025 - All Rights Reserved 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #address-cells = <2>; 10 #size-cells = <2>; 13 #address-cells = <1>; 14 #size-cells = <0>; 17 compatible = "arm,cortex-a35"; 20 enable-method = "psci"; 24 arm-pmu { [all …]
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/linux/arch/arm64/boot/dts/blaize/ |
H A D | blaize-blzp1600.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 6 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 interrupt-parent = <&gic>; 13 #address-cells = <2>; 14 #size-cells = <2>; 17 #address-cells = <2>; 18 #size-cells = <0>; 21 compatible = "arm,cortex-a53"; [all …]
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/linux/arch/arm/boot/dts/st/ |
H A D | stm32mp15-scmi.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2022 - All Rights Reserved 7 #include <dt-bindings/regulator/st,stm32mp15-regulator.h> 12 compatible = "linaro,optee-tz"; 13 method = "smc"; 14 interrupt-parent = <&intc>; 18 scmi: scmi { label 19 compatible = "linaro,scmi-optee"; 20 #address-cells = <1>; 21 #size-cells = <0>; [all …]
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H A D | stm32mp157f-dk2-scmi.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2025 - All Rights Reserved 7 #include "stm32mp15-scmi.dtsi" 10 reserved-memory { 13 no-map; 18 compatible = "arm,smc-wdt"; 19 arm,smc-id = <0xbc000000>; 26 vdd-supply = <&scmi_vdd>; 27 vdda-supply = <&scmi_vdd>; 44 VL-supply = <&scmi_v3v3>; [all …]
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/linux/arch/arm64/boot/dts/arm/ |
H A D | morello.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) 3 * Copyright (c) 2020-2024, Arm Limited. All rights reserved. 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 interrupt-parent = <&gic>; 11 #address-cells = <2>; 12 #size-cells = <2>; 14 soc_refclk50mhz: clock-50000000 { 15 compatible = "fixed-clock"; 16 #clock-cells = <0>; 17 clock-frequency = <50000000>; [all …]
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/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx8ulp.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/imx8ulp-clock.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/power/imx8ulp-power.h> 10 #include <dt-bindings/thermal/thermal.h> 12 #include "imx8ulp-pinfunc.h" 15 interrupt-parent = <&gic>; 16 #address-cells = <2>; 17 #size-cells = <2>; [all …]
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H A D | imx95.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT) 6 #include <dt-bindings/clock/nxp,imx95-clock.h> 7 #include <dt-bindings/dma/fsl-edma.h> 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/input/input.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/thermal/thermal.h> 13 #include "imx95-clock.h" 14 #include "imx95-pinfunc.h" 15 #include "imx95-power.h" [all …]
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/linux/arch/arm64/boot/dts/rockchip/ |
H A D | rk3562.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rockchip,rk3562-cru.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/phy/phy.h> 10 #include <dt-bindings/power/rockchip,rk3562-power.h> 11 #include <dt-bindings/pinctrl/rockchip.h> 12 #include <dt-bindings/reset/rockchip,rk3562-cru.h> 13 #include <dt-bindings/soc/rockchip,boot-mode.h> 14 #include <dt-bindings/thermal/thermal.h> [all …]
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H A D | rk356x-base.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/rk3568-cru.h> 7 #include <dt-bindings/interrupt-controller/arm-gic.h> 8 #include <dt-bindings/interrupt-controller/irq.h> 9 #include <dt-bindings/phy/phy.h> 10 #include <dt-bindings/pinctrl/rockchip.h> 11 #include <dt-bindings/power/rk3568-power.h> 12 #include <dt-bindings/soc/rockchip,boot-mode.h> 13 #include <dt-bindings/thermal/thermal.h> 16 interrupt-parent = <&gic>; [all …]
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/linux/ |
H A D | MAINTAINERS | 5 --------------------------------------------------- 21 W: *Web-page* with status/info 23 B: URI for where to file *bugs*. A web-page with detailed bug 28 patches to the given subsystem. This is either an in-tree file, 29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst 46 N: [^a-z]tegra all files whose path contains tegra 64 ---------------- 83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS) 85 L: linux-scsi@vger.kernel.org 88 F: drivers/scsi/3w-* [all …]
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