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Searched +full:scmi +full:- +full:shmem (Results 1 – 13 of 13) sorted by relevance

/linux/drivers/firmware/arm_scmi/
H A Dshmem.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2019-2024 ARM Ltd.
22 * SCMI specification requires all parameters, message headers, return
67 * pre-processor.
88 static void shmem_tx_prepare(struct scmi_shared_mem __iomem *shmem, in shmem_tx_prepare() argument
99 * overwriting its response with new message payload or vice-versa. in shmem_tx_prepare()
101 * not to bail-out on intermittent issues where the platform is in shmem_tx_prepare()
104 * Note that after a timeout is detected we bail-out and carry on but in shmem_tx_prepare()
107 * due to a misbehaving SCMI firmware. in shmem_tx_prepare()
109 stop = ktime_add_ms(ktime_get(), 2 * cinfo->rx_timeout_ms); in shmem_tx_prepare()
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H A Dcommon.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * System Control and Management Interface (SCMI) Message Protocol
5 * and function prototypes used in all the different SCMI protocols.
7 * Copyright (C) 2018-2024 ARM Ltd.
38 SCMI_ERR_SUPPORT = -1, /* Not supported */
39 SCMI_ERR_PARAMS = -2, /* Invalid Parameters */
40 SCMI_ERR_ACCESS = -3, /* Invalid access/permission denied */
41 SCMI_ERR_ENTRY = -4, /* Not found */
42 SCMI_ERR_RANGE = -5, /* Value out of range */
43 SCMI_ERR_BUSY = -6, /* Device busy */
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H A DMakefile1 # SPDX-License-Identifier: GPL-2.0-only
2 scmi-bus-y = bus.o
3 scmi-core-objs := $(scmi-bus-y)
5 scmi-driver-y = driver.o notify.o
6 scmi-driver-$(CONFIG_ARM_SCMI_QUIRKS) += quirks.o
7 scmi-driver-$(CONFIG_ARM_SCMI_RAW_MODE_SUPPORT) += raw_mode.o
8 scmi-transport-$(CONFIG_ARM_SCMI_HAVE_SHMEM) = shmem.o
9 scmi-transport-$(CONFIG_ARM_SCMI_HAVE_MSG) += msg.o
10 scmi-protocols-y := base.o clock.o perf.o power.o reset.o sensors.o system.o voltage.o powercap.o
11 scmi-protocols-y += pinctrl.o
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H A Ddriver.c1 // SPDX-License-Identifier: GPL-2.0
3 * System Control and Management Interface (SCMI) Message Protocol driver
5 * SCMI Message Protocol is used between the System Control Processor(SCP)
7 * provides a mechanism for inter-processor communication between SCP's
14 * Copyright (C) 2018-2025 ARM Ltd.
25 #include <linux/io-64-nonatomic-hi-lo.h>
46 #include <trace/events/scmi.h>
48 #define SCMI_VENDOR_MODULE_ALIAS_FMT "scmi-protocol-0x%02x-%s"
54 /* List of all SCMI devices active in system */
64 * struct scmi_xfers_info - Structure to manage transfer information
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/linux/arch/arm64/boot/dts/arm/
H A Djuno-scmi.dtsi3 power-domains = <&scmi_devpd 8>;
7 power-domains = <&scmi_devpd 8>;
11 power-domains = <&scmi_devpd 8>;
15 power-domains = <&scmi_devpd 8>;
19 power-domains = <&scmi_devpd 8>;
23 power-domains = <&scmi_devpd 8>;
27 power-domains = <&scmi_devpd 8>;
31 power-domains = <&scmi_devpd 8>;
42 /delete-node/ scpi;
45 scmi {
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H A Dmorello.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
3 * Copyright (c) 2020-2024, Arm Limited. All rights reserved.
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 interrupt-parent = <&gic>;
11 #address-cells = <2>;
12 #size-cells = <2>;
14 soc_refclk50mhz: clock-50000000 {
15 compatible = "fixed-clock";
16 #clock-cells = <0>;
17 clock-frequency = <50000000>;
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/linux/arch/arm64/boot/dts/blaize/
H A Dblaize-blzp1600.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 interrupt-parent = <&gic>;
13 #address-cells = <2>;
14 #size-cells = <2>;
17 #address-cells = <2>;
18 #size-cells = <0>;
21 compatible = "arm,cortex-a53";
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/linux/Documentation/devicetree/bindings/mailbox/
H A Darm,mhu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jassi Brar <jaswinder.singh@linaro.org>
13 The ARM's Message-Handling-Unit (MHU) is a mailbox controller that has 3
22 interrupt signal using a 32-bit register, with all 32-bits logically ORed
28 interrupt. Each of the 32-bits can be used as "doorbell" to alert the remote
37 - arm,mhu
38 - arm,mhu-doorbell
40 - compatible
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/linux/arch/arm64/boot/dts/freescale/
H A Dimx8ulp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8ulp-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/power/imx8ulp-power.h>
10 #include <dt-bindings/thermal/thermal.h>
12 #include "imx8ulp-pinfunc.h"
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
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H A Dimx95.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR MIT)
6 #include <dt-bindings/clock/nxp,imx95-clock.h>
7 #include <dt-bindings/dma/fsl-edma.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/thermal/thermal.h>
13 #include "imx95-clock.h"
14 #include "imx95-pinfunc.h"
15 #include "imx95-power.h"
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/linux/arch/arm64/boot/dts/rockchip/
H A Drk3562.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rockchip,rk3562-cru.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/power/rockchip,rk3562-power.h>
11 #include <dt-bindings/pinctrl/rockchip.h>
12 #include <dt-bindings/reset/rockchip,rk3562-cru.h>
13 #include <dt-bindings/soc/rockchip,boot-mode.h>
14 #include <dt-bindings/thermal/thermal.h>
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H A Drk356x-base.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3568-cru.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3568-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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