Home
last modified time | relevance | path

Searched +full:sc7180 +full:- +full:dp (Results 1 – 9 of 9) sorted by relevance

/linux/Documentation/devicetree/bindings/display/msm/
H A Dqcom,sc7180-mdss.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/qcom,sc7180-mdss.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SC7180 Display MDSS
10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
14 sub-blocks like DPU display controller, DSI and DP interfaces etc. Device tree
15 bindings of MDSS are mentioned for SC7180 target.
17 $ref: /schemas/display/msm/mdss-common.yaml#
21 const: qcom,sc7180-mdss
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,sc7180-dispcc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,sc7180-dispcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display Clock & Reset Controller on SC7180
10 - Taniya Das <quic_tdas@quicinc.com>
14 domains on SC7180.
16 See also:: include/dt-bindings/clock/qcom,dispcc-sc7180.h
20 const: qcom,sc7180-dispcc
24 - description: Board XO source
[all …]
/linux/Documentation/devicetree/bindings/phy/
H A Dqcom,sc8280xp-qmp-usb43dp-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm QMP USB4-USB3-DP PHY controller (SC8280XP)
10 - Vinod Koul <vkoul@kernel.org>
19 - qcom,sc7180-qmp-usb3-dp-phy
20 - qcom,sc7280-qmp-usb3-dp-phy
21 - qcom,sc8180x-qmp-usb3-dp-phy
22 - qcom,sc8280xp-qmp-usb43dp-phy
[all …]
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dqcom,sc7180-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,sc7180-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm SC7180 TLMM pin controller
10 - Bjorn Andersson <andersson@kernel.org>
11 - Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
14 Top Level Mode Multiplexer pin controller in Qualcomm SC7180 SoC.
18 const: qcom,sc7180-pinctrl
23 reg-names:
[all …]
/linux/sound/soc/qcom/
H A Dlpass-sc7280.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
5 * lpass-sc7180.c -- ALSA SoC platform-machine driver for QTi LPASS
13 #include <dt-bindings/sound/sc7180-lpass.h>
15 #include "lpass-lpaif-reg.h"
59 .stream_name = "DP Playback",
113 const struct lpass_variant *v = drvdata->variant; in sc7280_lpass_alloc_dma_channel()
119 chan = find_first_zero_bit(&drvdata->dma_ch_bit_map, in sc7280_lpass_alloc_dma_channel()
120 v->rdma_channels); in sc7280_lpass_alloc_dma_channel()
122 if (chan >= v->rdma_channels) in sc7280_lpass_alloc_dma_channel()
[all …]
/linux/drivers/gpu/drm/msm/dp/
H A Ddp_display.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
32 MODULE_PARM_DESC(psr_enabled, "enable PSR for eDP and DP displays");
173 { .compatible = "qcom,sa8775p-dp", .data = &msm_dp_desc_sa8775p },
174 { .compatible = "qcom,sc7180-dp", .data = &msm_dp_desc_sc7180 },
175 { .compatible = "qcom,sc7280-dp", .data = &msm_dp_desc_sc7280 },
176 { .compatible = "qcom,sc7280-edp", .data = &msm_dp_desc_sc7280 },
177 { .compatible = "qcom,sc8180x-dp", .data = &msm_dp_desc_sc8180x },
178 { .compatible = "qcom,sc8180x-edp", .data = &msm_dp_desc_sc8180x },
179 { .compatible = "qcom,sc8280xp-dp", .data = &msm_dp_desc_sc8280xp },
[all …]
/linux/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_kms.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (c) 2014-2018, The Linux Foundation. All rights reserved.
13 #include <linux/dma-buf.h>
62 struct dpu_kms *kms = s->private; in _dpu_danger_signal_status()
65 if (!kms->hw_mdp) { in _dpu_danger_signal_status()
72 pm_runtime_get_sync(&kms->pdev->dev); in _dpu_danger_signal_status()
75 if (kms->hw_mdp->ops.get_danger_status) in _dpu_danger_signal_status()
76 kms->hw_mdp->ops.get_danger_status(kms->hw_mdp, in _dpu_danger_signal_status()
80 if (kms->hw_mdp->ops.get_safe_status) in _dpu_danger_signal_status()
81 kms->hw_mdp->ops.get_safe_status(kms->hw_mdp, in _dpu_danger_signal_status()
[all …]
/linux/drivers/phy/qualcomm/
H A Dphy-qcom-qmp-usb-legacy.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
23 #include "phy-qcom-qmp.h"
24 #include "phy-qcom-qmp-pcs-misc-v3.h"
25 #include "phy-qcom-qmp-pcs-usb-v4.h"
26 #include "phy-qcom-qmp-pcs-usb-v5.h"
28 #include "phy-qcom-qmp-dp-com-v3.h"
31 /* DP PHY soft reset */
33 /* mux to select DP PHY reset control, 0:HW control, 1: software reset */
42 #define DP_MODE BIT(1) /* enables DP mode */
[all …]
/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
[all …]