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12

/linux/arch/arm/boot/dts/microchip/
H A Dsama5d3xmb_gmac.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * sama5d3xmb_gmac.dtsi - Device Tree Include file for SAMA5D3x motherboard
13 phy-mode = "rgmii";
14 #address-cells = <1>;
15 #size-cells = <0>;
17 ethernet-phy@1 {
19 interrupt-parent = <&pioB>;
21 txen-skew-ps = <800>;
22 txc-skew-ps = <3000>;
23 rxdv-skew-ps = <400>;
[all …]
H A Dat91-dvk_su60_somc.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * at91-dvk_su60_somc.dtsi - Device Tree file for the DVK SOM60 base board
12 compatible = "atmel,asoc-wm8904";
13 pinctrl-names = "default";
14 pinctrl-0 = <&pinctrl_pck2_as_audio_mck>;
16 atmel,model = "wm8904 @ DVK-SOM60";
17 atmel,audio-routing =
25 atmel,ssc-controller = <&ssc0>;
26 atmel,audio-codec = <&wm8904>;
35 pinctrl-0 = <&pinctrl_mmc0_clk_cmd_dat0 &pinctrl_mmc0_dat1_3 &pinctrl_mmc0_cd>;
[all …]
/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6dl-mba6.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2013-2021 TQ-Systems GmbH
6 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
10 rxdv-skew-ps = <180>;
11 txen-skew-ps = <0>;
12 rxd3-skew-ps = <180>;
13 rxd2-skew-ps = <180>;
14 rxd1-skew-ps = <180>;
15 rxd0-skew-ps = <180>;
16 txd3-skew-ps = <120>;
[all …]
H A Dimx6qdl-icore-rqs.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR X11
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/clock/imx6qdl-clock.h>
9 #include <dt-bindings/sound/fsl-imx-audmux.h>
17 reg_1p8v: regulator-1p8v {
18 compatible = "regulator-fixed";
19 regulator-name = "1P8V";
20 regulator-min-microvolt = <1800000>;
21 regulator-max-microvolt = <1800000>;
22 regulator-boot-on;
[all …]
H A Dimx6qdl-phytec-phycore-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/regulator/dlg,da9063-regulator.h>
26 compatible = "gpio-leds";
27 pinctrl-names = "default";
28 pinctrl-0 = <&pinctrl_gpioleds_som>;
30 som-led-green {
33 linux,default-trigger = "heartbeat";
39 pinctrl-names = "default";
40 pinctrl-0 = <&pinctrl_ecspi1>;
[all …]
/linux/arch/arm/boot/dts/intel/socfpga/
H A Dsocfpga_arria10_mercury_aa1.dtsi1 // SPDX-License-Identifier: GPL-2.0
11 compatible = "enclustra,mercury-aa1", "altr,socfpga-arria10", "altr,socfpga";
25 stdout-path = "serial1:115200n8";
30 phy-mode = "rgmii";
31 phy-addr = <0xffffffff>; /* probe for phy addr */
33 max-frame-size = <3800>;
35 phy-handle = <&phy3>;
38 #address-cells = <1>;
39 #size-cells = <0>;
40 compatible = "snps,dwmac-mdio";
[all …]
H A Dsocfpga_cyclone5_de0_nano_soc.dts1 // SPDX-License-Identifier: GPL-2.0
9 model = "Terasic DE-0(Atlas)";
10 compatible = "terasic,de0-atlas", "altr,socfpga-cyclone5", "altr,socfpga";
14 stdout-path = "serial0:115200n8";
28 compatible = "regulator-fixed";
29 regulator-name = "3.3V";
30 regulator-min-microvolt = <3300000>;
31 regulator-max-microvolt = <3300000>;
35 compatible = "gpio-leds";
36 led-hps0 {
[all …]
H A Dsocfpga_cyclone5_sodia.dts1 // SPDX-License-Identifier: GPL-2.0+
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
12 compatible = "macnica,sodia", "altr,socfpga-cyclone5", "altr,socfpga";
16 stdout-path = "serial0:115200n8";
30 compatible = "regulator-fixed";
31 regulator-name = "3.3V";
32 regulator-min-microvolt = <3300000>;
33 regulator-max-microvolt = <3300000>;
36 leds: gpio-leds {
[all …]
H A Dsocfpga_arria10_socdk.dtsi1 // SPDX-License-Identifier: GPL-2.0+
9 compatible = "altr,socfpga-arria10-socdk", "altr,socfpga-arria10", "altr,socfpga";
18 stdout-path = "serial0:115200n8";
28 compatible = "gpio-leds";
31 label = "a10sr-led0";
36 label = "a10sr-led1";
41 label = "a10sr-led2";
46 label = "a10sr-led3";
51 ref_033v: 033-v-ref {
52 compatible = "regulator-fixed";
[all …]
H A Dsocfpga_arria5_socdk.dts1 // SPDX-License-Identifier: GPL-2.0+
10 compatible = "altr,socfpga-arria5-socdk", "altr,socfpga-arria5", "altr,socfpga";
14 stdout-path = "serial0:115200n8";
31 compatible = "gpio-leds";
32 led-hps0 {
37 led-hps1 {
42 led-hps2 {
47 led-hps3 {
54 compatible = "regulator-fixed";
55 regulator-name = "3.3V";
[all …]
H A Dsocfpga_cyclone5_sockit.dts1 // SPDX-License-Identifier: GPL-2.0+
10 compatible = "terasic,socfpga-cyclone5-sockit", "altr,socfpga-cyclone5", "altr,socfpga";
14 stdout-path = "serial0:115200n8";
31 compatible = "gpio-leds";
36 linux,default-trigger = "heartbeat";
42 linux,default-trigger = "heartbeat";
48 linux,default-trigger = "heartbeat";
54 linux,default-trigger = "heartbeat";
58 gpio-keys {
59 compatible = "gpio-keys";
[all …]
H A Dsocfpga_cyclone5_vining_fpga.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR X11)
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
12 compatible = "samtec,vining", "altr,socfpga-cyclone5", "altr,socfpga";
16 stdout-path = "serial0:115200n8";
34 gpio-keys {
35 compatible = "gpio-keys";
68 regulator-usb-nrst {
69 compatible = "regulator-fixed";
70 regulator-name = "usb_nrst";
[all …]
/linux/arch/arm64/boot/dts/intel/
H A Dsocfpga_agilex_socdk_nand.dts1 // SPDX-License-Identifier: GPL-2.0
9 compatible = "intel,socfpga-agilex-socdk", "intel,socfpga-agilex";
19 stdout-path = "serial0:115200n8";
23 compatible = "gpio-leds";
53 phy-mode = "rgmii";
54 phy-handle = <&phy0>;
56 max-frame-size = <9000>;
59 #address-cells = <1>;
60 #size-cells = <0>;
61 compatible = "snps,dwmac-mdio";
[all …]
H A Dsocfpga_n5x_socdk.dts1 // SPDX-License-Identifier: GPL-2.0
9 compatible = "intel,n5x-socdk", "intel,socfpga-agilex";
19 stdout-path = "serial0:115200n8";
29 sdram_edac: memory-controller@f87f8000 {
30 compatible = "snps,ddrc-3.80a";
38 compatible = "intel,easic-n5x-clkmgr";
43 phy-mode = "rgmii";
44 phy-handle = <&phy0>;
46 max-frame-size = <9000>;
49 #address-cells = <1>;
[all …]
H A Dsocfpga_agilex_socdk.dts1 // SPDX-License-Identifier: GPL-2.0
9 compatible = "intel,socfpga-agilex-socdk", "intel,socfpga-agilex";
19 stdout-path = "serial0:115200n8";
23 compatible = "gpio-leds";
53 phy-mode = "rgmii";
54 phy-handle = <&phy0>;
56 max-frame-size = <9000>;
59 #address-cells = <1>;
60 #size-cells = <0>;
61 compatible = "snps,dwmac-mdio";
[all …]
/linux/arch/arm64/boot/dts/altera/
H A Dsocfpga_stratix10_socdk_nand.dts1 // SPDX-License-Identifier: GPL-2.0-only
10 compatible = "altr,socfpga-stratix10-socdk", "altr,socfpga-stratix10";
20 stdout-path = "serial0:115200n8";
24 compatible = "gpio-leds";
25 led-hps0 {
30 led-hps1 {
35 led-hps2 {
47 ref_033v: regulator-v-ref {
48 compatible = "regulator-fixed";
49 regulator-name = "0.33V";
[all …]
H A Dsocfpga_stratix10_socdk.dts1 // SPDX-License-Identifier: GPL-2.0-only
10 compatible = "altr,socfpga-stratix10-socdk", "altr,socfpga-stratix10";
20 stdout-path = "serial0:115200n8";
24 compatible = "gpio-leds";
25 led-hps0 {
30 led-hps1 {
35 led-hps2 {
47 ref_033v: regulator-v-ref {
48 compatible = "regulator-fixed";
49 regulator-name = "0.33V";
[all …]
/linux/arch/arm/boot/dts/st/
H A Dstm32mp15xx-dhcor-testbench.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
17 stdout-path = "serial0:115200n8";
20 sd_switch: regulator-sd_switch {
21 compatible = "regulator-gpio";
22 regulator-name = "sd_switch";
23 regulator-min-microvolt = <1800000>;
24 regulator-max-microvolt = <2900000>;
25 regulator-type = "voltage";
26 regulator-always-on;
29 gpios-states = <0>;
[all …]
H A Dstm32mp15xx-dhcor-drc-compact.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
21 stdout-path = "serial0:115200n8";
25 compatible = "gpio-leds";
29 default-state = "off";
35 default-state = "off";
40 compatible = "regulator-fixed";
41 regulator-name = "vio";
42 regulator-min-microvolt = <3300000>;
43 regulator-max-microvolt = <3300000>;
45 regulator-always-on;
[all …]
H A Dstm32mp15xx-dhcor-avenger96.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
3 * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
9 #include "stm32mp15xx-dhcor-io1v8.dtsi"
22 cec_clock: clk-cec-fixed {
23 #clock-cells = <0>;
24 compatible = "fixed-clock";
25 clock-frequency = <24000000>;
29 stdout-path = "serial0:115200n8";
32 hdmi-out {
33 compatible = "hdmi-connector";
[all …]
/linux/Documentation/devicetree/bindings/net/
H A Dengleder,tsnep.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Gerhard Engleder <gerhard@engleder-embedded.com>
13 - $ref: ethernet-controller.yaml#
26 interrupt-names:
29 - const: mac
30 - const: txrx-1
31 - const: txrx-2
32 - const: txrx-3
[all …]
H A Drenesas,etheravb.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sergei Shtylyov <sergei.shtylyov@gmail.com>
15 - items:
16 - enum:
17 - renesas,etheravb-r8a7742 # RZ/G1H
18 - renesas,etheravb-r8a7743 # RZ/G1M
19 - renesas,etheravb-r8a7744 # RZ/G1N
20 - renesas,etheravb-r8a7745 # RZ/G1E
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mp-dhcom-pdk2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * DHCM-iMX8ML8-C160-R409-F1638-SPI16-GE-CAN2-SD-RTC-WBTA-ADC-T-RGB-CSI2-HS-I-01D2
7 * DHCOM PCB number: 660-100 or newer
8 * PDK2 PCB number: 516-400 or newer
11 /dts-v1/;
13 #include <dt-bindings/leds/common.h>
14 #include <dt-bindings/phy/phy-imx8-pcie.h>
15 #include "imx8mp-dhcom-som.dtsi"
19 compatible = "dh,imx8mp-dhcom-pdk2", "dh,imx8mp-dhcom-som",
23 stdout-path = &uart1;
[all …]
/linux/arch/arm64/boot/dts/renesas/
H A Dr8a77970-v3msk.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
27 stdout-path = "serial0:115200n8";
30 hdmi-out {
31 compatible = "hdmi-connector";
36 remote-endpoint = <&adv7511_out>;
41 lvds-decoder {
43 vcc-supply = <&vcc_d3_3v>;
46 #address-cells = <1>;
[all …]
H A Dr8a77970-eagle.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the Eagle board with R-Car V3M
5 * Copyright (C) 2016-2017 Renesas Electronics Corp.
9 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
29 stdout-path = "serial0:115200n8";
32 d1p8: regulator-fixed {
33 compatible = "regulator-fixed";
34 regulator-name = "fixed-1.8V";
35 regulator-min-microvolt = <1800000>;
[all …]

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