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/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dnvidia,tegra234-mgbe.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/nvidia,tegra234-mgbe.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tegra234 MGBE Multi-Gigabit Ethernet Controller
10 - Thierry Reding <treding@nvidia.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 const: nvidia,tegra234-mgbe
20 reg-names:
22 - const: hypervisor
[all …]
H A Dxilinx_axienet.txt2 --------------------------------------------------------
7 segments of memory for buffering TX and RX, as well as the capability of
8 offloading TX/RX checksum calculation off the processor.
18 - compatible : Must be one of "xlnx,axi-ethernet-1.00.a",
19 "xlnx,axi-ethernet-1.01.a", "xlnx,axi-ethernet-2.01.a"
20 - reg : Address and length of the IO space, as well as the address
22 axistream-connected is specified, in which case the reg
24 - interrupts : Should be a list of 2 or 3 interrupts: TX DMA, RX DMA,
25 and optionally Ethernet core. If axistream-connected is
26 specified, the TX/RX DMA interrupts should be on that node
[all …]
H A Dxlnx,axi-ethernet.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/xlnx,axi-ethernet.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
13 segments of memory for buffering TX and RX, as well as the capability of
14 offloading TX/RX checksum calculation off the processor.
22 - Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
27 - xlnx,axi-ethernet-1.00.a
28 - xlnx,axi-ethernet-1.01.a
29 - xlnx,axi-ethernet-2.01.a
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H A Dfsl-fman.txt5 - FMan Node
6 - FMan Port Node
7 - FMan MURAM Node
8 - FMan dTSEC/XGEC/mEMAC Node
9 - FMan IEEE 1588 Node
10 - FMan MDIO Node
11 - Example
18 Due to the fact that the FMan is an aggregation of sub-engines (ports, MACs,
23 - compatible
32 - cell-index
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/freebsd/sys/contrib/alpine-hal/eth/
H A Dal_hal_eth_mac_regs.h1 /*-
10 found at http://www.gnu.org/licenses/gpl-2.0.html
307 struct al_eth_mac_10g_stats_v3_rx rx; member
402 /* [0x28] XAUI PCS configuration */
404 /* [0x2c] XAUI PCS status */
406 /* [0x30] RXAUI PCS configuration */
408 /* [0x34] RXAUI PCS status */
446 /* [0x0] PCS register file address */
448 /* [0x4] PCS register file data */
462 /* [0x20] KR PCS config */
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H A Dal_hal_eth_main.c1 /*-
10 found at http://www.gnu.org/licenses/gpl-2.0.html
98 /* tx Meta Descriptor defines - MacSec */
105 #define AL_ETH_TX_MACSEC_SECURED_PYLD_LEN_LSB_SHIFT 10 /* Secure Payload Length (0x3FFF for non-S…
108 /* Rx Descriptor defines */
183 /* rx gpd defines */
213 /* rx gcp defines */
252 #define AL_ETH_S2M_UDMA_COMP_COAL_TIMEOUT 200 /* Rx descriptors coalescing timeout in SB clocks */
364 al_warn("[%s] warn: failed to change state, error %d\n", dma->name, rc); in al_udma_state_set_wait()
376 if (count-- == 0) { in al_udma_state_set_wait()
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H A Dal_hal_eth.h1 /*-
10 found at http://www.gnu.org/licenses/gpl-2.0.html
61 /* *INDENT-OFF* */
65 /* *INDENT-ON* */
97 #define AL_ETH_TSO_MSS_MAX_VAL (AL_ETH_MAX_FRAME_LEN - 200)
174 /** Tx to Rx switching decision type */
182 /** Tx to Rx VLAN ID selection type */
192 /** Rx descriptor configurations */
193 /* Note: when selecting rx descriptor field to inner packet, then that field
194 * will be set according to inner packet when packet is tunneled, for non-tunneled
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dfsl-ls1088a-ten64.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 * Based on fsl-ls1088a-rdb.dts
5 * Copyright 2017-2020 NXP
6 * Copyright 2019-2021 Traverse Technologies
11 /dts-v1/;
13 #include "fsl-ls1088a.dtsi"
15 #include <dt-bindings/gpio/gpio.h>
16 #include <dt-bindings/input/input.h>
28 stdout-path = "serial0:115200n8";
32 compatible = "gpio-keys";
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/freebsd/sys/contrib/device-tree/include/dt-bindings/clock/
H A Dtegra234-clock.h1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Copyright (c) 2018-2022, NVIDIA CORPORATION. All rights reserved. */
58 /** @brief clock recovered from EAVB input */
126 /** @brief clock recovered from I2S1 input */
130 /** @brief clock recovered from I2S2 input */
134 /** @brief clock recovered from I2S3 input */
138 /** @brief clock recovered from I2S4 input */
142 /** @brief clock recovered from I2S5 input */
146 /** @brief clock recovered from I2S6 input */
192 /** @brief input from Tegra's XTAL_IN */
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/freebsd/sys/dev/gem/
H A Dif_gemreg.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
40 /* Note: Reading the status reg clears bits 0-6. */
58 #define GEM_CONFIG_BUG2FIX 0x00001000 /* fix RX hang after overflow */
69 * Bits 0-6 auto-clear when read.
78 #define GEM_INTR_PCS 0x00002000 /* Physical Code Sub-layer */
106 #define GEM_PCI_BIF_CNF_HOST_64 0x00000002 /* 64-bit host */
107 #define GEM_PCI_BIF_CNF_B64D_DS 0x00000004 /* no 64-bit data cycle */
116 /* GEM_RESET register bits -- TX and RX self clear when complete. */
118 #define GEM_RESET_RX 0x00000002 /* Reset RX half. */
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/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Dsnps,dw-pcie-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/snps,dw-pci
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/freebsd/sys/contrib/device-tree/src/arm64/nvidia/
H A Dtegra234.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/clock/tegra234-clock.h>
4 #include <dt-bindings/gpio/tegra234-gpio.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/mailbox/tegra186-hsp.h>
7 #include <dt-bindings/memory/tegra234-mc.h>
8 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
9 #include <dt-bindings/power/tegra234-powergate.h>
10 #include <dt-bindings/reset/tegra234-reset.h>
11 #include <dt-bindings/thermal/tegra234-bpmp-thermal.h>
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/freebsd/sys/contrib/alpine-hal/
H A Dal_hal_serdes_interface.h9 found at http://www.gnu.org/licenses/gpl-2.0.html
53 /* *INDENT-OFF* */
57 /* *INDENT-ON* */
101 * Transmits the untimed, partial equalized RX signal out the transmit
114 * Loops back the TX driver IO signal to the RX IO pins
129 /** Loops TX data (to PMA) to RX path (instead of PMA data) */
178 * Tx de-emphasis parameters
183 AL_SERDES_TX_DEEMP_C_MINUS, /*< c(-1) */
188 * select the input values location.
196 * Transmit Amplitude control signal. Used to define the full-scale
[all …]
/freebsd/sys/dev/axgbe/
H A Dxgbe-dev.c4 * Copyright (c) 2014-2016,2020 Advanced Micro Devices, Inc.
116 #include "xgbe-common.h"
122 return (if_getmtu(pdata->netdev) + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN); in xgbe_get_max_frame()
131 rate = pdata->sysclk_rate; in xgbe_usec_to_riwt()
134 * Convert the input usec value to the watchdog timer value. Each in xgbe_usec_to_riwt()
150 rate = pdata->sysclk_rate; in xgbe_riwt_to_usec()
153 * Convert the input watchdog timer value to the usec value. Each in xgbe_riwt_to_usec()
170 pbl = pdata->pbl; in xgbe_config_pbl_val()
172 if (pdata->pbl > 32) { in xgbe_config_pbl_val()
177 for (i = 0; i < pdata->channel_count; i++) { in xgbe_config_pbl_val()
[all …]
/freebsd/sys/dev/ixl/
H A Dixl_pf_main.c3 Copyright (c) 2013-2018, Intel Corporation
107 "Rx",
115 "CL108 RS-FEC",
116 "CL74 FC-FEC/BASE-R",
127 * ixl_set_state - Set the specified state
141 * ixl_clear_state - Clear the specified state
155 * ixl_test_state - Test the specified state
170 * ixl_testandset_state - Test and set the specified state
193 u8 oem_ver = (u8)(hw->nvm.oem_ver >> 24); in ixl_nvm_version_str()
194 u16 oem_build = (u16)((hw->nvm.oem_ver >> 16) & 0xFFFF); in ixl_nvm_version_str()
[all …]
H A Di40e_common.c3 Copyright (c) 2013-2018, Intel Corporation
41 * i40e_set_mac_type - Sets MAC type
53 if (hw->vendor_id == I40E_INTEL_VENDOR_ID) { in i40e_set_mac_type()
54 switch (hw->device_id) { in i40e_set_mac_type()
75 hw->mac.type = I40E_MAC_XL710; in i40e_set_mac_type()
83 hw->mac.type = I40E_MAC_X722; in i40e_set_mac_type()
86 hw->mac.type = I40E_MAC_X722_VF; in i40e_set_mac_type()
91 hw->mac.type = I40E_MAC_VF; in i40e_set_mac_type()
94 hw->mac.type = I40E_MAC_GENERIC; in i40e_set_mac_type()
102 hw->mac.type, status); in i40e_set_mac_type()
[all …]
/freebsd/contrib/ntp/ntpd/
H A Dntp_control.c2 * ntp_control.c - respond to mode 6 control messages and send async
42 #define NO_REQUEST (-1)
64 #define ctl_putsfp(tag, sfp) ctl_putdblf(tag, 0, -1, \
451 * more-or-less)
700 * the reference clock driver doesn't set peer->sstclktype to something
777 u_long numctltooshort; /* number of too short input packets */
778 u_long numctlinputresp; /* number of responses on input */
779 u_long numctlinputfrag; /* number of fragments on input */
780 u_long numctlinputerr; /* number of input pkt
1356 ctlclkstatus(struct refclockstat * pcs) ctlclkstatus() argument
2906 ctl_putclock(int id,struct refclockstat * pcs,int mustput) ctl_putclock() argument
[all...]
/freebsd/sys/dev/e1000/
H A De1000_defines.h2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
94 #define E1000_CTRL_EXT_IAME 0x08000000 /* Int ACK Auto-mask */
122 #define E1000_RXD_STAT_PIF 0x80 /* passed in-exact filter */
132 #define E1000_RXD_ERR_RXE 0x80 /* Rx Data Error */
172 #define E1000_MANC_SMBUS_EN 0x00000001 /* SMBus Enabled - RO */
173 #define E1000_MANC_ASF_EN 0x00000002 /* ASF Enabled - RO */
198 #define E1000_RCTL_RDMTS_HALF 0x00000000 /* Rx desc min thresh size */
205 #define E1000_RCTL_SZ_2048 0x00000000 /* Rx buffer size 2048 */
206 #define E1000_RCTL_SZ_1024 0x00010000 /* Rx buffer size 1024 */
[all …]
/freebsd/sys/dev/qlnx/qlnxe/
H A Dreg_addr.h2 * Copyright (c) 2017-2018 Cavium, Inc.
73 … Mask memory read Bit3 : Mask memory write Bit2 : Mask Completion Bit1 : Mask TX Bit0 : Mask RX
74 … 0x00381cUL //Access:R DataWidth:0x20 // Number of RX tlp are received
75 … 0x003820UL //Access:R DataWidth:0x20 // Byte number of RX are received
78 …- For ending "endless completion". 0 - When receiving a completion timeout while receiving a compl…
79 … DataWidth:0x4 // 0 - TXCPL sync fifo pop underflow 1 - TXR sync fifo pop underflow 2 - TXW hea…
80 …R DataWidth:0x6 // 0 - RX target read and config sync fifo push overflow 1 - RX header sync …
81 …ataWidth:0x14 // 4:0 - TXCPL sync fifo pop status 9:5 - TXR sync fifo pop status 14:10 - TXW hea…
88 …ffff<<0) // Vendor ID. PCI-SIG assigned Manufacturer Identifier. Note: The access attributes of …
90 …ce Identifier. Note: The access attributes of this field are as follows: - Dbi: if (DBI_RO_WR_E…
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/freebsd/sys/dev/ice/
H A Dice_lib.c1 /* SPDX-License-Identifier: BSD-3-Clause */
270 * ice_map_bar - Map PCIe BAR memory
281 if (bar->res != NULL) { in ice_map_bar()
286 bar->rid = PCIR_BAR(bar_num); in ice_map_bar()
287 bar->res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &bar->rid, in ice_map_bar()
289 if (!bar->res) { in ice_map_bar()
294 bar->tag = rman_get_bustag(bar->res); in ice_map_bar()
295 bar->handle = rman_get_bushandle(bar->res); in ice_map_bar()
296 bar->size = rman_get_size(bar->res); in ice_map_bar()
302 * ice_free_bar - Free PCIe BAR memory
[all …]
/freebsd/sys/dev/sfxge/common/
H A Defx_regs_mcdi.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright 2008-2013 Solarflare Communications Inc. All rights reserved.
32 /* Power-on reset state */
54 /* The 'doorbell' addresses are hard-wired to alert the MC when written */
57 /* The rest of these are firmware-defined */
65 /* Values to be written to the per-port status dword in shared
94 * | | \--- Response
95 * | \------- Error
96 * \------------------------------ Resync (always set)
[all …]
/freebsd/sys/dev/ixgbe/
H A Dixgbe_type.h2 SPDX-License-Identifier: BSD-3-Clause
4 Copyright (c) 2001-2020, Intel Corporation
42 * - IXGBE_ERROR_INVALID_STATE
48 * - IXGBE_ERROR_POLLING
53 * - IXGBE_ERROR_CAUTION
58 * - IXGBE_ERROR_SOFTWARE
64 * - IXGBE_ERROR_ARGUMENT
69 * - IXGBE_ERROR_UNSUPPORTED
170 #define IXGBE_BY_MAC(_hw, r) ((_hw)->mvals[IXGBE_CAT(r, _IDX)])
427 (0x012300 + (((_i) - 24) * 4)))
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/freebsd/sys/dev/bxe/
H A Dbxe_elink.c1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
4 * Copyright (c) 2007-2017 QLogic Corporation. All rights reserved.
508 /* When this pin is active high during reset, 10GBASE-T core is power
509 * down, When it is active low the 10GBASE-T is power up
774 #define I2C_WA_PWR_ITER (I2C_WA_RETRY_CNT - 1)
936 (_phy)->def_md_devad, \
942 (_phy)->def_md_devad, \
970 * elink_check_lfa - This function checks if link reinitialization is required,
982 struct bxe_softc *sc = params->sc; in elink_check_lfa()
[all …]
/freebsd/share/misc/
H A Dusb_vendors6 # http://www.linux-usb.org/usb-ids.html
7 # or send entries as patches (diff -u old new) in the
10 # http://www.linux-usb.org/usb.ids
13 # Date: 2025-09-15 20:34:02
20 # device device_name <-- single tab
21 # interface interface_name <-- two tabs
38 5301 GW-US54ZGL 802.11bg
54 145f NW-3100 802.11b/g 54Mbps Wireless Network Adapter [zd1211]
64 0200 TP-Link
86 120e ASI120MC-S Planetary Camera
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/freebsd/sys/dev/usb/
H A Dusbdevs3 /*-
4 * Copyright (c) 1998-2004 The NetBSD Foundation, Inc.
36 * USB.org publishes a VID list of USB-IF member companies at
89 vendor FUJITSUICL 0x0406 Fujitsu-ICL
165 vendor IODATA 0x04bb I-O Data
175 vendor LITEON 0x04ca Lite-On Technology
249 vendor ETEK 0x056c e-TEK Labs
255 vendor YEDATA 0x057b Y-E Data
270 vendor ATREND 0x059c A-Trend Technology
271 vendor AID 0x059d Advanced Input Devices
[all …]