| /freebsd/contrib/wpa/src/ap/ |
| H A D | acs.c | 2 * ACS - Automatic Channel Selection module
31 * ------------
35 * ----------
36 * - make sure you have CONFIG_ACS=y in hostapd's .config
37 * - use channel=0 or channel=acs to enable ACS
40 * ----------------
48 * -----------------
49 * - Current implementation depends heavily on the amount of time willing to
52 * - Ideal channel may end up overlapping a channel with 40 MHz intolerant BSS
55 * ------------
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| /freebsd/sys/dev/ice/ |
| H A D | ice_iflib_recovery_txrx.c | 1 /* SPDX-License-Identifier: BSD-3-Clause */
34 * @brief iflib Tx/Rx ops for recovery mode
37 * that the firmware is in recovery mode. These ops essentially do nothing and
39 * receive when the device is in firmware recovery mode.
45 * iflib txrx methods used when in recovery mode
57 * @brief Tx/Rx operation
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| /freebsd/sys/contrib/device-tree/Bindings/usb/ |
| H A D | snps,dwc3-common.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/usb/snps,dwc3-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Felipe Balbi <balbi@kernel.org>
14 vendor-specific implementation or as a standalone component.
17 - $ref: usb-drd.yaml#
18 - if:
24 - dr_mode
28 $ref: usb-xhci.yaml#
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|
| H A D | dwc3.txt | 3 DWC3- USB3 CONTROLLER. Complies to the generic USB binding properties
7 - compatible: must be "snps,dwc3"
8 - reg : Address and length of the register set for the device
9 - interrupts: Interrupts used by the dwc3 controller.
10 - clock-names: list of clock names. Ideally should be "ref",
12 - clocks: list of phandle and clock specifier pairs corresponding to
13 entries in the clock-names property.
16 clocks are optional if the parent node (i.e. glue-layer) is compatible to
18 "cavium,octeon-7130-usb-uctl"
20 "samsung,exynos5250-dwusb3"
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|
| /freebsd/sys/contrib/device-tree/Bindings/net/ |
| H A D | keystone-netcp.txt | 6 switch sub-module to send and receive packets. NetCP also includes a packet
13 includes a 3-port Ethernet switch sub-module capable of 10Gb/s and 1Gb/s rates
16 Keystone NetCP driver has a plug-in module architecture where each of the NetCP
17 sub-modules exist as a loadable kernel module which plug in to the netcp core.
18 These sub-modules are represented as "netcp-devices" in the dts bindings. It is
19 mandatory to have the ethernet switch sub-module for the ethernet interface to
20 be operational. Any other sub-module like the PA is optional.
24 -----------------------------
26 -----------------------------
28 |-> NetCP Devices -> |
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|
| H A D | xlnx,axi-ethernet.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/xlnx,axi-ethernet.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
13 segments of memory for buffering TX and RX, as well as the capability of
14 offloading TX/RX checksum calculation off the processor.
22 - Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
27 - xlnx,axi-ethernet-1.00.a
28 - xlnx,axi-ethernet-1.01.a
29 - xlnx,axi-ethernet-2.01.a
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|
| H A D | snps,dwmac.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <alexandre.torgue@foss.st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
23 - snps,dwmac
24 - snps,dwmac-3.40a
25 - snps,dwmac-3.50a
26 - snps,dwmac-3.610
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|
| H A D | lantiq,etop-xway.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/lantiq,etop-xway.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - John Crispin <john@phrozen.org>
14 pattern: "^ethernet@[0-9a-f]+$"
17 const: lantiq,etop-xway
24 - description: TX interrupt
25 - description: RX interrupt
27 interrupt-names:
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|
| H A D | ethernet-controller.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/net/ethernet-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - David S. Miller <davem@davemloft.net>
19 max-speed:
24 nvmem-cells:
29 nvmem-cell-names:
30 const: mac-address
32 phy-connection-type:
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|
| /freebsd/sys/contrib/device-tree/Bindings/mfd/ |
| H A D | atmel-usart.txt | 4 - compatible: Should be one of the following:
5 - "atmel,at91rm9200-usart"
6 - "atmel,at91sam9260-usart"
7 - "microchip,sam9x60-usart"
8 - "atmel,at91rm9200-dbgu", "atmel,at91rm9200-usart"
9 - "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"
10 - "microchip,sam9x60-dbgu", "microchip,sam9x60-usart"
11 - reg: Should contain registers location and length
12 - interrupts: Should contain interrupt
13 - clock-names: tuple listing input clock names.
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|
| /freebsd/sys/net80211/ |
| H A D | ieee80211_ioctl.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
5 * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
42 uint32_t ns_rx_data; /* rx data frames */
43 uint32_t ns_rx_mgmt; /* rx management frames */
44 uint32_t ns_rx_ctrl; /* rx control frames */
45 uint32_t ns_rx_ucast; /* rx unicast frames */
46 uint32_t ns_rx_mcast; /* rx multi/broadcast frames */
47 uint64_t ns_rx_bytes; /* rx data count (bytes) */
48 uint64_t ns_rx_beacons; /* rx beacon frames */
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|
| /freebsd/sys/dev/vge/ |
| H A D | if_vgereg.h | 1 /*-
2 * SPDX-License-Identifier: BSD-4-Clause
18 * 4. Neither the name of the author nor the names of any co-contributors
37 * Definitions for the built-in copper PHY can be found in vgphy.h.
41 * using 32-bit I/O cycles, but some of them are less than 32 bits
54 #define VGE_RXCTL 0x06 /* RX control register */
82 #define VGE_RXHOSTERR 0x23 /* RX host error status */
87 #define VGE_RXQCSRS 0x32 /* RX queue ctl/status set */
89 #define VGE_RXQCSRC 0x36 /* RX queue ctl/status clear */
90 #define VGE_RXDESC_ADDR_LO 0x38 /* RX desc base addr (lo 32 bits) */
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|
| /freebsd/sys/dev/ic/ |
| H A D | z8530.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
47 #define WR_IDT 1 /* Interrupt and Data Transfer Mode. */
57 #define WR_MCB1 10 /* Miscellaneous Control Bits (part 1 :-). */
58 #define WR_CMC 11 /* Clock Mode Control. */
61 #define WR_MCB2 14 /* Miscellaneous Control Bits (part 2 :-). */
90 #define BES_RXA 0x01 /* Rx Available. */
92 /* Clock Mode Control (WR11). */
93 #define CMC_XTAL 0x80 /* -RTxC connects to quartz crystal. */
94 #define CMC_RC_DPLL 0x60 /* Rx Clock from DPLL. */
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|
| /freebsd/sys/contrib/device-tree/Bindings/serial/ |
| H A D | atmel,at91-usart.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/serial/atmel,at91-usart.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Richard Genoud <richard.genoud@bootlin.com>
16 - enum:
17 - atmel,at91rm9200-usart
18 - atmel,at91sam9260-usart
19 - items:
20 - const: atmel,at91rm9200-dbgu
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|
| /freebsd/sys/contrib/device-tree/Bindings/mmc/ |
| H A D | samsung,exynos-dw-mshc.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/mmc/samsung,exynos-dw-mshc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
12 - Jaehoon Chung <jh80.chung@samsung.com>
13 - Krzysztof Kozlowski <krzk@kernel.org>
18 - enum:
19 - axis,artpec8-dw-mshc
20 - samsung,exynos4210-dw-mshc
21 - samsung,exynos4412-dw-mshc
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|
| /freebsd/sys/dev/bfe/ |
| H A D | if_bfereg.h | 1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
41 #define BFE_PME 0x00001000 /* PHY Mode Enable */
42 #define BFE_PMCE 0x00002000 /* PHY Mode Clocks Enable */
46 #define BFE_BIST_STAT 0x0000000C /* Built-In Self-Test Status */
58 #define BFE_ISTAT_RX 0x00010000 /* RX Interrupt */
111 #define BFE_DMARX_CTRL 0x00000210 /* DMA RX Control */
116 #define BFE_DMARX_ADDR 0x00000214 /* DMA RX Descriptor Ring Address */
117 #define BFE_DMARX_PTR 0x00000218 /* DMA RX Last Posted Descriptor */
118 #define BFE_DMARX_STAT 0x0000021C /* DMA RX Current Active Desc. + Status */
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|
| /freebsd/share/man/man4/ |
| H A D | ena.4 | 1 .\" SPDX-License-Identifier: BSD-2-Clause
3 .\" Copyright (c) 2015-2024 Amazon.com, Inc. or its affiliates.
40 .Bd -ragged -offset indent
47 .Bd -literal -offset indent
58 The driver supports a range of ENA devices, is link-speed independent
62 Some ENA devices support SR-IOV.
63 This driver is used for both the SR-IOV Physical Function (PF) and Virtual
67 processing by providing multiple Tx/Rx queue pairs (the maximum number
68 is advertised by the device via the Admin Queue), a dedicated MSI-X
69 interrupt vector per Tx/Rx queue pair, and CPU cacheline optimized
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|
| /freebsd/sys/contrib/device-tree/Bindings/sound/ |
| H A D | davinci-mcasp-audio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/davinci-mcasp-audio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jayesh Choudhary <j-choudhary@ti.com>
15 - ti,dm646x-mcasp-audio
16 - ti,da830-mcasp-audio
17 - ti,am33xx-mcasp-audio
18 - ti,dra7-mcasp-audio
19 - ti,omap4-mcasp-audio
[all …]
|
| H A D | davinci-mcasp-audio.txt | 4 - compatible :
5 "ti,dm646x-mcasp-audio" : for DM646x platforms
6 "ti,da830-mcasp-audio" : for both DA830 & DA850 platforms
7 "ti,am33xx-mcasp-audio" : for AM33xx platforms (AM33xx, AM43xx, TI81xx)
8 "ti,dra7-mcasp-audio" : for DRA7xx platforms
9 "ti,omap4-mcasp-audio" : for OMAP4
11 - reg : Should contain reg specifiers for the entries in the reg-names property.
12 - reg-names : Should contain:
16 - op-mode : I2S/DIT ops mode. 0 for I2S mode. 1 for DIT mode used for S/PDIF,
17 IEC60958-1, and AES-3 formats.
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|
| /freebsd/sys/contrib/device-tree/Bindings/media/ |
| H A D | st-rc.txt | 1 Device-Tree bindings for ST IRB IP
4 - compatible: Should contain "st,comms-irb".
5 - reg: Base physical address of the controller and length of memory
7 - interrupts: interrupt-specifier for the sole interrupt generated by
10 - rx-mode: can be "infrared" or "uhf". This property specifies the L1
11 protocol used for receiving remote control signals. rx-mode should
12 be present iff the rx pins are wired up.
13 - tx-mode: should be "infrared". This property specifies the L1
14 protocol used for transmitting remote control signals. tx-mode should
18 - pinctrl-names, pinctrl-0: the pincontrol settings to configure muxing
[all …]
|
| /freebsd/sys/contrib/ncsw/inc/flib/ |
| H A D | fsl_fman_port.h | 2 * Copyright 2008-2013 Freescale Semiconductor Inc.
150 /** @Description BMI Rx port register map */
152 uint32_t fmbm_rcfg; /**< Rx Configuration */
153 uint32_t fmbm_rst; /**< Rx Status */
154 uint32_t fmbm_rda; /**< Rx DMA attributes*/
155 uint32_t fmbm_rfp; /**< Rx FIFO Parameters*/
156 uint32_t fmbm_rfed; /**< Rx Frame End Data*/
157 uint32_t fmbm_ricp; /**< Rx Internal Context Parameters*/
158 uint32_t fmbm_rim; /**< Rx Internal Buffer Margins*/
159 uint32_t fmbm_rebm; /**< Rx External Buffer Margins*/
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| /freebsd/sys/contrib/device-tree/Bindings/soc/fsl/cpm_qe/ |
| H A D | fsl,cpm1-scc-qmc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,cpm1-sc
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| /freebsd/sys/contrib/device-tree/Bindings/hsi/ |
| H A D | client-devices.txt | 7 - hsi-channel-ids: A list of channel ids
9 - hsi-rx-mode: Receiver Bit transmission mode ("stream" or "frame")
10 - hsi-tx-mode: Transmitter Bit transmission mode ("stream" or "frame")
11 - hsi-mode: May be used instead hsi-rx-mode and hsi-tx-mode if
12 the transmission mode is the same for receiver and
14 - hsi-speed-kbps: Max bit transmission speed in kbit/s
15 - hsi-flow: RX flow type ("synchronized" or "pipeline")
16 - hsi-arb-mode: Arbitration mode for TX frame ("round-robin", "priority")
20 - hsi-channel-names: A list with one name per channel specified in the
21 hsi-channel-ids property
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|
| /freebsd/sys/contrib/device-tree/Bindings/spi/ |
| H A D | spi-pl022.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-pl022.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
13 -
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| /freebsd/sys/contrib/device-tree/Bindings/media/i2c/ |
| H A D | ti,ds90ub960.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Texas Instruments DS90UB9XX Family FPD-Link Deserializer Hubs
10 - Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
13 The TI DS90UB9XX devices are FPD-Link video deserializers with I2C and GPIO
17 - $ref: /schemas/i2c/i2c-atr.yaml#
22 - ti,ds90ub960-q1
23 - ti,ds90ub9702-q1
33 clock-names:
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|